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04e7ca8d LV |
1 | /* |
2 | * QEMU Motorla 680x0 Macintosh hardware System Emulator | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
5 | * of this software and associated documentation files (the "Software"), to deal | |
6 | * in the Software without restriction, including without limitation the rights | |
7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
8 | * copies of the Software, and to permit persons to whom the Software is | |
9 | * furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
20 | * THE SOFTWARE. | |
21 | */ | |
22 | ||
23 | #include "qemu/osdep.h" | |
24 | #include "qemu/units.h" | |
25 | #include "qemu-common.h" | |
2c65db5e | 26 | #include "qemu/datadir.h" |
04e7ca8d LV |
27 | #include "sysemu/sysemu.h" |
28 | #include "cpu.h" | |
04e7ca8d | 29 | #include "hw/boards.h" |
95264861 | 30 | #include "hw/or-irq.h" |
04e7ca8d LV |
31 | #include "elf.h" |
32 | #include "hw/loader.h" | |
33 | #include "ui/console.h" | |
04e7ca8d LV |
34 | #include "hw/char/escc.h" |
35 | #include "hw/sysbus.h" | |
36 | #include "hw/scsi/esp.h" | |
382d71af LV |
37 | #include "standard-headers/asm-m68k/bootinfo.h" |
38 | #include "standard-headers/asm-m68k/bootinfo-mac.h" | |
04e7ca8d LV |
39 | #include "bootinfo.h" |
40 | #include "hw/misc/mac_via.h" | |
41 | #include "hw/input/adb.h" | |
42 | #include "hw/nubus/mac-nubus-bridge.h" | |
43 | #include "hw/display/macfb.h" | |
44 | #include "hw/block/swim.h" | |
45 | #include "net/net.h" | |
46 | #include "qapi/error.h" | |
47 | #include "sysemu/qtest.h" | |
48 | #include "sysemu/runstate.h" | |
49 | #include "sysemu/reset.h" | |
07e39012 | 50 | #include "migration/vmstate.h" |
04e7ca8d | 51 | |
e24e58e8 | 52 | #define MACROM_ADDR 0x40800000 |
04e7ca8d LV |
53 | #define MACROM_SIZE 0x00100000 |
54 | ||
55 | #define MACROM_FILENAME "MacROM.bin" | |
56 | ||
653901ca LV |
57 | #define IO_BASE 0x50000000 |
58 | #define IO_SLICE 0x00040000 | |
59 | #define IO_SIZE 0x04000000 | |
60 | ||
61 | #define VIA_BASE (IO_BASE + 0x00000) | |
62 | #define SONIC_PROM_BASE (IO_BASE + 0x08000) | |
63 | #define SONIC_BASE (IO_BASE + 0x0a000) | |
64 | #define SCC_BASE (IO_BASE + 0x0c020) | |
65 | #define ESP_BASE (IO_BASE + 0x10000) | |
66 | #define ESP_PDMA (IO_BASE + 0x10100) | |
67 | #define ASC_BASE (IO_BASE + 0x14000) | |
68 | #define SWIM_BASE (IO_BASE + 0x1E000) | |
69 | ||
408c5733 MCA |
70 | #define SONIC_PROM_SIZE 0x1000 |
71 | ||
04e7ca8d LV |
72 | /* |
73 | * the video base, whereas it a Nubus address, | |
74 | * is needed by the kernel to have early display and | |
75 | * thus provided by the bootloader | |
76 | */ | |
df8abbba | 77 | #define VIDEO_BASE 0xf9000000 |
04e7ca8d LV |
78 | |
79 | #define MAC_CLOCK 3686418 | |
80 | ||
5ef25141 MCA |
81 | /* |
82 | * Slot 0x9 is reserved for use by the in-built framebuffer whilst only | |
83 | * slots 0xc, 0xd and 0xe physically exist on the Quadra 800 | |
84 | */ | |
85 | #define Q800_NUBUS_SLOTS_AVAILABLE (BIT(0x9) | BIT(0xc) | BIT(0xd) | \ | |
86 | BIT(0xe)) | |
87 | ||
04e7ca8d LV |
88 | /* |
89 | * The GLUE (General Logic Unit) is an Apple custom integrated circuit chip | |
90 | * that performs a variety of functions (RAM management, clock generation, ...). | |
91 | * The GLUE chip receives interrupt requests from various devices, | |
92 | * assign priority to each, and asserts one or more interrupt line to the | |
93 | * CPU. | |
94 | */ | |
95 | ||
07e39012 PM |
96 | #define TYPE_GLUE "q800-glue" |
97 | OBJECT_DECLARE_SIMPLE_TYPE(GLUEState, GLUE) | |
98 | ||
99 | struct GLUEState { | |
100 | SysBusDevice parent_obj; | |
04e7ca8d LV |
101 | M68kCPU *cpu; |
102 | uint8_t ipr; | |
a85d18aa | 103 | uint8_t auxmode; |
f7c6e12e | 104 | qemu_irq irqs[1]; |
07e39012 | 105 | }; |
04e7ca8d | 106 | |
91ff5e4d MCA |
107 | #define GLUE_IRQ_IN_VIA1 0 |
108 | #define GLUE_IRQ_IN_VIA2 1 | |
109 | #define GLUE_IRQ_IN_SONIC 2 | |
110 | #define GLUE_IRQ_IN_ESCC 3 | |
111 | ||
f7c6e12e MCA |
112 | #define GLUE_IRQ_NUBUS_9 0 |
113 | ||
04e7ca8d LV |
114 | static void GLUE_set_irq(void *opaque, int irq, int level) |
115 | { | |
116 | GLUEState *s = opaque; | |
117 | int i; | |
118 | ||
f7c6e12e MCA |
119 | if (s->auxmode) { |
120 | /* Classic mode */ | |
121 | switch (irq) { | |
122 | case GLUE_IRQ_IN_SONIC: | |
123 | /* Route to VIA2 instead */ | |
124 | qemu_set_irq(s->irqs[GLUE_IRQ_NUBUS_9], level); | |
125 | return; | |
126 | } | |
127 | } else { | |
128 | /* A/UX mode */ | |
129 | switch (irq) { | |
130 | case GLUE_IRQ_IN_VIA1: | |
131 | irq = 5; | |
132 | break; | |
133 | ||
134 | case GLUE_IRQ_IN_VIA2: | |
135 | irq = 1; | |
136 | break; | |
137 | ||
138 | case GLUE_IRQ_IN_SONIC: | |
139 | irq = 2; | |
140 | break; | |
141 | ||
142 | case GLUE_IRQ_IN_ESCC: | |
143 | irq = 3; | |
144 | break; | |
145 | } | |
91ff5e4d MCA |
146 | } |
147 | ||
04e7ca8d LV |
148 | if (level) { |
149 | s->ipr |= 1 << irq; | |
150 | } else { | |
151 | s->ipr &= ~(1 << irq); | |
152 | } | |
153 | ||
154 | for (i = 7; i >= 0; i--) { | |
155 | if ((s->ipr >> i) & 1) { | |
156 | m68k_set_irq_level(s->cpu, i + 1, i + 25); | |
157 | return; | |
158 | } | |
159 | } | |
160 | m68k_set_irq_level(s->cpu, 0, 0); | |
161 | } | |
162 | ||
a85d18aa MCA |
163 | static void glue_auxmode_set_irq(void *opaque, int irq, int level) |
164 | { | |
165 | GLUEState *s = GLUE(opaque); | |
166 | ||
167 | s->auxmode = level; | |
168 | } | |
169 | ||
07e39012 PM |
170 | static void glue_reset(DeviceState *dev) |
171 | { | |
172 | GLUEState *s = GLUE(dev); | |
173 | ||
174 | s->ipr = 0; | |
a85d18aa | 175 | s->auxmode = 0; |
07e39012 PM |
176 | } |
177 | ||
178 | static const VMStateDescription vmstate_glue = { | |
179 | .name = "q800-glue", | |
180 | .version_id = 0, | |
181 | .minimum_version_id = 0, | |
182 | .fields = (VMStateField[]) { | |
183 | VMSTATE_UINT8(ipr, GLUEState), | |
a85d18aa | 184 | VMSTATE_UINT8(auxmode, GLUEState), |
07e39012 PM |
185 | VMSTATE_END_OF_LIST(), |
186 | }, | |
187 | }; | |
188 | ||
189 | /* | |
190 | * If the m68k CPU implemented its inbound irq lines as GPIO lines | |
191 | * rather than via the m68k_set_irq_level() function we would not need | |
192 | * this cpu link property and could instead provide outbound IRQ lines | |
193 | * that the board could wire up to the CPU. | |
194 | */ | |
195 | static Property glue_properties[] = { | |
196 | DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *), | |
197 | DEFINE_PROP_END_OF_LIST(), | |
198 | }; | |
199 | ||
200 | static void glue_init(Object *obj) | |
201 | { | |
202 | DeviceState *dev = DEVICE(obj); | |
f7c6e12e | 203 | GLUEState *s = GLUE(dev); |
07e39012 PM |
204 | |
205 | qdev_init_gpio_in(dev, GLUE_set_irq, 8); | |
a85d18aa | 206 | qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1); |
f7c6e12e MCA |
207 | |
208 | qdev_init_gpio_out(dev, s->irqs, 1); | |
07e39012 PM |
209 | } |
210 | ||
211 | static void glue_class_init(ObjectClass *klass, void *data) | |
212 | { | |
213 | DeviceClass *dc = DEVICE_CLASS(klass); | |
214 | ||
215 | dc->vmsd = &vmstate_glue; | |
216 | dc->reset = glue_reset; | |
217 | device_class_set_props(dc, glue_properties); | |
218 | } | |
219 | ||
220 | static const TypeInfo glue_info = { | |
221 | .name = TYPE_GLUE, | |
222 | .parent = TYPE_SYS_BUS_DEVICE, | |
223 | .instance_size = sizeof(GLUEState), | |
224 | .instance_init = glue_init, | |
225 | .class_init = glue_class_init, | |
226 | }; | |
227 | ||
04e7ca8d LV |
228 | static void main_cpu_reset(void *opaque) |
229 | { | |
230 | M68kCPU *cpu = opaque; | |
231 | CPUState *cs = CPU(cpu); | |
232 | ||
233 | cpu_reset(cs); | |
234 | cpu->env.aregs[7] = ldl_phys(cs->as, 0); | |
235 | cpu->env.pc = ldl_phys(cs->as, 4); | |
236 | } | |
237 | ||
e24e58e8 JD |
238 | static uint8_t fake_mac_rom[] = { |
239 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | |
240 | ||
241 | /* offset: 0xa - mac_reset */ | |
242 | ||
243 | /* via2[vDirB] |= VIA2B_vPower */ | |
244 | 0x20, 0x7C, 0x50, 0xF0, 0x24, 0x00, /* moveal VIA2_BASE+vDirB,%a0 */ | |
245 | 0x10, 0x10, /* moveb %a0@,%d0 */ | |
246 | 0x00, 0x00, 0x00, 0x04, /* orib #4,%d0 */ | |
247 | 0x10, 0x80, /* moveb %d0,%a0@ */ | |
248 | ||
249 | /* via2[vBufB] &= ~VIA2B_vPower */ | |
250 | 0x20, 0x7C, 0x50, 0xF0, 0x20, 0x00, /* moveal VIA2_BASE+vBufB,%a0 */ | |
251 | 0x10, 0x10, /* moveb %a0@,%d0 */ | |
252 | 0x02, 0x00, 0xFF, 0xFB, /* andib #-5,%d0 */ | |
253 | 0x10, 0x80, /* moveb %d0,%a0@ */ | |
254 | ||
255 | /* while (true) ; */ | |
256 | 0x60, 0xFE /* bras [self] */ | |
257 | }; | |
258 | ||
04e7ca8d LV |
259 | static void q800_init(MachineState *machine) |
260 | { | |
261 | M68kCPU *cpu = NULL; | |
262 | int linux_boot; | |
263 | int32_t kernel_size; | |
264 | uint64_t elf_entry; | |
265 | char *filename; | |
266 | int bios_size; | |
267 | ram_addr_t initrd_base; | |
268 | int32_t initrd_size; | |
269 | MemoryRegion *rom; | |
653901ca | 270 | MemoryRegion *io; |
408c5733 MCA |
271 | MemoryRegion *dp8393x_prom = g_new(MemoryRegion, 1); |
272 | uint8_t *prom; | |
653901ca | 273 | const int io_slice_nb = (IO_SIZE / IO_SLICE) - 1; |
408c5733 | 274 | int i, checksum; |
df8abbba | 275 | MacFbMode *macfb_mode; |
04e7ca8d LV |
276 | ram_addr_t ram_size = machine->ram_size; |
277 | const char *kernel_filename = machine->kernel_filename; | |
278 | const char *initrd_filename = machine->initrd_filename; | |
279 | const char *kernel_cmdline = machine->kernel_cmdline; | |
1684273c | 280 | const char *bios_name = machine->firmware ?: MACROM_FILENAME; |
04e7ca8d LV |
281 | hwaddr parameters_base; |
282 | CPUState *cs; | |
283 | DeviceState *dev; | |
02a68a3e | 284 | DeviceState *via1_dev, *via2_dev; |
95264861 | 285 | DeviceState *escc_orgate; |
04e7ca8d LV |
286 | SysBusESPState *sysbus_esp; |
287 | ESPState *esp; | |
288 | SysBusDevice *sysbus; | |
289 | BusState *adb_bus; | |
290 | NubusBus *nubus; | |
07e39012 | 291 | DeviceState *glue; |
eb064db9 | 292 | DriveInfo *dinfo; |
04e7ca8d LV |
293 | |
294 | linux_boot = (kernel_filename != NULL); | |
295 | ||
296 | if (ram_size > 1 * GiB) { | |
297 | error_report("Too much memory for this machine: %" PRId64 " MiB, " | |
298 | "maximum 1024 MiB", ram_size / MiB); | |
299 | exit(1); | |
300 | } | |
301 | ||
302 | /* init CPUs */ | |
303 | cpu = M68K_CPU(cpu_create(machine->cpu_type)); | |
304 | qemu_register_reset(main_cpu_reset, cpu); | |
305 | ||
653901ca | 306 | /* RAM */ |
8591a179 | 307 | memory_region_add_subregion(get_system_memory(), 0, machine->ram); |
04e7ca8d | 308 | |
653901ca LV |
309 | /* |
310 | * Memory from IO_BASE to IO_BASE + IO_SLICE is repeated | |
311 | * from IO_BASE + IO_SLICE to IO_BASE + IO_SIZE | |
312 | */ | |
313 | io = g_new(MemoryRegion, io_slice_nb); | |
314 | for (i = 0; i < io_slice_nb; i++) { | |
315 | char *name = g_strdup_printf("mac_m68k.io[%d]", i + 1); | |
316 | ||
317 | memory_region_init_alias(&io[i], NULL, name, get_system_memory(), | |
318 | IO_BASE, IO_SLICE); | |
319 | memory_region_add_subregion(get_system_memory(), | |
320 | IO_BASE + (i + 1) * IO_SLICE, &io[i]); | |
321 | g_free(name); | |
322 | } | |
323 | ||
04e7ca8d | 324 | /* IRQ Glue */ |
07e39012 PM |
325 | glue = qdev_new(TYPE_GLUE); |
326 | object_property_set_link(OBJECT(glue), "cpu", OBJECT(cpu), &error_abort); | |
327 | sysbus_realize_and_unref(SYS_BUS_DEVICE(glue), &error_fatal); | |
04e7ca8d | 328 | |
02a68a3e MCA |
329 | /* VIA 1 */ |
330 | via1_dev = qdev_new(TYPE_MOS6522_Q800_VIA1); | |
eb064db9 LV |
331 | dinfo = drive_get(IF_MTD, 0, 0); |
332 | if (dinfo) { | |
02a68a3e | 333 | qdev_prop_set_drive(via1_dev, "drive", blk_by_legacy_dinfo(dinfo)); |
eb064db9 | 334 | } |
02a68a3e | 335 | sysbus = SYS_BUS_DEVICE(via1_dev); |
3c6ef471 | 336 | sysbus_realize_and_unref(sysbus, &error_fatal); |
02a68a3e | 337 | sysbus_mmio_map(sysbus, 1, VIA_BASE); |
91ff5e4d | 338 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_VIA1)); |
a85d18aa MCA |
339 | /* A/UX mode */ |
340 | qdev_connect_gpio_out(via1_dev, 0, | |
341 | qdev_get_gpio_in_named(glue, "auxmode", 0)); | |
02a68a3e MCA |
342 | |
343 | adb_bus = qdev_get_child_bus(via1_dev, "adb.0"); | |
3e80f690 MA |
344 | dev = qdev_new(TYPE_ADB_KEYBOARD); |
345 | qdev_realize_and_unref(dev, adb_bus, &error_fatal); | |
346 | dev = qdev_new(TYPE_ADB_MOUSE); | |
347 | qdev_realize_and_unref(dev, adb_bus, &error_fatal); | |
04e7ca8d | 348 | |
02a68a3e MCA |
349 | /* VIA 2 */ |
350 | via2_dev = qdev_new(TYPE_MOS6522_Q800_VIA2); | |
351 | sysbus = SYS_BUS_DEVICE(via2_dev); | |
352 | sysbus_realize_and_unref(sysbus, &error_fatal); | |
353 | sysbus_mmio_map(sysbus, 1, VIA_BASE + VIA_SIZE); | |
91ff5e4d | 354 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_VIA2)); |
02a68a3e | 355 | |
04e7ca8d LV |
356 | /* MACSONIC */ |
357 | ||
358 | if (nb_nics > 1) { | |
359 | error_report("q800 can only have one ethernet interface"); | |
360 | exit(1); | |
361 | } | |
362 | ||
363 | qemu_check_nic_model(&nd_table[0], "dp83932"); | |
364 | ||
365 | /* | |
366 | * MacSonic driver needs an Apple MAC address | |
367 | * Valid prefix are: | |
368 | * 00:05:02 Apple | |
369 | * 00:80:19 Dayna Communications, Inc. | |
370 | * 00:A0:40 Apple | |
371 | * 08:00:07 Apple | |
372 | * (Q800 use the last one) | |
373 | */ | |
374 | nd_table[0].macaddr.a[0] = 0x08; | |
375 | nd_table[0].macaddr.a[1] = 0x00; | |
376 | nd_table[0].macaddr.a[2] = 0x07; | |
377 | ||
3e80f690 | 378 | dev = qdev_new("dp8393x"); |
04e7ca8d LV |
379 | qdev_set_nic_properties(dev, &nd_table[0]); |
380 | qdev_prop_set_uint8(dev, "it_shift", 2); | |
381 | qdev_prop_set_bit(dev, "big_endian", true); | |
5325cc34 MA |
382 | object_property_set_link(OBJECT(dev), "dma_mr", |
383 | OBJECT(get_system_memory()), &error_abort); | |
04e7ca8d | 384 | sysbus = SYS_BUS_DEVICE(dev); |
3c6ef471 | 385 | sysbus_realize_and_unref(sysbus, &error_fatal); |
04e7ca8d | 386 | sysbus_mmio_map(sysbus, 0, SONIC_BASE); |
91ff5e4d | 387 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(glue, GLUE_IRQ_IN_SONIC)); |
04e7ca8d | 388 | |
408c5733 MCA |
389 | memory_region_init_rom(dp8393x_prom, NULL, "dp8393x-q800.prom", |
390 | SONIC_PROM_SIZE, &error_fatal); | |
391 | memory_region_add_subregion(get_system_memory(), SONIC_PROM_BASE, | |
392 | dp8393x_prom); | |
393 | ||
394 | /* Add MAC address with valid checksum to PROM */ | |
395 | prom = memory_region_get_ram_ptr(dp8393x_prom); | |
396 | checksum = 0; | |
397 | for (i = 0; i < 6; i++) { | |
2f0e10a4 | 398 | prom[i] = revbit8(nd_table[0].macaddr.a[i]); |
846feac2 | 399 | checksum ^= prom[i]; |
408c5733 MCA |
400 | } |
401 | prom[7] = 0xff - checksum; | |
402 | ||
04e7ca8d LV |
403 | /* SCC */ |
404 | ||
3e80f690 | 405 | dev = qdev_new(TYPE_ESCC); |
04e7ca8d LV |
406 | qdev_prop_set_uint32(dev, "disabled", 0); |
407 | qdev_prop_set_uint32(dev, "frequency", MAC_CLOCK); | |
408 | qdev_prop_set_uint32(dev, "it_shift", 1); | |
409 | qdev_prop_set_bit(dev, "bit_swap", true); | |
410 | qdev_prop_set_chr(dev, "chrA", serial_hd(0)); | |
411 | qdev_prop_set_chr(dev, "chrB", serial_hd(1)); | |
412 | qdev_prop_set_uint32(dev, "chnBtype", 0); | |
413 | qdev_prop_set_uint32(dev, "chnAtype", 0); | |
04e7ca8d | 414 | sysbus = SYS_BUS_DEVICE(dev); |
3c6ef471 | 415 | sysbus_realize_and_unref(sysbus, &error_fatal); |
95264861 PM |
416 | |
417 | /* Logically OR both its IRQs together */ | |
418 | escc_orgate = DEVICE(object_new(TYPE_OR_IRQ)); | |
419 | object_property_set_int(OBJECT(escc_orgate), "num-lines", 2, &error_fatal); | |
420 | qdev_realize_and_unref(escc_orgate, NULL, &error_fatal); | |
421 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(escc_orgate, 0)); | |
422 | sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(escc_orgate, 1)); | |
91ff5e4d MCA |
423 | qdev_connect_gpio_out(DEVICE(escc_orgate), 0, |
424 | qdev_get_gpio_in(glue, GLUE_IRQ_IN_ESCC)); | |
04e7ca8d LV |
425 | sysbus_mmio_map(sysbus, 0, SCC_BASE); |
426 | ||
427 | /* SCSI */ | |
428 | ||
84fbefed MCA |
429 | dev = qdev_new(TYPE_SYSBUS_ESP); |
430 | sysbus_esp = SYSBUS_ESP(dev); | |
04e7ca8d LV |
431 | esp = &sysbus_esp->esp; |
432 | esp->dma_memory_read = NULL; | |
433 | esp->dma_memory_write = NULL; | |
434 | esp->dma_opaque = NULL; | |
435 | sysbus_esp->it_shift = 4; | |
436 | esp->dma_enabled = 1; | |
04e7ca8d LV |
437 | |
438 | sysbus = SYS_BUS_DEVICE(dev); | |
3c6ef471 | 439 | sysbus_realize_and_unref(sysbus, &error_fatal); |
323f9849 MCA |
440 | sysbus_connect_irq(sysbus, 0, qdev_get_gpio_in(via2_dev, |
441 | VIA2_IRQ_SCSI_BIT)); | |
442 | sysbus_connect_irq(sysbus, 1, qdev_get_gpio_in(via2_dev, | |
443 | VIA2_IRQ_SCSI_DATA_BIT)); | |
04e7ca8d LV |
444 | sysbus_mmio_map(sysbus, 0, ESP_BASE); |
445 | sysbus_mmio_map(sysbus, 1, ESP_PDMA); | |
446 | ||
447 | scsi_bus_legacy_handle_cmdline(&esp->bus); | |
448 | ||
449 | /* SWIM floppy controller */ | |
450 | ||
3e80f690 | 451 | dev = qdev_new(TYPE_SWIM); |
3c6ef471 | 452 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
04e7ca8d LV |
453 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, SWIM_BASE); |
454 | ||
455 | /* NuBus */ | |
456 | ||
3e80f690 | 457 | dev = qdev_new(TYPE_MAC_NUBUS_BRIDGE); |
5ef25141 MCA |
458 | qdev_prop_set_uint32(dev, "slot-available-mask", |
459 | Q800_NUBUS_SLOTS_AVAILABLE); | |
3c6ef471 | 460 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
62437f90 MCA |
461 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, |
462 | MAC_NUBUS_FIRST_SLOT * NUBUS_SUPER_SLOT_SIZE); | |
463 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, NUBUS_SLOT_BASE + | |
464 | MAC_NUBUS_FIRST_SLOT * NUBUS_SLOT_SIZE); | |
efd0c37e MCA |
465 | qdev_connect_gpio_out(dev, 9, |
466 | qdev_get_gpio_in_named(via2_dev, "nubus-irq", | |
467 | VIA2_NUBUS_IRQ_INTVIDEO)); | |
468 | for (i = 1; i < VIA2_NUBUS_IRQ_NB; i++) { | |
b297843e MCA |
469 | qdev_connect_gpio_out(dev, 9 + i, |
470 | qdev_get_gpio_in_named(via2_dev, "nubus-irq", | |
471 | VIA2_NUBUS_IRQ_9 + i)); | |
472 | } | |
473 | ||
f7c6e12e MCA |
474 | /* |
475 | * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused | |
476 | * IRQ via GLUE for use by SONIC Ethernet in classic mode | |
477 | */ | |
478 | qdev_connect_gpio_out(glue, GLUE_IRQ_NUBUS_9, | |
479 | qdev_get_gpio_in_named(via2_dev, "nubus-irq", | |
480 | VIA2_NUBUS_IRQ_9)); | |
481 | ||
d585d89d | 482 | nubus = &NUBUS_BRIDGE(dev)->bus; |
04e7ca8d LV |
483 | |
484 | /* framebuffer in nubus slot #9 */ | |
485 | ||
3e80f690 | 486 | dev = qdev_new(TYPE_NUBUS_MACFB); |
efd0c37e | 487 | qdev_prop_set_uint32(dev, "slot", 9); |
04e7ca8d LV |
488 | qdev_prop_set_uint32(dev, "width", graphic_width); |
489 | qdev_prop_set_uint32(dev, "height", graphic_height); | |
490 | qdev_prop_set_uint8(dev, "depth", graphic_depth); | |
4317c518 MCA |
491 | if (graphic_width == 1152 && graphic_height == 870 && graphic_depth == 8) { |
492 | qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_APPLE_21_COLOR); | |
493 | } else { | |
494 | qdev_prop_set_uint8(dev, "display", MACFB_DISPLAY_VGA); | |
495 | } | |
3e80f690 | 496 | qdev_realize_and_unref(dev, BUS(nubus), &error_fatal); |
04e7ca8d | 497 | |
df8abbba MCA |
498 | macfb_mode = (NUBUS_MACFB(dev)->macfb).mode; |
499 | ||
04e7ca8d LV |
500 | cs = CPU(cpu); |
501 | if (linux_boot) { | |
502 | uint64_t high; | |
503 | kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, | |
6cdda0ff | 504 | &elf_entry, NULL, &high, NULL, 1, |
04e7ca8d LV |
505 | EM_68K, 0, 0); |
506 | if (kernel_size < 0) { | |
507 | error_report("could not load kernel '%s'", kernel_filename); | |
508 | exit(1); | |
509 | } | |
510 | stl_phys(cs->as, 4, elf_entry); /* reset initial PC */ | |
511 | parameters_base = (high + 1) & ~1; | |
512 | ||
513 | BOOTINFO1(cs->as, parameters_base, BI_MACHTYPE, MACH_MAC); | |
382d71af LV |
514 | BOOTINFO1(cs->as, parameters_base, BI_FPUTYPE, FPU_68040); |
515 | BOOTINFO1(cs->as, parameters_base, BI_MMUTYPE, MMU_68040); | |
516 | BOOTINFO1(cs->as, parameters_base, BI_CPUTYPE, CPU_68040); | |
517 | BOOTINFO1(cs->as, parameters_base, BI_MAC_CPUID, CPUB_68040); | |
518 | BOOTINFO1(cs->as, parameters_base, BI_MAC_MODEL, MAC_MODEL_Q800); | |
04e7ca8d LV |
519 | BOOTINFO1(cs->as, parameters_base, |
520 | BI_MAC_MEMSIZE, ram_size >> 20); /* in MB */ | |
521 | BOOTINFO2(cs->as, parameters_base, BI_MEMCHUNK, 0, ram_size); | |
df8abbba MCA |
522 | BOOTINFO1(cs->as, parameters_base, BI_MAC_VADDR, |
523 | VIDEO_BASE + macfb_mode->offset); | |
04e7ca8d LV |
524 | BOOTINFO1(cs->as, parameters_base, BI_MAC_VDEPTH, graphic_depth); |
525 | BOOTINFO1(cs->as, parameters_base, BI_MAC_VDIM, | |
526 | (graphic_height << 16) | graphic_width); | |
df8abbba | 527 | BOOTINFO1(cs->as, parameters_base, BI_MAC_VROW, macfb_mode->stride); |
04e7ca8d LV |
528 | BOOTINFO1(cs->as, parameters_base, BI_MAC_SCCBASE, SCC_BASE); |
529 | ||
e24e58e8 JD |
530 | rom = g_malloc(sizeof(*rom)); |
531 | memory_region_init_ram_ptr(rom, NULL, "m68k_fake_mac.rom", | |
532 | sizeof(fake_mac_rom), fake_mac_rom); | |
533 | memory_region_set_readonly(rom, true); | |
534 | memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); | |
535 | ||
04e7ca8d LV |
536 | if (kernel_cmdline) { |
537 | BOOTINFOSTR(cs->as, parameters_base, BI_COMMAND_LINE, | |
538 | kernel_cmdline); | |
539 | } | |
540 | ||
541 | /* load initrd */ | |
542 | if (initrd_filename) { | |
543 | initrd_size = get_image_size(initrd_filename); | |
544 | if (initrd_size < 0) { | |
545 | error_report("could not load initial ram disk '%s'", | |
546 | initrd_filename); | |
547 | exit(1); | |
548 | } | |
549 | ||
550 | initrd_base = (ram_size - initrd_size) & TARGET_PAGE_MASK; | |
551 | load_image_targphys(initrd_filename, initrd_base, | |
552 | ram_size - initrd_base); | |
553 | BOOTINFO2(cs->as, parameters_base, BI_RAMDISK, initrd_base, | |
554 | initrd_size); | |
555 | } else { | |
556 | initrd_base = 0; | |
557 | initrd_size = 0; | |
558 | } | |
559 | BOOTINFO0(cs->as, parameters_base, BI_LAST); | |
560 | } else { | |
561 | uint8_t *ptr; | |
562 | /* allocate and load BIOS */ | |
563 | rom = g_malloc(sizeof(*rom)); | |
9400f343 | 564 | memory_region_init_rom(rom, NULL, "m68k_mac.rom", MACROM_SIZE, |
04e7ca8d | 565 | &error_abort); |
04e7ca8d | 566 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
04e7ca8d LV |
567 | memory_region_add_subregion(get_system_memory(), MACROM_ADDR, rom); |
568 | ||
569 | /* Load MacROM binary */ | |
570 | if (filename) { | |
571 | bios_size = load_image_targphys(filename, MACROM_ADDR, MACROM_SIZE); | |
572 | g_free(filename); | |
573 | } else { | |
574 | bios_size = -1; | |
575 | } | |
576 | ||
577 | /* Remove qtest_enabled() check once firmware files are in the tree */ | |
578 | if (!qtest_enabled()) { | |
579 | if (bios_size < 0 || bios_size > MACROM_SIZE) { | |
580 | error_report("could not load MacROM '%s'", bios_name); | |
581 | exit(1); | |
582 | } | |
583 | ||
584 | ptr = rom_ptr(MACROM_ADDR, MACROM_SIZE); | |
585 | stl_phys(cs->as, 0, ldl_p(ptr)); /* reset initial SP */ | |
586 | stl_phys(cs->as, 4, | |
587 | MACROM_ADDR + ldl_p(ptr + 4)); /* reset initial PC */ | |
588 | } | |
589 | } | |
590 | } | |
591 | ||
592 | static void q800_machine_class_init(ObjectClass *oc, void *data) | |
593 | { | |
594 | MachineClass *mc = MACHINE_CLASS(oc); | |
595 | mc->desc = "Macintosh Quadra 800"; | |
596 | mc->init = q800_init; | |
597 | mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040"); | |
598 | mc->max_cpus = 1; | |
04e7ca8d | 599 | mc->block_default_type = IF_SCSI; |
8591a179 | 600 | mc->default_ram_id = "m68k_mac.ram"; |
04e7ca8d LV |
601 | } |
602 | ||
603 | static const TypeInfo q800_machine_typeinfo = { | |
604 | .name = MACHINE_TYPE_NAME("q800"), | |
605 | .parent = TYPE_MACHINE, | |
606 | .class_init = q800_machine_class_init, | |
607 | }; | |
608 | ||
609 | static void q800_machine_register_types(void) | |
610 | { | |
611 | type_register_static(&q800_machine_typeinfo); | |
07e39012 | 612 | type_register_static(&glue_info); |
04e7ca8d LV |
613 | } |
614 | ||
615 | type_init(q800_machine_register_types) |