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ef056e43 AZ |
1 | /* |
2 | * PXA270-based Intel Mainstone platforms. | |
3 | * | |
4 | * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or | |
5 | * <akuster@mvista.com> | |
6 | * | |
7 | * Code based on spitz platform by Andrzej Zaborowski <balrog@zabor.org> | |
8 | * | |
9 | * This code is licensed under the GNU GPL v2. | |
10 | */ | |
11 | #include "hw.h" | |
12 | #include "pxa.h" | |
13 | #include "arm-misc.h" | |
ef056e43 AZ |
14 | #include "net.h" |
15 | #include "devices.h" | |
16 | #include "boards.h" | |
7233b355 TS |
17 | #include "mainstone.h" |
18 | #include "sysemu.h" | |
19 | #include "flash.h" | |
ef056e43 AZ |
20 | |
21 | enum mainstone_model_e { mainstone }; | |
22 | ||
23 | static void mainstone_common_init(int ram_size, int vga_ram_size, | |
24 | DisplayState *ds, const char *kernel_filename, | |
25 | const char *kernel_cmdline, const char *initrd_filename, | |
26 | const char *cpu_model, enum mainstone_model_e model, int arm_id) | |
27 | { | |
28 | uint32_t mainstone_ram = 0x04000000; | |
29 | uint32_t mainstone_rom = 0x00800000; | |
30 | struct pxa2xx_state_s *cpu; | |
31 | qemu_irq *mst_irq; | |
e4bcb14c | 32 | int index; |
ef056e43 AZ |
33 | |
34 | if (!cpu_model) | |
35 | cpu_model = "pxa270-c5"; | |
36 | ||
37 | /* Setup CPU & memory */ | |
38 | if (ram_size < mainstone_ram + mainstone_rom + PXA2XX_INTERNAL_SIZE) { | |
39 | fprintf(stderr, "This platform requires %i bytes of memory\n", | |
40 | mainstone_ram + mainstone_rom + PXA2XX_INTERNAL_SIZE); | |
41 | exit(1); | |
42 | } | |
43 | ||
44 | cpu = pxa270_init(mainstone_ram, ds, cpu_model); | |
45 | cpu_register_physical_memory(0, mainstone_rom, | |
46 | qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM); | |
47 | ||
48 | /* Setup initial (reset) machine state */ | |
49 | cpu->env->regs[15] = PXA2XX_SDRAM_BASE; | |
50 | ||
e4bcb14c TS |
51 | /* There are two 32MiB flash devices on the board */ |
52 | index = drive_get_index(IF_PFLASH, 0, 0); | |
53 | if (index == -1) { | |
54 | fprintf(stderr, "Two flash images must be given with the " | |
55 | "'pflash' parameter\n"); | |
56 | exit(1); | |
57 | } | |
58 | if (!pflash_register(MST_FLASH_0, mainstone_ram + PXA2XX_INTERNAL_SIZE, | |
59 | drives_table[index].bdrv, | |
60 | 256 * 1024, 128, 4, 0, 0, 0, 0)) { | |
61 | fprintf(stderr, "qemu: Error registering flash memory.\n"); | |
62 | exit(1); | |
63 | } | |
7233b355 | 64 | |
e4bcb14c TS |
65 | index = drive_get_index(IF_PFLASH, 0, 1); |
66 | if (index == -1) { | |
67 | fprintf(stderr, "Two flash images must be given with the " | |
68 | "'pflash' parameter\n"); | |
69 | exit(1); | |
70 | } | |
71 | if (!pflash_register(MST_FLASH_1, mainstone_ram + PXA2XX_INTERNAL_SIZE, | |
72 | drives_table[index].bdrv, | |
73 | 256 * 1024, 128, 4, 0, 0, 0, 0)) { | |
74 | fprintf(stderr, "qemu: Error registering flash memory.\n"); | |
75 | exit(1); | |
76 | } | |
7233b355 TS |
77 | |
78 | mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0); | |
ef056e43 AZ |
79 | smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]); |
80 | ||
81 | arm_load_kernel(cpu->env, mainstone_ram, kernel_filename, kernel_cmdline, | |
82 | initrd_filename, arm_id, PXA2XX_SDRAM_BASE); | |
83 | } | |
84 | ||
85 | static void mainstone_init(int ram_size, int vga_ram_size, | |
86 | const char *boot_device, DisplayState *ds, | |
87 | const char *kernel_filename, const char *kernel_cmdline, | |
88 | const char *initrd_filename, const char *cpu_model) | |
89 | { | |
90 | mainstone_common_init(ram_size, vga_ram_size, ds, kernel_filename, | |
91 | kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196); | |
92 | } | |
93 | ||
94 | QEMUMachine mainstone2_machine = { | |
95 | "mainstone", | |
96 | "Mainstone II (PXA27x)", | |
97 | mainstone_init, | |
98 | }; |