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Commit | Line | Data |
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d94e7434 PC |
1 | /* |
2 | * Microblaze kernel loader | |
3 | * | |
4 | * Copyright (c) 2012 Peter Crosthwaite <peter.crosthwaite@petalogix.com> | |
5 | * Copyright (c) 2012 PetaLogix | |
6 | * Copyright (c) 2009 Edgar E. Iglesias. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | */ | |
26 | ||
8fd9dece | 27 | #include "qemu/osdep.h" |
4771d756 PB |
28 | #include "qemu-common.h" |
29 | #include "cpu.h" | |
1de7afc9 PB |
30 | #include "qemu/option.h" |
31 | #include "qemu/config-file.h" | |
ec426ff8 | 32 | #include "qemu/error-report.h" |
9c17d615 | 33 | #include "sysemu/device_tree.h" |
71e8a915 | 34 | #include "sysemu/reset.h" |
7bccd940 | 35 | #include "sysemu/sysemu.h" |
83c9f4ca | 36 | #include "hw/loader.h" |
d94e7434 | 37 | #include "elf.h" |
f348b6d1 | 38 | #include "qemu/cutils.h" |
d94e7434 | 39 | |
47b43a1f | 40 | #include "boot.h" |
d94e7434 PC |
41 | |
42 | static struct | |
43 | { | |
bf494367 | 44 | void (*machine_cpu_reset)(MicroBlazeCPU *); |
d94e7434 PC |
45 | uint32_t bootstrap_pc; |
46 | uint32_t cmdline; | |
ec426ff8 EI |
47 | uint32_t initrd_start; |
48 | uint32_t initrd_end; | |
d94e7434 PC |
49 | uint32_t fdt; |
50 | } boot_info; | |
51 | ||
52 | static void main_cpu_reset(void *opaque) | |
53 | { | |
bf494367 | 54 | MicroBlazeCPU *cpu = opaque; |
691b9572 | 55 | CPUState *cs = CPU(cpu); |
bf494367 | 56 | CPUMBState *env = &cpu->env; |
d94e7434 | 57 | |
691b9572 | 58 | cpu_reset(cs); |
d94e7434 | 59 | env->regs[5] = boot_info.cmdline; |
ec426ff8 | 60 | env->regs[6] = boot_info.initrd_start; |
d94e7434 | 61 | env->regs[7] = boot_info.fdt; |
691b9572 | 62 | cpu_set_pc(cs, boot_info.bootstrap_pc); |
d94e7434 | 63 | if (boot_info.machine_cpu_reset) { |
bf494367 | 64 | boot_info.machine_cpu_reset(cpu); |
d94e7434 PC |
65 | } |
66 | } | |
67 | ||
a8170e5e | 68 | static int microblaze_load_dtb(hwaddr addr, |
d0b022a0 | 69 | uint32_t ramsize, |
ec426ff8 EI |
70 | uint32_t initrd_start, |
71 | uint32_t initrd_end, | |
d0b022a0 EI |
72 | const char *kernel_cmdline, |
73 | const char *dtb_filename) | |
d94e7434 | 74 | { |
d94e7434 | 75 | int fdt_size; |
da71ebd1 | 76 | void *fdt = NULL; |
d94e7434 PC |
77 | int r; |
78 | ||
da71ebd1 PC |
79 | if (dtb_filename) { |
80 | fdt = load_device_tree(dtb_filename, &fdt_size); | |
81 | } | |
d94e7434 | 82 | if (!fdt) { |
da71ebd1 | 83 | return 0; |
d94e7434 PC |
84 | } |
85 | ||
86 | if (kernel_cmdline) { | |
5a4348d1 PC |
87 | r = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", |
88 | kernel_cmdline); | |
d94e7434 PC |
89 | if (r < 0) { |
90 | fprintf(stderr, "couldn't set /chosen/bootargs\n"); | |
91 | } | |
92 | } | |
93 | ||
ec426ff8 | 94 | if (initrd_start) { |
5a4348d1 PC |
95 | qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", |
96 | initrd_start); | |
ec426ff8 | 97 | |
5a4348d1 PC |
98 | qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", |
99 | initrd_end); | |
ec426ff8 EI |
100 | } |
101 | ||
e1fe50dc | 102 | cpu_physical_memory_write(addr, fdt, fdt_size); |
100781a8 | 103 | g_free(fdt); |
d94e7434 PC |
104 | return fdt_size; |
105 | } | |
106 | ||
107 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) | |
108 | { | |
109 | return addr - 0x30000000LL; | |
110 | } | |
111 | ||
a8170e5e | 112 | void microblaze_load_kernel(MicroBlazeCPU *cpu, hwaddr ddr_base, |
ec426ff8 EI |
113 | uint32_t ramsize, |
114 | const char *initrd_filename, | |
115 | const char *dtb_filename, | |
bf494367 | 116 | void (*machine_cpu_reset)(MicroBlazeCPU *)) |
d94e7434 | 117 | { |
d94e7434 | 118 | QemuOpts *machine_opts; |
7bccd940 MA |
119 | const char *kernel_filename; |
120 | const char *kernel_cmdline; | |
121 | const char *dtb_arg; | |
4d850406 | 122 | char *filename = NULL; |
7bccd940 MA |
123 | |
124 | machine_opts = qemu_get_machine_opts(); | |
125 | kernel_filename = qemu_opt_get(machine_opts, "kernel"); | |
126 | kernel_cmdline = qemu_opt_get(machine_opts, "append"); | |
127 | dtb_arg = qemu_opt_get(machine_opts, "dtb"); | |
4d850406 | 128 | /* default to pcbios dtb as passed by machine_init */ |
d4c6d360 | 129 | if (!dtb_arg && dtb_filename) { |
4d850406 | 130 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, dtb_filename); |
d94e7434 PC |
131 | } |
132 | ||
133 | boot_info.machine_cpu_reset = machine_cpu_reset; | |
bf494367 | 134 | qemu_register_reset(main_cpu_reset, cpu); |
d94e7434 PC |
135 | |
136 | if (kernel_filename) { | |
137 | int kernel_size; | |
138 | uint64_t entry, low, high; | |
139 | uint32_t base32; | |
140 | int big_endian = 0; | |
141 | ||
142 | #ifdef TARGET_WORDS_BIGENDIAN | |
143 | big_endian = 1; | |
144 | #endif | |
145 | ||
146 | /* Boots a kernel elf binary. */ | |
4366e1db | 147 | kernel_size = load_elf(kernel_filename, NULL, NULL, NULL, |
d94e7434 | 148 | &entry, &low, &high, |
7ef295ea | 149 | big_endian, EM_MICROBLAZE, 0, 0); |
d94e7434 PC |
150 | base32 = entry; |
151 | if (base32 == 0xc0000000) { | |
4366e1db LM |
152 | kernel_size = load_elf(kernel_filename, NULL, |
153 | translate_kernel_address, NULL, | |
154 | &entry, NULL, NULL, | |
7ef295ea | 155 | big_endian, EM_MICROBLAZE, 0, 0); |
d94e7434 PC |
156 | } |
157 | /* Always boot into physical ram. */ | |
e5bfd640 | 158 | boot_info.bootstrap_pc = (uint32_t)entry; |
d94e7434 PC |
159 | |
160 | /* If it wasn't an ELF image, try an u-boot image. */ | |
161 | if (kernel_size < 0) { | |
f831f955 | 162 | hwaddr uentry, loadaddr = LOAD_UIMAGE_LOADADDR_INVALID; |
d94e7434 | 163 | |
25bda50a MF |
164 | kernel_size = load_uimage(kernel_filename, &uentry, &loadaddr, 0, |
165 | NULL, NULL); | |
d94e7434 PC |
166 | boot_info.bootstrap_pc = uentry; |
167 | high = (loadaddr + kernel_size + 3) & ~3; | |
168 | } | |
169 | ||
170 | /* Not an ELF image nor an u-boot image, try a RAW image. */ | |
171 | if (kernel_size < 0) { | |
172 | kernel_size = load_image_targphys(kernel_filename, ddr_base, | |
173 | ram_size); | |
174 | boot_info.bootstrap_pc = ddr_base; | |
175 | high = (ddr_base + kernel_size + 3) & ~3; | |
176 | } | |
177 | ||
ec426ff8 EI |
178 | if (initrd_filename) { |
179 | int initrd_size; | |
180 | uint32_t initrd_offset; | |
181 | ||
182 | high = ROUND_UP(high + kernel_size, 4); | |
183 | boot_info.initrd_start = high; | |
184 | initrd_offset = boot_info.initrd_start - ddr_base; | |
1b939d92 EI |
185 | |
186 | initrd_size = load_ramdisk(initrd_filename, | |
187 | boot_info.initrd_start, | |
188 | ram_size - initrd_offset); | |
189 | if (initrd_size < 0) { | |
190 | initrd_size = load_image_targphys(initrd_filename, | |
191 | boot_info.initrd_start, | |
192 | ram_size - initrd_offset); | |
193 | } | |
ec426ff8 | 194 | if (initrd_size < 0) { |
d0e31a10 | 195 | error_report("could not load initrd '%s'", |
ec426ff8 EI |
196 | initrd_filename); |
197 | exit(EXIT_FAILURE); | |
198 | } | |
199 | boot_info.initrd_end = boot_info.initrd_start + initrd_size; | |
200 | high = ROUND_UP(high + initrd_size, 4); | |
201 | } | |
202 | ||
d94e7434 PC |
203 | boot_info.cmdline = high + 4096; |
204 | if (kernel_cmdline && strlen(kernel_cmdline)) { | |
205 | pstrcpy_targphys("cmdline", boot_info.cmdline, 256, kernel_cmdline); | |
206 | } | |
207 | /* Provide a device-tree. */ | |
208 | boot_info.fdt = boot_info.cmdline + 4096; | |
d0b022a0 | 209 | microblaze_load_dtb(boot_info.fdt, ram_size, |
ec426ff8 EI |
210 | boot_info.initrd_start, |
211 | boot_info.initrd_end, | |
d0b022a0 | 212 | kernel_cmdline, |
4d850406 GA |
213 | /* Preference a -dtb argument */ |
214 | dtb_arg ? dtb_arg : filename); | |
d94e7434 | 215 | } |
4d850406 | 216 | g_free(filename); |
d94e7434 | 217 | } |