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CommitLineData
6a8b1ae2
EI
1/*
2 * Model of Petalogix linux reference design targeting Xilinx Spartan 3ADSP-1800
3 * boards.
4 *
5 * Copyright (c) 2009 Edgar E. Iglesias.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
8fd9dece 26#include "qemu/osdep.h"
da34e65c 27#include "qapi/error.h"
83c9f4ca
PB
28#include "hw/sysbus.h"
29#include "hw/hw.h"
1422e32d 30#include "net/net.h"
0d09e41a 31#include "hw/block/flash.h"
9c17d615 32#include "sysemu/sysemu.h"
bd2be150 33#include "hw/devices.h"
83c9f4ca 34#include "hw/boards.h"
fa1d36df 35#include "sysemu/block-backend.h"
022c62cb 36#include "exec/address-spaces.h"
6a8b1ae2 37
47b43a1f 38#include "boot.h"
b861b741 39
6a8b1ae2
EI
40#define LMB_BRAM_SIZE (128 * 1024)
41#define FLASH_SIZE (16 * 1024 * 1024)
42
6a8b1ae2 43#define BINARY_DEVICE_TREE_FILE "petalogix-s3adsp1800.dtb"
409dbce5 44
cba1fd36
PC
45#define MEMORY_BASEADDR 0x90000000
46#define FLASH_BASEADDR 0xa0000000
47#define INTC_BASEADDR 0x81800000
48#define TIMER_BASEADDR 0x83c00000
49#define UARTLITE_BASEADDR 0x84000000
50#define ETHLITE_BASEADDR 0x81000000
51
05a738c4
PC
52#define TIMER_IRQ 0
53#define ETHLITE_IRQ 1
54#define UARTLITE_IRQ 3
55
6a8b1ae2 56static void
3ef96221 57petalogix_s3adsp1800_init(MachineState *machine)
6a8b1ae2 58{
3ef96221 59 ram_addr_t ram_size = machine->ram_size;
6a8b1ae2 60 DeviceState *dev;
3ed60733 61 MicroBlazeCPU *cpu;
751c6a17 62 DriveInfo *dinfo;
6a8b1ae2 63 int i;
a8170e5e 64 hwaddr ddr_base = MEMORY_BASEADDR;
589f0aad
AK
65 MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
66 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
73c69456 67 qemu_irq irq[32];
589f0aad 68 MemoryRegion *sysmem = get_system_memory();
6a8b1ae2 69
d87636b1 70 cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
ad24f947 71 object_property_set_str(OBJECT(cpu), "7.10.d", "version", &error_abort);
d87636b1 72 object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
6a8b1ae2 73
6a8b1ae2 74 /* Attach emulated BRAM through the LMB. */
2c9b15ca 75 memory_region_init_ram(phys_lmb_bram, NULL,
49946538 76 "petalogix_s3adsp1800.lmb_bram", LMB_BRAM_SIZE,
f8ed85ac 77 &error_fatal);
c5705a77 78 vmstate_register_ram_global(phys_lmb_bram);
589f0aad 79 memory_region_add_subregion(sysmem, 0x00000000, phys_lmb_bram);
6a8b1ae2 80
49946538 81 memory_region_init_ram(phys_ram, NULL, "petalogix_s3adsp1800.ram",
f8ed85ac 82 ram_size, &error_fatal);
c5705a77 83 vmstate_register_ram_global(phys_ram);
589f0aad 84 memory_region_add_subregion(sysmem, ddr_base, phys_ram);
6a8b1ae2 85
751c6a17 86 dinfo = drive_get(IF_PFLASH, 0, 0);
cba1fd36 87 pflash_cfi01_register(FLASH_BASEADDR,
cfe5f011 88 NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE,
4be74634 89 dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
fa1d36df 90 (64 * 1024), FLASH_SIZE >> 16,
01e0451a 91 1, 0x89, 0x18, 0x0000, 0x0, 1);
6a8b1ae2 92
13c9bfbf
PC
93 dev = qdev_create(NULL, "xlnx.xps-intc");
94 qdev_prop_set_uint32(dev, "kind-of-intr",
95 1 << ETHLITE_IRQ | 1 << UARTLITE_IRQ);
96 qdev_init_nofail(dev);
97 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, INTC_BASEADDR);
98 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
99 qdev_get_gpio_in(DEVICE(cpu), MB_CPU_IRQ));
6a8b1ae2
EI
100 for (i = 0; i < 32; i++) {
101 irq[i] = qdev_get_gpio_in(dev, i);
102 }
103
05a738c4
PC
104 sysbus_create_simple("xlnx.xps-uartlite", UARTLITE_BASEADDR,
105 irq[UARTLITE_IRQ]);
29873712 106
6a8b1ae2 107 /* 2 timers at irq 2 @ 62 Mhz. */
29873712
PC
108 dev = qdev_create(NULL, "xlnx.xps-timer");
109 qdev_prop_set_uint32(dev, "one-timer-only", 0);
110 qdev_prop_set_uint32(dev, "clock-frequency", 62 * 1000000);
111 qdev_init_nofail(dev);
112 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, TIMER_BASEADDR);
113 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[TIMER_IRQ]);
114
b8d4e1c4
PC
115 qemu_check_nic_model(&nd_table[0], "xlnx.xps-ethernetlite");
116 dev = qdev_create(NULL, "xlnx.xps-ethernetlite");
117 qdev_set_nic_properties(dev, &nd_table[0]);
118 qdev_prop_set_uint32(dev, "tx-ping-pong", 0);
119 qdev_prop_set_uint32(dev, "rx-ping-pong", 0);
120 qdev_init_nofail(dev);
121 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, ETHLITE_BASEADDR);
122 sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, irq[ETHLITE_IRQ]);
6a8b1ae2 123
bf494367 124 microblaze_load_kernel(cpu, ddr_base, ram_size,
3ef96221 125 machine->initrd_filename,
ec426ff8 126 BINARY_DEVICE_TREE_FILE,
033af8e9 127 NULL);
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EI
128}
129
e264d29d 130static void petalogix_s3adsp1800_machine_init(MachineClass *mc)
6a8b1ae2 131{
e264d29d
EH
132 mc->desc = "PetaLogix linux refdesign for xilinx Spartan 3ADSP1800";
133 mc->init = petalogix_s3adsp1800_init;
134 mc->is_default = 1;
6a8b1ae2
EI
135}
136
e264d29d 137DEFINE_MACHINE("petalogix-s3adsp1800", petalogix_s3adsp1800_machine_init)