]>
Commit | Line | Data |
---|---|---|
051c190b HC |
1 | /* |
2 | * QEMU fulong 2e mini pc support | |
3 | * | |
4 | * Copyright (c) 2008 yajin (yajin@vm-kernel.org) | |
5 | * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) | |
6 | * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) | |
7 | * This code is licensed under the GNU GPL v2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
051c190b HC |
11 | */ |
12 | ||
13 | /* | |
14 | * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz) | |
15 | * http://www.linux-mips.org/wiki/Fulong | |
16 | * | |
17 | * Loongson 2e user manual: | |
18 | * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf | |
19 | */ | |
20 | ||
c684822a | 21 | #include "qemu/osdep.h" |
be01029e | 22 | #include "qemu/units.h" |
da34e65c | 23 | #include "qapi/error.h" |
83c9f4ca | 24 | #include "hw/hw.h" |
0d09e41a | 25 | #include "hw/i386/pc.h" |
55f613ac | 26 | #include "hw/dma/i8257.h" |
98cf824b | 27 | #include "hw/isa/superio.h" |
1422e32d | 28 | #include "net/net.h" |
83c9f4ca | 29 | #include "hw/boards.h" |
0d09e41a | 30 | #include "hw/i2c/smbus.h" |
0d09e41a PB |
31 | #include "hw/block/flash.h" |
32 | #include "hw/mips/mips.h" | |
33 | #include "hw/mips/cpudevs.h" | |
83c9f4ca | 34 | #include "hw/pci/pci.h" |
051c190b | 35 | #include "audio/audio.h" |
1de7afc9 | 36 | #include "qemu/log.h" |
83c9f4ca | 37 | #include "hw/loader.h" |
0d09e41a | 38 | #include "hw/mips/bios.h" |
83c9f4ca | 39 | #include "hw/ide.h" |
051c190b | 40 | #include "elf.h" |
0d09e41a PB |
41 | #include "hw/isa/vt82c686.h" |
42 | #include "hw/timer/mc146818rtc.h" | |
43 | #include "hw/timer/i8254.h" | |
022c62cb | 44 | #include "exec/address-spaces.h" |
4a7ed999 | 45 | #include "sysemu/qtest.h" |
2e985fe0 | 46 | #include "qemu/error-report.h" |
051c190b HC |
47 | |
48 | #define DEBUG_FULONG2E_INIT | |
49 | ||
50 | #define ENVP_ADDR 0x80002000l | |
51 | #define ENVP_NB_ENTRIES 16 | |
52 | #define ENVP_ENTRY_SIZE 256 | |
53 | ||
54 | #define MAX_IDE_BUS 2 | |
55 | ||
56 | /* | |
57 | * PMON is not part of qemu and released with BSD license, anyone | |
58 | * who want to build a pmon binary please first git-clone the source | |
59 | * from the git repository at: | |
60 | * http://www.loongson.cn/support/git/pmon | |
61 | * Then follow the "Compile Guide" available at: | |
62 | * http://dev.lemote.com/code/pmon | |
63 | * | |
64 | * Notes: | |
65 | * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git | |
66 | * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware" | |
67 | * in the "Compile Guide". | |
68 | */ | |
69 | #define FULONG_BIOSNAME "pmon_fulong2e.bin" | |
70 | ||
71 | /* PCI SLOT in fulong 2e */ | |
72 | #define FULONG2E_VIA_SLOT 5 | |
73 | #define FULONG2E_ATI_SLOT 6 | |
74 | #define FULONG2E_RTL8139_SLOT 7 | |
75 | ||
051c190b HC |
76 | static struct _loaderparams { |
77 | int ram_size; | |
78 | const char *kernel_filename; | |
79 | const char *kernel_cmdline; | |
80 | const char *initrd_filename; | |
81 | } loaderparams; | |
82 | ||
8b7968f7 SW |
83 | static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index, |
84 | const char *string, ...) | |
051c190b HC |
85 | { |
86 | va_list ap; | |
87 | int32_t table_addr; | |
88 | ||
89 | if (index >= ENVP_NB_ENTRIES) | |
90 | return; | |
91 | ||
92 | if (string == NULL) { | |
93 | prom_buf[index] = 0; | |
94 | return; | |
95 | } | |
96 | ||
97 | table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE; | |
98 | prom_buf[index] = tswap32(ENVP_ADDR + table_addr); | |
99 | ||
100 | va_start(ap, string); | |
101 | vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap); | |
102 | va_end(ap); | |
103 | } | |
104 | ||
61c56c8c | 105 | static int64_t load_kernel (CPUMIPSState *env) |
051c190b | 106 | { |
f3839fda | 107 | int64_t kernel_entry, kernel_low, kernel_high, initrd_size; |
051c190b | 108 | int index = 0; |
f3839fda | 109 | long kernel_size; |
051c190b HC |
110 | ram_addr_t initrd_offset; |
111 | uint32_t *prom_buf; | |
112 | long prom_size; | |
113 | ||
3ee3122c AJ |
114 | kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, |
115 | NULL, (uint64_t *)&kernel_entry, | |
116 | (uint64_t *)&kernel_low, (uint64_t *)&kernel_high, | |
117 | 0, EM_MIPS, 1, 0); | |
118 | if (kernel_size < 0) { | |
bd6e1d81 | 119 | error_report("could not load kernel '%s': %s", |
3ee3122c AJ |
120 | loaderparams.kernel_filename, |
121 | load_elf_strerror(kernel_size)); | |
051c190b HC |
122 | exit(1); |
123 | } | |
124 | ||
125 | /* load initrd */ | |
126 | initrd_size = 0; | |
127 | initrd_offset = 0; | |
128 | if (loaderparams.initrd_filename) { | |
129 | initrd_size = get_image_size (loaderparams.initrd_filename); | |
130 | if (initrd_size > 0) { | |
05b3274b | 131 | initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; |
051c190b | 132 | if (initrd_offset + initrd_size > ram_size) { |
bd6e1d81 AF |
133 | error_report("memory too small for initial ram disk '%s'", |
134 | loaderparams.initrd_filename); | |
051c190b HC |
135 | exit(1); |
136 | } | |
137 | initrd_size = load_image_targphys(loaderparams.initrd_filename, | |
138 | initrd_offset, ram_size - initrd_offset); | |
139 | } | |
140 | if (initrd_size == (target_ulong) -1) { | |
bd6e1d81 AF |
141 | error_report("could not load initial ram disk '%s'", |
142 | loaderparams.initrd_filename); | |
051c190b HC |
143 | exit(1); |
144 | } | |
145 | } | |
146 | ||
147 | /* Setup prom parameters. */ | |
148 | prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); | |
7267c094 | 149 | prom_buf = g_malloc(prom_size); |
051c190b | 150 | |
1ed1139d | 151 | prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename); |
051c190b | 152 | if (initrd_size > 0) { |
f3839fda | 153 | prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", |
051c190b HC |
154 | cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size, |
155 | loaderparams.kernel_cmdline); | |
156 | } else { | |
1ed1139d | 157 | prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline); |
051c190b HC |
158 | } |
159 | ||
160 | /* Setup minimum environment variables */ | |
161 | prom_set(prom_buf, index++, "busclock=33000000"); | |
162 | prom_set(prom_buf, index++, "cpuclock=100000000"); | |
be01029e | 163 | prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB); |
051c190b HC |
164 | prom_set(prom_buf, index++, "modetty0=38400n8r"); |
165 | prom_set(prom_buf, index++, NULL); | |
166 | ||
167 | rom_add_blob_fixed("prom", prom_buf, prom_size, | |
168 | cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR)); | |
169 | ||
3ad9fd5a | 170 | g_free(prom_buf); |
051c190b HC |
171 | return kernel_entry; |
172 | } | |
173 | ||
61c56c8c | 174 | static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr) |
051c190b HC |
175 | { |
176 | uint32_t *p; | |
177 | ||
178 | /* Small bootloader */ | |
179 | p = (uint32_t *) base; | |
180 | ||
0983979b PB |
181 | stl_p(p++, 0x0bf00010); /* j 0x1fc00040 */ |
182 | stl_p(p++, 0x00000000); /* nop */ | |
051c190b HC |
183 | |
184 | /* Second part of the bootloader */ | |
185 | p = (uint32_t *) (base + 0x040); | |
186 | ||
0983979b PB |
187 | stl_p(p++, 0x3c040000); /* lui a0, 0 */ |
188 | stl_p(p++, 0x34840002); /* ori a0, a0, 2 */ | |
189 | stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */ | |
190 | stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */ | |
191 | stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */ | |
192 | stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */ | |
193 | stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */ | |
194 | stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */ | |
195 | stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */; | |
196 | stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */ | |
197 | stl_p(p++, 0x03e00008); /* jr ra */ | |
198 | stl_p(p++, 0x00000000); /* nop */ | |
051c190b HC |
199 | } |
200 | ||
201 | ||
202 | static void main_cpu_reset(void *opaque) | |
203 | { | |
800cf598 AF |
204 | MIPSCPU *cpu = opaque; |
205 | CPUMIPSState *env = &cpu->env; | |
051c190b | 206 | |
800cf598 | 207 | cpu_reset(CPU(cpu)); |
051c190b HC |
208 | /* TODO: 2E reset stuff */ |
209 | if (loaderparams.kernel_filename) { | |
210 | env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); | |
211 | } | |
212 | } | |
213 | ||
f73cdbc6 | 214 | static const uint8_t eeprom_spd[0x80] = { |
051c190b HC |
215 | 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70, |
216 | 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01, | |
217 | 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50, | |
218 | 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00, | |
219 | 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00, | |
220 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
221 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
222 | 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00, | |
223 | 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32, | |
224 | 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42, | |
225 | 0x20,0x30,0x20 | |
226 | }; | |
227 | ||
5c961c3f PMD |
228 | static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc, |
229 | I2CBus **i2c_bus, ISABus **p_isa_bus) | |
051c190b | 230 | { |
5c961c3f PMD |
231 | qemu_irq *i8259; |
232 | ISABus *isa_bus; | |
233 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; | |
234 | ||
728d8910 | 235 | isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0)); |
5c961c3f PMD |
236 | if (!isa_bus) { |
237 | fprintf(stderr, "vt82c686b_init error\n"); | |
238 | exit(1); | |
239 | } | |
240 | *p_isa_bus = isa_bus; | |
241 | /* Interrupt controller */ | |
242 | /* The 8259 -> IP5 */ | |
243 | i8259 = i8259_init(isa_bus, intc); | |
244 | isa_bus_irqs(isa_bus, i8259); | |
245 | /* init other devices */ | |
246 | i8254_pit_init(isa_bus, 0x40, 0, NULL); | |
247 | i8257_dma_init(isa_bus, 0); | |
98cf824b PMD |
248 | /* Super I/O */ |
249 | isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO); | |
5c961c3f PMD |
250 | |
251 | ide_drive_get(hd, ARRAY_SIZE(hd)); | |
252 | vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1)); | |
253 | ||
254 | pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci"); | |
255 | pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci"); | |
256 | ||
257 | *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL); | |
258 | ||
259 | /* Audio support */ | |
260 | vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5)); | |
261 | vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6)); | |
051c190b | 262 | } |
051c190b HC |
263 | |
264 | /* Network support */ | |
29b358f9 | 265 | static void network_init (PCIBus *pci_bus) |
051c190b HC |
266 | { |
267 | int i; | |
268 | ||
269 | for(i = 0; i < nb_nics; i++) { | |
270 | NICInfo *nd = &nd_table[i]; | |
271 | const char *default_devaddr = NULL; | |
272 | ||
273 | if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) { | |
274 | /* The fulong board has a RTL8139 card using PCI SLOT 7 */ | |
275 | default_devaddr = "07"; | |
276 | } | |
277 | ||
29b358f9 | 278 | pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr); |
051c190b HC |
279 | } |
280 | } | |
281 | ||
3ef96221 | 282 | static void mips_fulong2e_init(MachineState *machine) |
051c190b | 283 | { |
3ef96221 | 284 | ram_addr_t ram_size = machine->ram_size; |
3ef96221 MA |
285 | const char *kernel_filename = machine->kernel_filename; |
286 | const char *kernel_cmdline = machine->kernel_cmdline; | |
287 | const char *initrd_filename = machine->initrd_filename; | |
051c190b | 288 | char *filename; |
13faf2a7 AK |
289 | MemoryRegion *address_space_mem = get_system_memory(); |
290 | MemoryRegion *ram = g_new(MemoryRegion, 1); | |
291 | MemoryRegion *bios = g_new(MemoryRegion, 1); | |
093209cd | 292 | long bios_size; |
051c190b | 293 | int64_t kernel_entry; |
051c190b | 294 | PCIBus *pci_bus; |
48a18b3c | 295 | ISABus *isa_bus; |
a5c82852 | 296 | I2CBus *smbus; |
f0f80366 | 297 | MIPSCPU *cpu; |
61c56c8c | 298 | CPUMIPSState *env; |
051c190b HC |
299 | |
300 | /* init CPUs */ | |
e5207b76 | 301 | cpu = MIPS_CPU(cpu_create(machine->cpu_type)); |
f0f80366 | 302 | env = &cpu->env; |
051c190b | 303 | |
800cf598 | 304 | qemu_register_reset(main_cpu_reset, cpu); |
051c190b HC |
305 | |
306 | /* fulong 2e has 256M ram. */ | |
be01029e | 307 | ram_size = 256 * MiB; |
051c190b HC |
308 | |
309 | /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */ | |
be01029e | 310 | bios_size = 1 * MiB; |
051c190b HC |
311 | |
312 | /* allocate RAM */ | |
6a926fbc | 313 | memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size); |
98a99ce0 | 314 | memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size, |
f8ed85ac | 315 | &error_fatal); |
13faf2a7 | 316 | memory_region_set_readonly(bios, true); |
051c190b | 317 | |
13faf2a7 AK |
318 | memory_region_add_subregion(address_space_mem, 0, ram); |
319 | memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); | |
051c190b HC |
320 | |
321 | /* We do not support flash operation, just loading pmon.bin as raw BIOS. | |
322 | * Please use -L to set the BIOS path and -bios to set bios name. */ | |
323 | ||
324 | if (kernel_filename) { | |
325 | loaderparams.ram_size = ram_size; | |
326 | loaderparams.kernel_filename = kernel_filename; | |
327 | loaderparams.kernel_cmdline = kernel_cmdline; | |
328 | loaderparams.initrd_filename = initrd_filename; | |
329 | kernel_entry = load_kernel (env); | |
13faf2a7 | 330 | write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); |
051c190b | 331 | } else { |
33dd2983 AJ |
332 | if (bios_name == NULL) { |
333 | bios_name = FULONG_BIOSNAME; | |
051c190b HC |
334 | } |
335 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); | |
336 | if (filename) { | |
337 | bios_size = load_image_targphys(filename, 0x1fc00000LL, | |
338 | BIOS_SIZE); | |
7267c094 | 339 | g_free(filename); |
051c190b HC |
340 | } else { |
341 | bios_size = -1; | |
342 | } | |
343 | ||
4a7ed999 AF |
344 | if ((bios_size < 0 || bios_size > BIOS_SIZE) && |
345 | !kernel_filename && !qtest_enabled()) { | |
2e985fe0 AJ |
346 | error_report("Could not load MIPS bios '%s'", bios_name); |
347 | exit(1); | |
33dd2983 | 348 | } |
051c190b HC |
349 | } |
350 | ||
351 | /* Init internal devices */ | |
5a975d43 PB |
352 | cpu_mips_irq_init_cpu(cpu); |
353 | cpu_mips_clock_init(cpu); | |
051c190b | 354 | |
051c190b HC |
355 | /* North bridge, Bonito --> IP2 */ |
356 | pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); | |
357 | ||
5c961c3f PMD |
358 | /* South bridge -> IP5 */ |
359 | vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5], | |
360 | &smbus, &isa_bus); | |
051c190b | 361 | |
051c190b | 362 | /* TODO: Populate SPD eeprom data. */ |
a88df0b9 | 363 | smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd)); |
051c190b | 364 | |
6c646a11 | 365 | mc146818_rtc_init(isa_bus, 2000, NULL); |
051c190b | 366 | |
5c961c3f | 367 | /* Network card: RTL8139D */ |
29b358f9 | 368 | network_init(pci_bus); |
051c190b HC |
369 | } |
370 | ||
e264d29d | 371 | static void mips_fulong2e_machine_init(MachineClass *mc) |
051c190b | 372 | { |
e264d29d EH |
373 | mc->desc = "Fulong 2e mini pc"; |
374 | mc->init = mips_fulong2e_init; | |
2059839b | 375 | mc->block_default_type = IF_IDE; |
e5207b76 | 376 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E"); |
051c190b HC |
377 | } |
378 | ||
e264d29d | 379 | DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init) |