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Commit | Line | Data |
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e16fe40c TS |
1 | /* |
2 | * QEMU/MIPS pseudo-board | |
3 | * | |
4 | * emulates a simple machine with ISA-like bus. | |
5 | * ISA IO space mapped to the 0x14000000 (PHYS) and | |
6 | * ISA memory at the 0x10000000 (PHYS, 16Mb in size). | |
7 | * All peripherial devices are attached to this "bus" with | |
8 | * the standard PC ISA addresses. | |
9 | */ | |
c684822a | 10 | #include "qemu/osdep.h" |
be01029e | 11 | #include "qemu/units.h" |
da34e65c | 12 | #include "qapi/error.h" |
4771d756 PB |
13 | #include "qemu-common.h" |
14 | #include "cpu.h" | |
83c9f4ca | 15 | #include "hw/hw.h" |
0d09e41a PB |
16 | #include "hw/mips/mips.h" |
17 | #include "hw/mips/cpudevs.h" | |
18 | #include "hw/i386/pc.h" | |
19 | #include "hw/char/serial.h" | |
20 | #include "hw/isa/isa.h" | |
1422e32d | 21 | #include "net/net.h" |
489983d6 | 22 | #include "hw/net/ne2000-isa.h" |
9c17d615 | 23 | #include "sysemu/sysemu.h" |
83c9f4ca | 24 | #include "hw/boards.h" |
0d09e41a | 25 | #include "hw/block/flash.h" |
1de7afc9 | 26 | #include "qemu/log.h" |
0d09e41a | 27 | #include "hw/mips/bios.h" |
83c9f4ca PB |
28 | #include "hw/ide.h" |
29 | #include "hw/loader.h" | |
ca20cf32 | 30 | #include "elf.h" |
0d09e41a | 31 | #include "hw/timer/mc146818rtc.h" |
47973a2d | 32 | #include "hw/input/i8042.h" |
0d09e41a | 33 | #include "hw/timer/i8254.h" |
022c62cb | 34 | #include "exec/address-spaces.h" |
c9dd6a9f | 35 | #include "sysemu/qtest.h" |
3ee3122c | 36 | #include "qemu/error-report.h" |
44cbbf18 | 37 | |
e4bcb14c TS |
38 | #define MAX_IDE_BUS 2 |
39 | ||
58126404 PB |
40 | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
41 | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; | |
42 | static const int ide_irq[2] = { 14, 15 }; | |
43 | ||
64d7e9a4 | 44 | static ISADevice *pit; /* PIT i8254 */ |
697584ab | 45 | |
1b66074b | 46 | /* i8254 PIT is attached to the IRQ0 at PIC i8259 */ |
6af0bf9c | 47 | |
7df526e3 TS |
48 | static struct _loaderparams { |
49 | int ram_size; | |
50 | const char *kernel_filename; | |
51 | const char *kernel_cmdline; | |
52 | const char *initrd_filename; | |
53 | } loaderparams; | |
54 | ||
a8170e5e | 55 | static void mips_qemu_write (void *opaque, hwaddr addr, |
0ae16450 | 56 | uint64_t val, unsigned size) |
6ae81775 TS |
57 | { |
58 | if ((addr & 0xffff) == 0 && val == 42) | |
cf83f140 | 59 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
6ae81775 | 60 | else if ((addr & 0xffff) == 4 && val == 42) |
cf83f140 | 61 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
6ae81775 TS |
62 | } |
63 | ||
a8170e5e | 64 | static uint64_t mips_qemu_read (void *opaque, hwaddr addr, |
0ae16450 | 65 | unsigned size) |
6ae81775 TS |
66 | { |
67 | return 0; | |
68 | } | |
69 | ||
0ae16450 AK |
70 | static const MemoryRegionOps mips_qemu_ops = { |
71 | .read = mips_qemu_read, | |
72 | .write = mips_qemu_write, | |
73 | .endianness = DEVICE_NATIVE_ENDIAN, | |
6ae81775 TS |
74 | }; |
75 | ||
e16ad5b0 | 76 | typedef struct ResetData { |
fa156e51 | 77 | MIPSCPU *cpu; |
e16ad5b0 AJ |
78 | uint64_t vector; |
79 | } ResetData; | |
80 | ||
81 | static int64_t load_kernel(void) | |
6ae81775 | 82 | { |
27773d8e | 83 | const size_t params_size = 264; |
f3839fda LZ |
84 | int64_t entry, kernel_high, initrd_size; |
85 | long kernel_size; | |
c227f099 | 86 | ram_addr_t initrd_offset; |
e90e795e | 87 | uint32_t *params_buf; |
ca20cf32 | 88 | int big_endian; |
6ae81775 | 89 | |
ca20cf32 BS |
90 | #ifdef TARGET_WORDS_BIGENDIAN |
91 | big_endian = 1; | |
92 | #else | |
93 | big_endian = 0; | |
94 | #endif | |
409dbce5 AJ |
95 | kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, |
96 | NULL, (uint64_t *)&entry, NULL, | |
97 | (uint64_t *)&kernel_high, big_endian, | |
7ef295ea | 98 | EM_MIPS, 1, 0); |
c570fd16 TS |
99 | if (kernel_size >= 0) { |
100 | if ((entry & ~0x7fffffffULL) == 0x80000000) | |
5dc4b744 | 101 | entry = (int32_t)entry; |
c570fd16 | 102 | } else { |
bd6e1d81 | 103 | error_report("could not load kernel '%s': %s", |
3ee3122c AJ |
104 | loaderparams.kernel_filename, |
105 | load_elf_strerror(kernel_size)); | |
9042c0e2 | 106 | exit(1); |
6ae81775 TS |
107 | } |
108 | ||
109 | /* load initrd */ | |
110 | initrd_size = 0; | |
74287114 | 111 | initrd_offset = 0; |
7df526e3 TS |
112 | if (loaderparams.initrd_filename) { |
113 | initrd_size = get_image_size (loaderparams.initrd_filename); | |
74287114 | 114 | if (initrd_size > 0) { |
05b3274b | 115 | initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; |
74287114 | 116 | if (initrd_offset + initrd_size > ram_size) { |
bd6e1d81 AF |
117 | error_report("memory too small for initial ram disk '%s'", |
118 | loaderparams.initrd_filename); | |
74287114 TS |
119 | exit(1); |
120 | } | |
dcac9679 PB |
121 | initrd_size = load_image_targphys(loaderparams.initrd_filename, |
122 | initrd_offset, | |
123 | ram_size - initrd_offset); | |
74287114 | 124 | } |
6ae81775 | 125 | if (initrd_size == (target_ulong) -1) { |
bd6e1d81 AF |
126 | error_report("could not load initial ram disk '%s'", |
127 | loaderparams.initrd_filename); | |
6ae81775 TS |
128 | exit(1); |
129 | } | |
130 | } | |
131 | ||
132 | /* Store command line. */ | |
7267c094 | 133 | params_buf = g_malloc(params_size); |
e90e795e AJ |
134 | |
135 | params_buf[0] = tswap32(ram_size); | |
136 | params_buf[1] = tswap32(0x12345678); | |
137 | ||
6ae81775 | 138 | if (initrd_size > 0) { |
f3839fda | 139 | snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s", |
409dbce5 | 140 | cpu_mips_phys_to_kseg0(NULL, initrd_offset), |
e90e795e | 141 | initrd_size, loaderparams.kernel_cmdline); |
d7585251 | 142 | } else { |
e90e795e | 143 | snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline); |
6ae81775 TS |
144 | } |
145 | ||
e90e795e | 146 | rom_add_blob_fixed("params", params_buf, params_size, |
be01029e | 147 | 16 * MiB - params_size); |
e90e795e | 148 | |
3ad9fd5a | 149 | g_free(params_buf); |
e16ad5b0 | 150 | return entry; |
6ae81775 TS |
151 | } |
152 | ||
153 | static void main_cpu_reset(void *opaque) | |
154 | { | |
e16ad5b0 | 155 | ResetData *s = (ResetData *)opaque; |
fa156e51 | 156 | CPUMIPSState *env = &s->cpu->env; |
6ae81775 | 157 | |
fa156e51 | 158 | cpu_reset(CPU(s->cpu)); |
e16ad5b0 | 159 | env->active_tc.PC = s->vector; |
6ae81775 | 160 | } |
66a93e0f | 161 | |
be01029e | 162 | static const int sector_len = 32 * KiB; |
70705261 | 163 | static |
3ef96221 | 164 | void mips_r4k_init(MachineState *machine) |
6af0bf9c | 165 | { |
3ef96221 | 166 | ram_addr_t ram_size = machine->ram_size; |
3ef96221 MA |
167 | const char *kernel_filename = machine->kernel_filename; |
168 | const char *kernel_cmdline = machine->kernel_cmdline; | |
169 | const char *initrd_filename = machine->initrd_filename; | |
5cea8590 | 170 | char *filename; |
0ae16450 AK |
171 | MemoryRegion *address_space_mem = get_system_memory(); |
172 | MemoryRegion *ram = g_new(MemoryRegion, 1); | |
cfe5f011 | 173 | MemoryRegion *bios; |
0ae16450 | 174 | MemoryRegion *iomem = g_new(MemoryRegion, 1); |
0c10962a HP |
175 | MemoryRegion *isa_io = g_new(MemoryRegion, 1); |
176 | MemoryRegion *isa_mem = g_new(MemoryRegion, 1); | |
f7bcd4e3 | 177 | int bios_size; |
9ac67e21 | 178 | MIPSCPU *cpu; |
61c56c8c | 179 | CPUMIPSState *env; |
e16ad5b0 | 180 | ResetData *reset_info; |
58126404 | 181 | int i; |
d537cf6c | 182 | qemu_irq *i8259; |
48a18b3c | 183 | ISABus *isa_bus; |
f455e98c | 184 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
751c6a17 | 185 | DriveInfo *dinfo; |
3d08ff69 | 186 | int be; |
c68ea704 | 187 | |
33d68b5f | 188 | /* init CPUs */ |
5daab28e | 189 | cpu = MIPS_CPU(cpu_create(machine->cpu_type)); |
9ac67e21 AF |
190 | env = &cpu->env; |
191 | ||
7267c094 | 192 | reset_info = g_malloc0(sizeof(ResetData)); |
fa156e51 | 193 | reset_info->cpu = cpu; |
e16ad5b0 AJ |
194 | reset_info->vector = env->active_tc.PC; |
195 | qemu_register_reset(main_cpu_reset, reset_info); | |
c68ea704 | 196 | |
6af0bf9c | 197 | /* allocate RAM */ |
be01029e PMD |
198 | if (ram_size > 256 * MiB) { |
199 | error_report("Too much memory for this machine: %" PRId64 "MB," | |
200 | " maximum 256MB", ram_size / MiB); | |
0ccff151 AJ |
201 | exit(1); |
202 | } | |
6a926fbc | 203 | memory_region_allocate_system_memory(ram, NULL, "mips_r4k.ram", ram_size); |
dcac9679 | 204 | |
0ae16450 | 205 | memory_region_add_subregion(address_space_mem, 0, ram); |
66a93e0f | 206 | |
2c9b15ca | 207 | memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000); |
0ae16450 | 208 | memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem); |
6ae81775 | 209 | |
66a93e0f FB |
210 | /* Try to load a BIOS image. If this fails, we continue regardless, |
211 | but initialize the hardware ourselves. When a kernel gets | |
212 | preloaded we also initialize the hardware, since the BIOS wasn't | |
213 | run. */ | |
1192dad8 JM |
214 | if (bios_name == NULL) |
215 | bios_name = BIOS_FILENAME; | |
5cea8590 PB |
216 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
217 | if (filename) { | |
218 | bios_size = get_image_size(filename); | |
219 | } else { | |
220 | bios_size = -1; | |
221 | } | |
3d08ff69 BS |
222 | #ifdef TARGET_WORDS_BIGENDIAN |
223 | be = 1; | |
224 | #else | |
225 | be = 0; | |
226 | #endif | |
2909b29a | 227 | if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { |
cfe5f011 | 228 | bios = g_new(MemoryRegion, 1); |
98a99ce0 | 229 | memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE, |
f8ed85ac | 230 | &error_fatal); |
cfe5f011 AK |
231 | memory_region_set_readonly(bios, true); |
232 | memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios); | |
01e0451a | 233 | |
5cea8590 | 234 | load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); |
751c6a17 | 235 | } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) { |
b305b5ba | 236 | uint32_t mips_rom = 0x00400000; |
cfe5f011 | 237 | if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom, |
4be74634 | 238 | blk_by_legacy_dinfo(dinfo), |
fa1d36df | 239 | sector_len, mips_rom / sector_len, |
01e0451a | 240 | 4, 0, 0, 0, 0, be)) { |
b305b5ba | 241 | fprintf(stderr, "qemu: Error registering flash memory.\n"); |
7d37435b | 242 | } |
c9dd6a9f | 243 | } else if (!qtest_enabled()) { |
8297be80 | 244 | /* not fatal */ |
b62e39b4 | 245 | warn_report("could not load MIPS bios '%s'", bios_name); |
5cea8590 | 246 | } |
ef1e1e07 | 247 | g_free(filename); |
66a93e0f | 248 | |
66a93e0f | 249 | if (kernel_filename) { |
7df526e3 TS |
250 | loaderparams.ram_size = ram_size; |
251 | loaderparams.kernel_filename = kernel_filename; | |
252 | loaderparams.kernel_cmdline = kernel_cmdline; | |
253 | loaderparams.initrd_filename = initrd_filename; | |
e16ad5b0 | 254 | reset_info->vector = load_kernel(); |
6af0bf9c | 255 | } |
6af0bf9c | 256 | |
e16fe40c | 257 | /* Init CPU internal devices */ |
5a975d43 PB |
258 | cpu_mips_irq_init_cpu(cpu); |
259 | cpu_mips_clock_init(cpu); | |
6af0bf9c | 260 | |
0c10962a HP |
261 | /* ISA bus: IO space at 0x14000000, mem space at 0x10000000 */ |
262 | memory_region_init_alias(isa_io, NULL, "isa-io", | |
263 | get_system_io(), 0, 0x00010000); | |
264 | memory_region_init(isa_mem, NULL, "isa-mem", 0x01000000); | |
265 | memory_region_add_subregion(get_system_memory(), 0x14000000, isa_io); | |
266 | memory_region_add_subregion(get_system_memory(), 0x10000000, isa_mem); | |
d10e5432 | 267 | isa_bus = isa_bus_new(NULL, isa_mem, get_system_io(), &error_abort); |
0c10962a | 268 | |
d537cf6c | 269 | /* The PIC is attached to the MIPS CPU INT0 pin */ |
48a18b3c HP |
270 | i8259 = i8259_init(isa_bus, env->irq[2]); |
271 | isa_bus_irqs(isa_bus, i8259); | |
d537cf6c | 272 | |
6c646a11 | 273 | mc146818_rtc_init(isa_bus, 2000, NULL); |
afdfa781 | 274 | |
acf695ec | 275 | pit = i8254_pit_init(isa_bus, 0x40, 0, NULL); |
afdfa781 | 276 | |
def337ff | 277 | serial_hds_isa_init(isa_bus, 0, MAX_ISA_SERIAL_PORTS); |
eddbd288 | 278 | |
f642dfce | 279 | isa_vga_init(isa_bus); |
9827e95c | 280 | |
a005d073 | 281 | if (nd_table[0].used) |
48a18b3c | 282 | isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]); |
58126404 | 283 | |
d8f94e1b | 284 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
e4bcb14c | 285 | for(i = 0; i < MAX_IDE_BUS; i++) |
48a18b3c | 286 | isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], |
e4bcb14c | 287 | hd[MAX_IDE_DEVS * i], |
7d37435b | 288 | hd[MAX_IDE_DEVS * i + 1]); |
70705261 | 289 | |
47973a2d | 290 | isa_create_simple(isa_bus, TYPE_I8042); |
6af0bf9c FB |
291 | } |
292 | ||
e264d29d | 293 | static void mips_machine_init(MachineClass *mc) |
f80f9ec9 | 294 | { |
e264d29d EH |
295 | mc->desc = "mips r4k platform"; |
296 | mc->init = mips_r4k_init; | |
2059839b | 297 | mc->block_default_type = IF_IDE; |
5daab28e IM |
298 | #ifdef TARGET_MIPS64 |
299 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("R4000"); | |
300 | #else | |
301 | mc->default_cpu_type = MIPS_CPU_TYPE_NAME("24Kf"); | |
302 | #endif | |
303 | ||
f80f9ec9 AL |
304 | } |
305 | ||
e264d29d | 306 | DEFINE_MACHINE("mips", mips_machine_init) |