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Commit | Line | Data |
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e16fe40c TS |
1 | /* |
2 | * QEMU/MIPS pseudo-board | |
3 | * | |
4 | * emulates a simple machine with ISA-like bus. | |
5 | * ISA IO space mapped to the 0x14000000 (PHYS) and | |
6 | * ISA memory at the 0x10000000 (PHYS, 16Mb in size). | |
7 | * All peripherial devices are attached to this "bus" with | |
8 | * the standard PC ISA addresses. | |
9 | */ | |
83c9f4ca | 10 | #include "hw/hw.h" |
0d09e41a PB |
11 | #include "hw/mips/mips.h" |
12 | #include "hw/mips/cpudevs.h" | |
13 | #include "hw/i386/pc.h" | |
14 | #include "hw/char/serial.h" | |
15 | #include "hw/isa/isa.h" | |
1422e32d | 16 | #include "net/net.h" |
9c17d615 | 17 | #include "sysemu/sysemu.h" |
83c9f4ca | 18 | #include "hw/boards.h" |
0d09e41a | 19 | #include "hw/block/flash.h" |
1de7afc9 | 20 | #include "qemu/log.h" |
0d09e41a | 21 | #include "hw/mips/bios.h" |
83c9f4ca PB |
22 | #include "hw/ide.h" |
23 | #include "hw/loader.h" | |
ca20cf32 | 24 | #include "elf.h" |
0d09e41a PB |
25 | #include "hw/timer/mc146818rtc.h" |
26 | #include "hw/timer/i8254.h" | |
9c17d615 | 27 | #include "sysemu/blockdev.h" |
022c62cb | 28 | #include "exec/address-spaces.h" |
c9dd6a9f | 29 | #include "sysemu/qtest.h" |
44cbbf18 | 30 | |
e4bcb14c TS |
31 | #define MAX_IDE_BUS 2 |
32 | ||
58126404 PB |
33 | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
34 | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; | |
35 | static const int ide_irq[2] = { 14, 15 }; | |
36 | ||
64d7e9a4 | 37 | static ISADevice *pit; /* PIT i8254 */ |
697584ab | 38 | |
1b66074b | 39 | /* i8254 PIT is attached to the IRQ0 at PIC i8259 */ |
6af0bf9c | 40 | |
7df526e3 TS |
41 | static struct _loaderparams { |
42 | int ram_size; | |
43 | const char *kernel_filename; | |
44 | const char *kernel_cmdline; | |
45 | const char *initrd_filename; | |
46 | } loaderparams; | |
47 | ||
a8170e5e | 48 | static void mips_qemu_write (void *opaque, hwaddr addr, |
0ae16450 | 49 | uint64_t val, unsigned size) |
6ae81775 TS |
50 | { |
51 | if ((addr & 0xffff) == 0 && val == 42) | |
52 | qemu_system_reset_request (); | |
53 | else if ((addr & 0xffff) == 4 && val == 42) | |
54 | qemu_system_shutdown_request (); | |
55 | } | |
56 | ||
a8170e5e | 57 | static uint64_t mips_qemu_read (void *opaque, hwaddr addr, |
0ae16450 | 58 | unsigned size) |
6ae81775 TS |
59 | { |
60 | return 0; | |
61 | } | |
62 | ||
0ae16450 AK |
63 | static const MemoryRegionOps mips_qemu_ops = { |
64 | .read = mips_qemu_read, | |
65 | .write = mips_qemu_write, | |
66 | .endianness = DEVICE_NATIVE_ENDIAN, | |
6ae81775 TS |
67 | }; |
68 | ||
e16ad5b0 | 69 | typedef struct ResetData { |
fa156e51 | 70 | MIPSCPU *cpu; |
e16ad5b0 AJ |
71 | uint64_t vector; |
72 | } ResetData; | |
73 | ||
74 | static int64_t load_kernel(void) | |
6ae81775 | 75 | { |
409dbce5 | 76 | int64_t entry, kernel_high; |
e90e795e | 77 | long kernel_size, initrd_size, params_size; |
c227f099 | 78 | ram_addr_t initrd_offset; |
e90e795e | 79 | uint32_t *params_buf; |
ca20cf32 | 80 | int big_endian; |
6ae81775 | 81 | |
ca20cf32 BS |
82 | #ifdef TARGET_WORDS_BIGENDIAN |
83 | big_endian = 1; | |
84 | #else | |
85 | big_endian = 0; | |
86 | #endif | |
409dbce5 AJ |
87 | kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, |
88 | NULL, (uint64_t *)&entry, NULL, | |
89 | (uint64_t *)&kernel_high, big_endian, | |
90 | ELF_MACHINE, 1); | |
c570fd16 TS |
91 | if (kernel_size >= 0) { |
92 | if ((entry & ~0x7fffffffULL) == 0x80000000) | |
5dc4b744 | 93 | entry = (int32_t)entry; |
c570fd16 | 94 | } else { |
9042c0e2 | 95 | fprintf(stderr, "qemu: could not load kernel '%s'\n", |
7df526e3 | 96 | loaderparams.kernel_filename); |
9042c0e2 | 97 | exit(1); |
6ae81775 TS |
98 | } |
99 | ||
100 | /* load initrd */ | |
101 | initrd_size = 0; | |
74287114 | 102 | initrd_offset = 0; |
7df526e3 TS |
103 | if (loaderparams.initrd_filename) { |
104 | initrd_size = get_image_size (loaderparams.initrd_filename); | |
74287114 | 105 | if (initrd_size > 0) { |
05b3274b | 106 | initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK; |
74287114 TS |
107 | if (initrd_offset + initrd_size > ram_size) { |
108 | fprintf(stderr, | |
109 | "qemu: memory too small for initial ram disk '%s'\n", | |
7df526e3 | 110 | loaderparams.initrd_filename); |
74287114 TS |
111 | exit(1); |
112 | } | |
dcac9679 PB |
113 | initrd_size = load_image_targphys(loaderparams.initrd_filename, |
114 | initrd_offset, | |
115 | ram_size - initrd_offset); | |
74287114 | 116 | } |
6ae81775 TS |
117 | if (initrd_size == (target_ulong) -1) { |
118 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", | |
7df526e3 | 119 | loaderparams.initrd_filename); |
6ae81775 TS |
120 | exit(1); |
121 | } | |
122 | } | |
123 | ||
124 | /* Store command line. */ | |
e90e795e | 125 | params_size = 264; |
7267c094 | 126 | params_buf = g_malloc(params_size); |
e90e795e AJ |
127 | |
128 | params_buf[0] = tswap32(ram_size); | |
129 | params_buf[1] = tswap32(0x12345678); | |
130 | ||
6ae81775 | 131 | if (initrd_size > 0) { |
409dbce5 AJ |
132 | snprintf((char *)params_buf + 8, 256, "rd_start=0x%" PRIx64 " rd_size=%li %s", |
133 | cpu_mips_phys_to_kseg0(NULL, initrd_offset), | |
e90e795e | 134 | initrd_size, loaderparams.kernel_cmdline); |
d7585251 | 135 | } else { |
e90e795e | 136 | snprintf((char *)params_buf + 8, 256, "%s", loaderparams.kernel_cmdline); |
6ae81775 TS |
137 | } |
138 | ||
e90e795e AJ |
139 | rom_add_blob_fixed("params", params_buf, params_size, |
140 | (16 << 20) - 264); | |
141 | ||
e16ad5b0 | 142 | return entry; |
6ae81775 TS |
143 | } |
144 | ||
145 | static void main_cpu_reset(void *opaque) | |
146 | { | |
e16ad5b0 | 147 | ResetData *s = (ResetData *)opaque; |
fa156e51 | 148 | CPUMIPSState *env = &s->cpu->env; |
6ae81775 | 149 | |
fa156e51 | 150 | cpu_reset(CPU(s->cpu)); |
e16ad5b0 | 151 | env->active_tc.PC = s->vector; |
6ae81775 | 152 | } |
66a93e0f | 153 | |
b305b5ba | 154 | static const int sector_len = 32 * 1024; |
70705261 | 155 | static |
3ef96221 | 156 | void mips_r4k_init(MachineState *machine) |
6af0bf9c | 157 | { |
3ef96221 MA |
158 | ram_addr_t ram_size = machine->ram_size; |
159 | const char *cpu_model = machine->cpu_model; | |
160 | const char *kernel_filename = machine->kernel_filename; | |
161 | const char *kernel_cmdline = machine->kernel_cmdline; | |
162 | const char *initrd_filename = machine->initrd_filename; | |
5cea8590 | 163 | char *filename; |
0ae16450 AK |
164 | MemoryRegion *address_space_mem = get_system_memory(); |
165 | MemoryRegion *ram = g_new(MemoryRegion, 1); | |
cfe5f011 | 166 | MemoryRegion *bios; |
0ae16450 | 167 | MemoryRegion *iomem = g_new(MemoryRegion, 1); |
39594968 | 168 | MemoryRegion *isa = g_new(MemoryRegion, 1); |
f7bcd4e3 | 169 | int bios_size; |
9ac67e21 | 170 | MIPSCPU *cpu; |
61c56c8c | 171 | CPUMIPSState *env; |
e16ad5b0 | 172 | ResetData *reset_info; |
58126404 | 173 | int i; |
d537cf6c | 174 | qemu_irq *i8259; |
48a18b3c | 175 | ISABus *isa_bus; |
f455e98c | 176 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
751c6a17 | 177 | DriveInfo *dinfo; |
3d08ff69 | 178 | int be; |
c68ea704 | 179 | |
33d68b5f TS |
180 | /* init CPUs */ |
181 | if (cpu_model == NULL) { | |
60aa19ab | 182 | #ifdef TARGET_MIPS64 |
33d68b5f TS |
183 | cpu_model = "R4000"; |
184 | #else | |
1c32f43e | 185 | cpu_model = "24Kf"; |
33d68b5f TS |
186 | #endif |
187 | } | |
9ac67e21 AF |
188 | cpu = cpu_mips_init(cpu_model); |
189 | if (cpu == NULL) { | |
aaed909a FB |
190 | fprintf(stderr, "Unable to find CPU definition\n"); |
191 | exit(1); | |
192 | } | |
9ac67e21 AF |
193 | env = &cpu->env; |
194 | ||
7267c094 | 195 | reset_info = g_malloc0(sizeof(ResetData)); |
fa156e51 | 196 | reset_info->cpu = cpu; |
e16ad5b0 AJ |
197 | reset_info->vector = env->active_tc.PC; |
198 | qemu_register_reset(main_cpu_reset, reset_info); | |
c68ea704 | 199 | |
6af0bf9c | 200 | /* allocate RAM */ |
0ccff151 AJ |
201 | if (ram_size > (256 << 20)) { |
202 | fprintf(stderr, | |
203 | "qemu: Too much memory for this machine: %d MB, maximum 256 MB\n", | |
204 | ((unsigned int)ram_size / (1 << 20))); | |
205 | exit(1); | |
206 | } | |
2c9b15ca | 207 | memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size); |
c5705a77 | 208 | vmstate_register_ram_global(ram); |
dcac9679 | 209 | |
0ae16450 | 210 | memory_region_add_subregion(address_space_mem, 0, ram); |
66a93e0f | 211 | |
2c9b15ca | 212 | memory_region_init_io(iomem, NULL, &mips_qemu_ops, NULL, "mips-qemu", 0x10000); |
0ae16450 | 213 | memory_region_add_subregion(address_space_mem, 0x1fbf0000, iomem); |
6ae81775 | 214 | |
66a93e0f FB |
215 | /* Try to load a BIOS image. If this fails, we continue regardless, |
216 | but initialize the hardware ourselves. When a kernel gets | |
217 | preloaded we also initialize the hardware, since the BIOS wasn't | |
218 | run. */ | |
1192dad8 JM |
219 | if (bios_name == NULL) |
220 | bios_name = BIOS_FILENAME; | |
5cea8590 PB |
221 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
222 | if (filename) { | |
223 | bios_size = get_image_size(filename); | |
224 | } else { | |
225 | bios_size = -1; | |
226 | } | |
3d08ff69 BS |
227 | #ifdef TARGET_WORDS_BIGENDIAN |
228 | be = 1; | |
229 | #else | |
230 | be = 0; | |
231 | #endif | |
2909b29a | 232 | if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { |
cfe5f011 | 233 | bios = g_new(MemoryRegion, 1); |
2c9b15ca | 234 | memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE); |
c5705a77 | 235 | vmstate_register_ram_global(bios); |
cfe5f011 AK |
236 | memory_region_set_readonly(bios, true); |
237 | memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios); | |
01e0451a | 238 | |
5cea8590 | 239 | load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); |
751c6a17 | 240 | } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) { |
b305b5ba | 241 | uint32_t mips_rom = 0x00400000; |
cfe5f011 | 242 | if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom, |
3d08ff69 BS |
243 | dinfo->bdrv, sector_len, |
244 | mips_rom / sector_len, | |
01e0451a | 245 | 4, 0, 0, 0, 0, be)) { |
b305b5ba TS |
246 | fprintf(stderr, "qemu: Error registering flash memory.\n"); |
247 | } | |
c9dd6a9f | 248 | } else if (!qtest_enabled()) { |
66a93e0f FB |
249 | /* not fatal */ |
250 | fprintf(stderr, "qemu: Warning, could not load MIPS bios '%s'\n", | |
5cea8590 PB |
251 | bios_name); |
252 | } | |
253 | if (filename) { | |
7267c094 | 254 | g_free(filename); |
6af0bf9c | 255 | } |
66a93e0f | 256 | |
66a93e0f | 257 | if (kernel_filename) { |
7df526e3 TS |
258 | loaderparams.ram_size = ram_size; |
259 | loaderparams.kernel_filename = kernel_filename; | |
260 | loaderparams.kernel_cmdline = kernel_cmdline; | |
261 | loaderparams.initrd_filename = initrd_filename; | |
e16ad5b0 | 262 | reset_info->vector = load_kernel(); |
6af0bf9c | 263 | } |
6af0bf9c | 264 | |
e16fe40c | 265 | /* Init CPU internal devices */ |
d537cf6c | 266 | cpu_mips_irq_init_cpu(env); |
c68ea704 | 267 | cpu_mips_clock_init(env); |
6af0bf9c | 268 | |
d537cf6c | 269 | /* The PIC is attached to the MIPS CPU INT0 pin */ |
48a18b3c HP |
270 | isa_bus = isa_bus_new(NULL, get_system_io()); |
271 | i8259 = i8259_init(isa_bus, env->irq[2]); | |
272 | isa_bus_irqs(isa_bus, i8259); | |
d537cf6c | 273 | |
48a18b3c | 274 | rtc_init(isa_bus, 2000, NULL); |
afdfa781 | 275 | |
0699b548 | 276 | /* Register 64 KB of ISA IO space at 0x14000000 */ |
39594968 PB |
277 | memory_region_init_alias(isa, NULL, "isa_mmio", |
278 | get_system_io(), 0, 0x00010000); | |
279 | memory_region_add_subregion(get_system_memory(), 0x14000000, isa); | |
280 | ||
0699b548 FB |
281 | isa_mem_base = 0x10000000; |
282 | ||
319ba9f5 | 283 | pit = pit_init(isa_bus, 0x40, 0, NULL); |
afdfa781 | 284 | |
eddbd288 TS |
285 | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
286 | if (serial_hds[i]) { | |
48a18b3c | 287 | serial_isa_init(isa_bus, i, serial_hds[i]); |
eddbd288 TS |
288 | } |
289 | } | |
290 | ||
f642dfce | 291 | isa_vga_init(isa_bus); |
9827e95c | 292 | |
a005d073 | 293 | if (nd_table[0].used) |
48a18b3c | 294 | isa_ne2000_init(isa_bus, 0x300, 9, &nd_table[0]); |
58126404 | 295 | |
75717903 | 296 | ide_drive_get(hd, MAX_IDE_BUS); |
e4bcb14c | 297 | for(i = 0; i < MAX_IDE_BUS; i++) |
48a18b3c | 298 | isa_ide_init(isa_bus, ide_iobase[i], ide_iobase2[i], ide_irq[i], |
e4bcb14c TS |
299 | hd[MAX_IDE_DEVS * i], |
300 | hd[MAX_IDE_DEVS * i + 1]); | |
70705261 | 301 | |
48a18b3c | 302 | isa_create_simple(isa_bus, "i8042"); |
6af0bf9c FB |
303 | } |
304 | ||
f80f9ec9 | 305 | static QEMUMachine mips_machine = { |
eec2743e TS |
306 | .name = "mips", |
307 | .desc = "mips r4k platform", | |
308 | .init = mips_r4k_init, | |
6af0bf9c | 309 | }; |
f80f9ec9 AL |
310 | |
311 | static void mips_machine_init(void) | |
312 | { | |
313 | qemu_register_machine(&mips_machine); | |
314 | } | |
315 | ||
316 | machine_init(mips_machine_init); |