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051c190b HC |
1 | /* |
2 | * QEMU fulong 2e mini pc support | |
3 | * | |
4 | * Copyright (c) 2008 yajin (yajin@vm-kernel.org) | |
5 | * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn) | |
6 | * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com) | |
7 | * This code is licensed under the GNU GPL v2. | |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
051c190b HC |
11 | */ |
12 | ||
13 | /* | |
14 | * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz) | |
15 | * http://www.linux-mips.org/wiki/Fulong | |
16 | * | |
17 | * Loongson 2e user manual: | |
18 | * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf | |
19 | */ | |
20 | ||
21 | #include "hw.h" | |
22 | #include "pc.h" | |
23 | #include "fdc.h" | |
24 | #include "net.h" | |
25 | #include "boards.h" | |
26 | #include "smbus.h" | |
27 | #include "block.h" | |
28 | #include "flash.h" | |
29 | #include "mips.h" | |
30 | #include "mips_cpudevs.h" | |
31 | #include "pci.h" | |
32 | #include "usb-uhci.h" | |
33 | #include "qemu-char.h" | |
34 | #include "sysemu.h" | |
35 | #include "audio/audio.h" | |
36 | #include "qemu-log.h" | |
37 | #include "loader.h" | |
38 | #include "mips-bios.h" | |
39 | #include "ide.h" | |
40 | #include "elf.h" | |
41 | #include "vt82c686.h" | |
42 | #include "mc146818rtc.h" | |
b1277b03 | 43 | #include "i8254.h" |
2446333c | 44 | #include "blockdev.h" |
13faf2a7 | 45 | #include "exec-memory.h" |
051c190b HC |
46 | |
47 | #define DEBUG_FULONG2E_INIT | |
48 | ||
49 | #define ENVP_ADDR 0x80002000l | |
50 | #define ENVP_NB_ENTRIES 16 | |
51 | #define ENVP_ENTRY_SIZE 256 | |
52 | ||
53 | #define MAX_IDE_BUS 2 | |
54 | ||
55 | /* | |
56 | * PMON is not part of qemu and released with BSD license, anyone | |
57 | * who want to build a pmon binary please first git-clone the source | |
58 | * from the git repository at: | |
59 | * http://www.loongson.cn/support/git/pmon | |
60 | * Then follow the "Compile Guide" available at: | |
61 | * http://dev.lemote.com/code/pmon | |
62 | * | |
63 | * Notes: | |
64 | * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git | |
65 | * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware" | |
66 | * in the "Compile Guide". | |
67 | */ | |
68 | #define FULONG_BIOSNAME "pmon_fulong2e.bin" | |
69 | ||
70 | /* PCI SLOT in fulong 2e */ | |
71 | #define FULONG2E_VIA_SLOT 5 | |
72 | #define FULONG2E_ATI_SLOT 6 | |
73 | #define FULONG2E_RTL8139_SLOT 7 | |
74 | ||
64d7e9a4 | 75 | static ISADevice *pit; |
051c190b HC |
76 | |
77 | static struct _loaderparams { | |
78 | int ram_size; | |
79 | const char *kernel_filename; | |
80 | const char *kernel_cmdline; | |
81 | const char *initrd_filename; | |
82 | } loaderparams; | |
83 | ||
8b7968f7 SW |
84 | static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index, |
85 | const char *string, ...) | |
051c190b HC |
86 | { |
87 | va_list ap; | |
88 | int32_t table_addr; | |
89 | ||
90 | if (index >= ENVP_NB_ENTRIES) | |
91 | return; | |
92 | ||
93 | if (string == NULL) { | |
94 | prom_buf[index] = 0; | |
95 | return; | |
96 | } | |
97 | ||
98 | table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE; | |
99 | prom_buf[index] = tswap32(ENVP_ADDR + table_addr); | |
100 | ||
101 | va_start(ap, string); | |
102 | vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap); | |
103 | va_end(ap); | |
104 | } | |
105 | ||
106 | static int64_t load_kernel (CPUState *env) | |
107 | { | |
108 | int64_t kernel_entry, kernel_low, kernel_high; | |
109 | int index = 0; | |
110 | long initrd_size; | |
111 | ram_addr_t initrd_offset; | |
112 | uint32_t *prom_buf; | |
113 | long prom_size; | |
114 | ||
115 | if (load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys, NULL, | |
116 | (uint64_t *)&kernel_entry, (uint64_t *)&kernel_low, | |
117 | (uint64_t *)&kernel_high, 0, ELF_MACHINE, 1) < 0) { | |
118 | fprintf(stderr, "qemu: could not load kernel '%s'\n", | |
119 | loaderparams.kernel_filename); | |
120 | exit(1); | |
121 | } | |
122 | ||
123 | /* load initrd */ | |
124 | initrd_size = 0; | |
125 | initrd_offset = 0; | |
126 | if (loaderparams.initrd_filename) { | |
127 | initrd_size = get_image_size (loaderparams.initrd_filename); | |
128 | if (initrd_size > 0) { | |
129 | initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK; | |
130 | if (initrd_offset + initrd_size > ram_size) { | |
131 | fprintf(stderr, | |
132 | "qemu: memory too small for initial ram disk '%s'\n", | |
133 | loaderparams.initrd_filename); | |
134 | exit(1); | |
135 | } | |
136 | initrd_size = load_image_targphys(loaderparams.initrd_filename, | |
137 | initrd_offset, ram_size - initrd_offset); | |
138 | } | |
139 | if (initrd_size == (target_ulong) -1) { | |
140 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", | |
141 | loaderparams.initrd_filename); | |
142 | exit(1); | |
143 | } | |
144 | } | |
145 | ||
146 | /* Setup prom parameters. */ | |
147 | prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE); | |
7267c094 | 148 | prom_buf = g_malloc(prom_size); |
051c190b | 149 | |
1ed1139d | 150 | prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename); |
051c190b | 151 | if (initrd_size > 0) { |
1ed1139d | 152 | prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%li %s", |
051c190b HC |
153 | cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size, |
154 | loaderparams.kernel_cmdline); | |
155 | } else { | |
1ed1139d | 156 | prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline); |
051c190b HC |
157 | } |
158 | ||
159 | /* Setup minimum environment variables */ | |
160 | prom_set(prom_buf, index++, "busclock=33000000"); | |
161 | prom_set(prom_buf, index++, "cpuclock=100000000"); | |
162 | prom_set(prom_buf, index++, "memsize=%i", loaderparams.ram_size/1024/1024); | |
163 | prom_set(prom_buf, index++, "modetty0=38400n8r"); | |
164 | prom_set(prom_buf, index++, NULL); | |
165 | ||
166 | rom_add_blob_fixed("prom", prom_buf, prom_size, | |
167 | cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR)); | |
168 | ||
169 | return kernel_entry; | |
170 | } | |
171 | ||
172 | static void write_bootloader (CPUState *env, uint8_t *base, int64_t kernel_addr) | |
173 | { | |
174 | uint32_t *p; | |
175 | ||
176 | /* Small bootloader */ | |
177 | p = (uint32_t *) base; | |
178 | ||
179 | stl_raw(p++, 0x0bf00010); /* j 0x1fc00040 */ | |
180 | stl_raw(p++, 0x00000000); /* nop */ | |
181 | ||
182 | /* Second part of the bootloader */ | |
183 | p = (uint32_t *) (base + 0x040); | |
184 | ||
185 | stl_raw(p++, 0x3c040000); /* lui a0, 0 */ | |
186 | stl_raw(p++, 0x34840002); /* ori a0, a0, 2 */ | |
187 | stl_raw(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */ | |
188 | stl_raw(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */ | |
189 | stl_raw(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */ | |
190 | stl_raw(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */ | |
191 | stl_raw(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */ | |
192 | stl_raw(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */ | |
193 | stl_raw(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */; | |
194 | stl_raw(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */ | |
195 | stl_raw(p++, 0x03e00008); /* jr ra */ | |
196 | stl_raw(p++, 0x00000000); /* nop */ | |
197 | } | |
198 | ||
199 | ||
200 | static void main_cpu_reset(void *opaque) | |
201 | { | |
202 | CPUState *env = opaque; | |
203 | ||
204 | cpu_reset(env); | |
205 | /* TODO: 2E reset stuff */ | |
206 | if (loaderparams.kernel_filename) { | |
207 | env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); | |
208 | } | |
209 | } | |
210 | ||
211 | uint8_t eeprom_spd[0x80] = { | |
212 | 0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70, | |
213 | 0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01, | |
214 | 0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50, | |
215 | 0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00, | |
216 | 0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00, | |
217 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
218 | 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, | |
219 | 0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00, | |
220 | 0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32, | |
221 | 0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42, | |
222 | 0x20,0x30,0x20 | |
223 | }; | |
224 | ||
225 | /* Audio support */ | |
051c190b HC |
226 | static void audio_init (PCIBus *pci_bus) |
227 | { | |
7899f799 IY |
228 | vt82c686b_ac97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 5)); |
229 | vt82c686b_mc97_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 6)); | |
051c190b | 230 | } |
051c190b HC |
231 | |
232 | /* Network support */ | |
233 | static void network_init (void) | |
234 | { | |
235 | int i; | |
236 | ||
237 | for(i = 0; i < nb_nics; i++) { | |
238 | NICInfo *nd = &nd_table[i]; | |
239 | const char *default_devaddr = NULL; | |
240 | ||
241 | if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) { | |
242 | /* The fulong board has a RTL8139 card using PCI SLOT 7 */ | |
243 | default_devaddr = "07"; | |
244 | } | |
245 | ||
246 | pci_nic_init_nofail(nd, "rtl8139", default_devaddr); | |
247 | } | |
248 | } | |
249 | ||
250 | static void cpu_request_exit(void *opaque, int irq, int level) | |
251 | { | |
252 | CPUState *env = cpu_single_env; | |
253 | ||
254 | if (env && level) { | |
255 | cpu_exit(env); | |
256 | } | |
257 | } | |
258 | ||
259 | static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, | |
260 | const char *kernel_filename, const char *kernel_cmdline, | |
261 | const char *initrd_filename, const char *cpu_model) | |
262 | { | |
263 | char *filename; | |
13faf2a7 AK |
264 | MemoryRegion *address_space_mem = get_system_memory(); |
265 | MemoryRegion *ram = g_new(MemoryRegion, 1); | |
266 | MemoryRegion *bios = g_new(MemoryRegion, 1); | |
093209cd | 267 | long bios_size; |
051c190b HC |
268 | int64_t kernel_entry; |
269 | qemu_irq *i8259; | |
270 | qemu_irq *cpu_exit_irq; | |
051c190b | 271 | PCIBus *pci_bus; |
48a18b3c | 272 | ISABus *isa_bus; |
051c190b HC |
273 | i2c_bus *smbus; |
274 | int i; | |
275 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; | |
051c190b HC |
276 | CPUState *env; |
277 | ||
278 | /* init CPUs */ | |
279 | if (cpu_model == NULL) { | |
280 | cpu_model = "Loongson-2E"; | |
281 | } | |
282 | env = cpu_init(cpu_model); | |
283 | if (!env) { | |
284 | fprintf(stderr, "Unable to find CPU definition\n"); | |
285 | exit(1); | |
286 | } | |
287 | ||
0be71e32 | 288 | register_savevm(NULL, "cpu", 0, 3, cpu_save, cpu_load, env); |
051c190b HC |
289 | qemu_register_reset(main_cpu_reset, env); |
290 | ||
291 | /* fulong 2e has 256M ram. */ | |
292 | ram_size = 256 * 1024 * 1024; | |
293 | ||
294 | /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */ | |
295 | bios_size = 1024 * 1024; | |
296 | ||
297 | /* allocate RAM */ | |
c5705a77 AK |
298 | memory_region_init_ram(ram, "fulong2e.ram", ram_size); |
299 | vmstate_register_ram_global(ram); | |
300 | memory_region_init_ram(bios, "fulong2e.bios", bios_size); | |
301 | vmstate_register_ram_global(bios); | |
13faf2a7 | 302 | memory_region_set_readonly(bios, true); |
051c190b | 303 | |
13faf2a7 AK |
304 | memory_region_add_subregion(address_space_mem, 0, ram); |
305 | memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); | |
051c190b HC |
306 | |
307 | /* We do not support flash operation, just loading pmon.bin as raw BIOS. | |
308 | * Please use -L to set the BIOS path and -bios to set bios name. */ | |
309 | ||
310 | if (kernel_filename) { | |
311 | loaderparams.ram_size = ram_size; | |
312 | loaderparams.kernel_filename = kernel_filename; | |
313 | loaderparams.kernel_cmdline = kernel_cmdline; | |
314 | loaderparams.initrd_filename = initrd_filename; | |
315 | kernel_entry = load_kernel (env); | |
13faf2a7 | 316 | write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); |
051c190b | 317 | } else { |
33dd2983 AJ |
318 | if (bios_name == NULL) { |
319 | bios_name = FULONG_BIOSNAME; | |
051c190b HC |
320 | } |
321 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); | |
322 | if (filename) { | |
323 | bios_size = load_image_targphys(filename, 0x1fc00000LL, | |
324 | BIOS_SIZE); | |
7267c094 | 325 | g_free(filename); |
051c190b HC |
326 | } else { |
327 | bios_size = -1; | |
328 | } | |
329 | ||
33dd2983 AJ |
330 | if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) { |
331 | fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", bios_name); | |
051c190b | 332 | exit(1); |
33dd2983 | 333 | } |
051c190b HC |
334 | } |
335 | ||
336 | /* Init internal devices */ | |
337 | cpu_mips_irq_init_cpu(env); | |
338 | cpu_mips_clock_init(env); | |
339 | ||
051c190b HC |
340 | /* North bridge, Bonito --> IP2 */ |
341 | pci_bus = bonito_init((qemu_irq *)&(env->irq[2])); | |
342 | ||
343 | /* South bridge */ | |
75717903 | 344 | ide_drive_get(hd, MAX_IDE_BUS); |
051c190b | 345 | |
c9940edb HP |
346 | isa_bus = vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 0)); |
347 | if (!isa_bus) { | |
b2bedb21 | 348 | fprintf(stderr, "vt82c686b_init error\n"); |
051c190b HC |
349 | exit(1); |
350 | } | |
351 | ||
7e17a217 JK |
352 | /* Interrupt controller */ |
353 | /* The 8259 -> IP5 */ | |
48a18b3c HP |
354 | i8259 = i8259_init(isa_bus, env->irq[5]); |
355 | isa_bus_irqs(isa_bus, i8259); | |
7e17a217 | 356 | |
7899f799 IY |
357 | vt82c686b_ide_init(pci_bus, hd, PCI_DEVFN(FULONG2E_VIA_SLOT, 1)); |
358 | usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 2)); | |
359 | usb_uhci_vt82c686b_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 3)); | |
051c190b | 360 | |
7899f799 | 361 | smbus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(FULONG2E_VIA_SLOT, 4), |
051c190b | 362 | 0xeee1, NULL); |
051c190b | 363 | /* TODO: Populate SPD eeprom data. */ |
a88df0b9 | 364 | smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd)); |
051c190b HC |
365 | |
366 | /* init other devices */ | |
319ba9f5 | 367 | pit = pit_init(isa_bus, 0x40, 0, NULL); |
051c190b HC |
368 | cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1); |
369 | DMA_init(0, cpu_exit_irq); | |
370 | ||
371 | /* Super I/O */ | |
48a18b3c | 372 | isa_create_simple(isa_bus, "i8042"); |
051c190b | 373 | |
48a18b3c | 374 | rtc_init(isa_bus, 2000, NULL); |
051c190b HC |
375 | |
376 | for(i = 0; i < MAX_SERIAL_PORTS; i++) { | |
377 | if (serial_hds[i]) { | |
48a18b3c | 378 | serial_isa_init(isa_bus, i, serial_hds[i]); |
051c190b HC |
379 | } |
380 | } | |
381 | ||
382 | if (parallel_hds[0]) { | |
48a18b3c | 383 | parallel_init(isa_bus, 0, parallel_hds[0]); |
051c190b HC |
384 | } |
385 | ||
386 | /* Sound card */ | |
051c190b | 387 | audio_init(pci_bus); |
051c190b HC |
388 | /* Network card */ |
389 | network_init(); | |
390 | } | |
391 | ||
392 | QEMUMachine mips_fulong2e_machine = { | |
393 | .name = "fulong2e", | |
394 | .desc = "Fulong 2e mini pc", | |
395 | .init = mips_fulong2e_init, | |
396 | }; | |
397 | ||
398 | static void mips_fulong2e_machine_init(void) | |
399 | { | |
400 | qemu_register_machine(&mips_fulong2e_machine); | |
401 | } | |
402 | ||
403 | machine_init(mips_fulong2e_machine_init); |