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CommitLineData
6cbf4c8c
CM
1/*
2 * Inter-VM Shared Memory PCI device.
3 *
4 * Author:
5 * Cam Macdonell <cam@cs.ualberta.ca>
6 *
7 * Based On: cirrus_vga.c
8 * Copyright (c) 2004 Fabrice Bellard
9 * Copyright (c) 2004 Makoto Suzuki (suzu)
10 *
11 * and rtl8139.c
12 * Copyright (c) 2006 Igor Kovalenko
13 *
14 * This code is licensed under the GNU GPL v2.
6b620ca3
PB
15 *
16 * Contributions after 2012-01-13 are licensed under the terms of the
17 * GNU GPL, version 2 or (at your option) any later version.
6cbf4c8c 18 */
83c9f4ca 19#include "hw/hw.h"
0d09e41a 20#include "hw/i386/pc.h"
83c9f4ca
PB
21#include "hw/pci/pci.h"
22#include "hw/pci/msix.h"
9c17d615 23#include "sysemu/kvm.h"
caf71f86 24#include "migration/migration.h"
7b1b5d19 25#include "qapi/qmp/qerror.h"
1de7afc9 26#include "qemu/event_notifier.h"
dccfcd0e 27#include "sysemu/char.h"
6cbf4c8c
CM
28
29#include <sys/mman.h>
30#include <sys/types.h>
31
b8ef62a9
PB
32#define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
33#define PCI_DEVICE_ID_IVSHMEM 0x1110
34
6cbf4c8c
CM
35#define IVSHMEM_IOEVENTFD 0
36#define IVSHMEM_MSI 1
37
38#define IVSHMEM_PEER 0
39#define IVSHMEM_MASTER 1
40
41#define IVSHMEM_REG_BAR_SIZE 0x100
42
43//#define DEBUG_IVSHMEM
44#ifdef DEBUG_IVSHMEM
45#define IVSHMEM_DPRINTF(fmt, ...) \
46 do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
47#else
48#define IVSHMEM_DPRINTF(fmt, ...)
49#endif
50
eb3fedf3
PC
51#define TYPE_IVSHMEM "ivshmem"
52#define IVSHMEM(obj) \
53 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
54
6cbf4c8c
CM
55typedef struct Peer {
56 int nb_eventfds;
563027cc 57 EventNotifier *eventfds;
6cbf4c8c
CM
58} Peer;
59
60typedef struct EventfdEntry {
61 PCIDevice *pdev;
62 int vector;
63} EventfdEntry;
64
65typedef struct IVShmemState {
b7578eaa
AF
66 /*< private >*/
67 PCIDevice parent_obj;
68 /*< public >*/
69
6cbf4c8c
CM
70 uint32_t intrmask;
71 uint32_t intrstatus;
72 uint32_t doorbell;
73
74 CharDriverState **eventfd_chr;
75 CharDriverState *server_chr;
cb06608e 76 MemoryRegion ivshmem_mmio;
6cbf4c8c 77
cb06608e
AK
78 /* We might need to register the BAR before we actually have the memory.
79 * So prepare a container MemoryRegion for the BAR immediately and
80 * add a subregion when we have the memory.
81 */
82 MemoryRegion bar;
83 MemoryRegion ivshmem;
6cbf4c8c 84 uint64_t ivshmem_size; /* size of shared memory region */
c08ba66f
GH
85 uint32_t ivshmem_attr;
86 uint32_t ivshmem_64bit;
6cbf4c8c
CM
87 int shm_fd; /* shared memory file descriptor */
88
89 Peer *peers;
90 int nb_peers; /* how many guests we have space for */
91 int max_peer; /* maximum numbered peer */
92
93 int vm_id;
94 uint32_t vectors;
95 uint32_t features;
96 EventfdEntry *eventfd_table;
97
38e0735e
AL
98 Error *migration_blocker;
99
6cbf4c8c
CM
100 char * shmobj;
101 char * sizearg;
102 char * role;
103 int role_val; /* scalar to avoid multiple string comparisons */
104} IVShmemState;
105
106/* registers for the Inter-VM shared memory device */
107enum ivshmem_registers {
108 INTRMASK = 0,
109 INTRSTATUS = 4,
110 IVPOSITION = 8,
111 DOORBELL = 12,
112};
113
114static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
115 unsigned int feature) {
116 return (ivs->features & (1 << feature));
117}
118
119static inline bool is_power_of_two(uint64_t x) {
120 return (x & (x - 1)) == 0;
121}
122
6cbf4c8c
CM
123/* accessing registers - based on rtl8139 */
124static void ivshmem_update_irq(IVShmemState *s, int val)
125{
b7578eaa 126 PCIDevice *d = PCI_DEVICE(s);
6cbf4c8c
CM
127 int isr;
128 isr = (s->intrstatus & s->intrmask) & 0xffffffff;
129
130 /* don't print ISR resets */
131 if (isr) {
132 IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
133 isr ? 1 : 0, s->intrstatus, s->intrmask);
134 }
135
9e64f8a3 136 pci_set_irq(d, (isr != 0));
6cbf4c8c
CM
137}
138
139static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
140{
141 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
142
143 s->intrmask = val;
144
145 ivshmem_update_irq(s, val);
146}
147
148static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
149{
150 uint32_t ret = s->intrmask;
151
152 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
153
154 return ret;
155}
156
157static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
158{
159 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
160
161 s->intrstatus = val;
162
163 ivshmem_update_irq(s, val);
6cbf4c8c
CM
164}
165
166static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
167{
168 uint32_t ret = s->intrstatus;
169
170 /* reading ISR clears all interrupts */
171 s->intrstatus = 0;
172
173 ivshmem_update_irq(s, 0);
174
175 return ret;
176}
177
a8170e5e 178static void ivshmem_io_write(void *opaque, hwaddr addr,
cb06608e 179 uint64_t val, unsigned size)
6cbf4c8c
CM
180{
181 IVShmemState *s = opaque;
182
6cbf4c8c
CM
183 uint16_t dest = val >> 16;
184 uint16_t vector = val & 0xff;
185
186 addr &= 0xfc;
187
188 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
189 switch (addr)
190 {
191 case INTRMASK:
192 ivshmem_IntrMask_write(s, val);
193 break;
194
195 case INTRSTATUS:
196 ivshmem_IntrStatus_write(s, val);
197 break;
198
199 case DOORBELL:
200 /* check that dest VM ID is reasonable */
1b27d7a1 201 if (dest > s->max_peer) {
6cbf4c8c
CM
202 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
203 break;
204 }
205
206 /* check doorbell range */
1b27d7a1 207 if (vector < s->peers[dest].nb_eventfds) {
563027cc
PB
208 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
209 event_notifier_set(&s->peers[dest].eventfds[vector]);
6cbf4c8c
CM
210 }
211 break;
212 default:
213 IVSHMEM_DPRINTF("Invalid VM Doorbell VM %d\n", dest);
214 }
215}
216
a8170e5e 217static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
cb06608e 218 unsigned size)
6cbf4c8c
CM
219{
220
221 IVShmemState *s = opaque;
222 uint32_t ret;
223
224 switch (addr)
225 {
226 case INTRMASK:
227 ret = ivshmem_IntrMask_read(s);
228 break;
229
230 case INTRSTATUS:
231 ret = ivshmem_IntrStatus_read(s);
232 break;
233
234 case IVPOSITION:
235 /* return my VM ID if the memory is mapped */
236 if (s->shm_fd > 0) {
237 ret = s->vm_id;
238 } else {
239 ret = -1;
240 }
241 break;
242
243 default:
244 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
245 ret = 0;
246 }
247
248 return ret;
249}
250
cb06608e
AK
251static const MemoryRegionOps ivshmem_mmio_ops = {
252 .read = ivshmem_io_read,
253 .write = ivshmem_io_write,
254 .endianness = DEVICE_NATIVE_ENDIAN,
255 .impl = {
256 .min_access_size = 4,
257 .max_access_size = 4,
258 },
6cbf4c8c
CM
259};
260
261static void ivshmem_receive(void *opaque, const uint8_t *buf, int size)
262{
263 IVShmemState *s = opaque;
264
265 ivshmem_IntrStatus_write(s, *buf);
266
267 IVSHMEM_DPRINTF("ivshmem_receive 0x%02x\n", *buf);
268}
269
270static int ivshmem_can_receive(void * opaque)
271{
272 return 8;
273}
274
275static void ivshmem_event(void *opaque, int event)
276{
277 IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
278}
279
280static void fake_irqfd(void *opaque, const uint8_t *buf, int size) {
281
282 EventfdEntry *entry = opaque;
283 PCIDevice *pdev = entry->pdev;
284
285 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, entry->vector);
286 msix_notify(pdev, entry->vector);
287}
288
563027cc
PB
289static CharDriverState* create_eventfd_chr_device(void * opaque, EventNotifier *n,
290 int vector)
6cbf4c8c
CM
291{
292 /* create a event character device based on the passed eventfd */
293 IVShmemState *s = opaque;
294 CharDriverState * chr;
563027cc 295 int eventfd = event_notifier_get_fd(n);
6cbf4c8c
CM
296
297 chr = qemu_chr_open_eventfd(eventfd);
298
299 if (chr == NULL) {
300 fprintf(stderr, "creating eventfd for eventfd %d failed\n", eventfd);
301 exit(-1);
302 }
456d6069 303 qemu_chr_fe_claim_no_fail(chr);
6cbf4c8c
CM
304
305 /* if MSI is supported we need multiple interrupts */
306 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
b7578eaa 307 s->eventfd_table[vector].pdev = PCI_DEVICE(s);
6cbf4c8c
CM
308 s->eventfd_table[vector].vector = vector;
309
310 qemu_chr_add_handlers(chr, ivshmem_can_receive, fake_irqfd,
311 ivshmem_event, &s->eventfd_table[vector]);
312 } else {
313 qemu_chr_add_handlers(chr, ivshmem_can_receive, ivshmem_receive,
314 ivshmem_event, s);
315 }
316
317 return chr;
318
319}
320
321static int check_shm_size(IVShmemState *s, int fd) {
322 /* check that the guest isn't going to try and map more memory than the
323 * the object has allocated return -1 to indicate error */
324
325 struct stat buf;
326
5edbdbcd
HZ
327 if (fstat(fd, &buf) < 0) {
328 fprintf(stderr, "ivshmem: exiting: fstat on fd %d failed: %s\n",
329 fd, strerror(errno));
330 return -1;
331 }
6cbf4c8c
CM
332
333 if (s->ivshmem_size > buf.st_size) {
ad0a4ac1
AK
334 fprintf(stderr,
335 "IVSHMEM ERROR: Requested memory size greater"
336 " than shared object size (%" PRIu64 " > %" PRIu64")\n",
337 s->ivshmem_size, (uint64_t)buf.st_size);
6cbf4c8c
CM
338 return -1;
339 } else {
340 return 0;
341 }
342}
343
344/* create the shared memory BAR when we are not using the server, so we can
345 * create the BAR and map the memory immediately */
346static void create_shared_memory_BAR(IVShmemState *s, int fd) {
347
348 void * ptr;
349
350 s->shm_fd = fd;
351
352 ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
353
3c161542 354 memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s), "ivshmem.bar2",
cb06608e 355 s->ivshmem_size, ptr);
eb3fedf3 356 vmstate_register_ram(&s->ivshmem, DEVICE(s));
cb06608e 357 memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
6cbf4c8c
CM
358
359 /* region for shared memory */
b7578eaa 360 pci_register_bar(PCI_DEVICE(s), 2, s->ivshmem_attr, &s->bar);
6cbf4c8c
CM
361}
362
563027cc
PB
363static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
364{
365 memory_region_add_eventfd(&s->ivshmem_mmio,
366 DOORBELL,
367 4,
368 true,
369 (posn << 16) | i,
753d5e14 370 &s->peers[posn].eventfds[i]);
563027cc
PB
371}
372
373static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
374{
375 memory_region_del_eventfd(&s->ivshmem_mmio,
376 DOORBELL,
377 4,
378 true,
379 (posn << 16) | i,
753d5e14 380 &s->peers[posn].eventfds[i]);
563027cc
PB
381}
382
6cbf4c8c
CM
383static void close_guest_eventfds(IVShmemState *s, int posn)
384{
385 int i, guest_curr_max;
386
98609cd8
PB
387 if (!ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
388 return;
389 }
390
6cbf4c8c
CM
391 guest_curr_max = s->peers[posn].nb_eventfds;
392
b6a1f3a5 393 memory_region_transaction_begin();
6cbf4c8c 394 for (i = 0; i < guest_curr_max; i++) {
563027cc 395 ivshmem_del_eventfd(s, posn, i);
b6a1f3a5
PB
396 }
397 memory_region_transaction_commit();
398 for (i = 0; i < guest_curr_max; i++) {
563027cc 399 event_notifier_cleanup(&s->peers[posn].eventfds[i]);
6cbf4c8c
CM
400 }
401
7267c094 402 g_free(s->peers[posn].eventfds);
6cbf4c8c
CM
403 s->peers[posn].nb_eventfds = 0;
404}
405
6cbf4c8c
CM
406/* this function increase the dynamic storage need to store data about other
407 * guests */
408static void increase_dynamic_storage(IVShmemState *s, int new_min_size) {
409
410 int j, old_nb_alloc;
411
412 old_nb_alloc = s->nb_peers;
413
414 while (new_min_size >= s->nb_peers)
415 s->nb_peers = s->nb_peers * 2;
416
417 IVSHMEM_DPRINTF("bumping storage to %d guests\n", s->nb_peers);
7267c094 418 s->peers = g_realloc(s->peers, s->nb_peers * sizeof(Peer));
6cbf4c8c
CM
419
420 /* zero out new pointers */
421 for (j = old_nb_alloc; j < s->nb_peers; j++) {
422 s->peers[j].eventfds = NULL;
423 s->peers[j].nb_eventfds = 0;
424 }
425}
426
427static void ivshmem_read(void *opaque, const uint8_t * buf, int flags)
428{
429 IVShmemState *s = opaque;
430 int incoming_fd, tmp_fd;
431 int guest_max_eventfd;
432 long incoming_posn;
433
434 memcpy(&incoming_posn, buf, sizeof(long));
435 /* pick off s->server_chr->msgfd and store it, posn should accompany msg */
74c0d6f0 436 tmp_fd = qemu_chr_fe_get_msgfd(s->server_chr);
6cbf4c8c
CM
437 IVSHMEM_DPRINTF("posn is %ld, fd is %d\n", incoming_posn, tmp_fd);
438
439 /* make sure we have enough space for this guest */
440 if (incoming_posn >= s->nb_peers) {
441 increase_dynamic_storage(s, incoming_posn);
442 }
443
444 if (tmp_fd == -1) {
445 /* if posn is positive and unseen before then this is our posn*/
446 if ((incoming_posn >= 0) &&
447 (s->peers[incoming_posn].eventfds == NULL)) {
448 /* receive our posn */
449 s->vm_id = incoming_posn;
450 return;
451 } else {
452 /* otherwise an fd == -1 means an existing guest has gone away */
453 IVSHMEM_DPRINTF("posn %ld has gone away\n", incoming_posn);
454 close_guest_eventfds(s, incoming_posn);
455 return;
456 }
457 }
458
459 /* because of the implementation of get_msgfd, we need a dup */
460 incoming_fd = dup(tmp_fd);
461
462 if (incoming_fd == -1) {
463 fprintf(stderr, "could not allocate file descriptor %s\n",
464 strerror(errno));
465 return;
466 }
467
468 /* if the position is -1, then it's shared memory region fd */
469 if (incoming_posn == -1) {
470
471 void * map_ptr;
472
473 s->max_peer = 0;
474
475 if (check_shm_size(s, incoming_fd) == -1) {
476 exit(-1);
477 }
478
479 /* mmap the region and map into the BAR2 */
480 map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
481 incoming_fd, 0);
3c161542 482 memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s),
cb06608e 483 "ivshmem.bar2", s->ivshmem_size, map_ptr);
eb3fedf3 484 vmstate_register_ram(&s->ivshmem, DEVICE(s));
6cbf4c8c 485
cb06608e 486 IVSHMEM_DPRINTF("guest h/w addr = %" PRIu64 ", size = %" PRIu64 "\n",
6cbf4c8c
CM
487 s->ivshmem_offset, s->ivshmem_size);
488
cb06608e 489 memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
6cbf4c8c
CM
490
491 /* only store the fd if it is successfully mapped */
492 s->shm_fd = incoming_fd;
493
494 return;
495 }
496
497 /* each guest has an array of eventfds, and we keep track of how many
498 * guests for each VM */
499 guest_max_eventfd = s->peers[incoming_posn].nb_eventfds;
500
501 if (guest_max_eventfd == 0) {
502 /* one eventfd per MSI vector */
563027cc 503 s->peers[incoming_posn].eventfds = g_new(EventNotifier, s->vectors);
6cbf4c8c
CM
504 }
505
506 /* this is an eventfd for a particular guest VM */
507 IVSHMEM_DPRINTF("eventfds[%ld][%d] = %d\n", incoming_posn,
508 guest_max_eventfd, incoming_fd);
563027cc
PB
509 event_notifier_init_fd(&s->peers[incoming_posn].eventfds[guest_max_eventfd],
510 incoming_fd);
6cbf4c8c
CM
511
512 /* increment count for particular guest */
513 s->peers[incoming_posn].nb_eventfds++;
514
515 /* keep track of the maximum VM ID */
516 if (incoming_posn > s->max_peer) {
517 s->max_peer = incoming_posn;
518 }
519
520 if (incoming_posn == s->vm_id) {
521 s->eventfd_chr[guest_max_eventfd] = create_eventfd_chr_device(s,
563027cc 522 &s->peers[s->vm_id].eventfds[guest_max_eventfd],
6cbf4c8c
CM
523 guest_max_eventfd);
524 }
525
526 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
563027cc 527 ivshmem_add_eventfd(s, incoming_posn, guest_max_eventfd);
6cbf4c8c 528 }
6cbf4c8c
CM
529}
530
4490c711
MT
531/* Select the MSI-X vectors used by device.
532 * ivshmem maps events to vectors statically, so
533 * we just enable all vectors on init and after reset. */
534static void ivshmem_use_msix(IVShmemState * s)
535{
b7578eaa 536 PCIDevice *d = PCI_DEVICE(s);
4490c711
MT
537 int i;
538
b7578eaa 539 if (!msix_present(d)) {
4490c711
MT
540 return;
541 }
542
543 for (i = 0; i < s->vectors; i++) {
b7578eaa 544 msix_vector_use(d, i);
4490c711
MT
545 }
546}
547
6cbf4c8c
CM
548static void ivshmem_reset(DeviceState *d)
549{
eb3fedf3 550 IVShmemState *s = IVSHMEM(d);
6cbf4c8c
CM
551
552 s->intrstatus = 0;
4490c711 553 ivshmem_use_msix(s);
6cbf4c8c
CM
554}
555
6cbf4c8c
CM
556static uint64_t ivshmem_get_size(IVShmemState * s) {
557
558 uint64_t value;
559 char *ptr;
560
561 value = strtoull(s->sizearg, &ptr, 10);
562 switch (*ptr) {
563 case 0: case 'M': case 'm':
564 value <<= 20;
565 break;
566 case 'G': case 'g':
567 value <<= 30;
568 break;
569 default:
570 fprintf(stderr, "qemu: invalid ram size: %s\n", s->sizearg);
571 exit(1);
572 }
573
574 /* BARs must be a power of 2 */
575 if (!is_power_of_two(value)) {
576 fprintf(stderr, "ivshmem: size must be power of 2\n");
577 exit(1);
578 }
579
580 return value;
581}
582
4490c711
MT
583static void ivshmem_setup_msi(IVShmemState * s)
584{
b7578eaa 585 if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
6cbf4c8c
CM
586 IVSHMEM_DPRINTF("msix initialization failed\n");
587 exit(1);
588 }
589
1116b539
AW
590 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
591
5cbdb3a3 592 /* allocate QEMU char devices for receiving interrupts */
7267c094 593 s->eventfd_table = g_malloc0(s->vectors * sizeof(EventfdEntry));
4490c711
MT
594
595 ivshmem_use_msix(s);
6cbf4c8c
CM
596}
597
598static void ivshmem_save(QEMUFile* f, void *opaque)
599{
600 IVShmemState *proxy = opaque;
b7578eaa 601 PCIDevice *pci_dev = PCI_DEVICE(proxy);
6cbf4c8c
CM
602
603 IVSHMEM_DPRINTF("ivshmem_save\n");
b7578eaa 604 pci_device_save(pci_dev, f);
6cbf4c8c
CM
605
606 if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
b7578eaa 607 msix_save(pci_dev, f);
6cbf4c8c
CM
608 } else {
609 qemu_put_be32(f, proxy->intrstatus);
610 qemu_put_be32(f, proxy->intrmask);
611 }
612
613}
614
615static int ivshmem_load(QEMUFile* f, void *opaque, int version_id)
616{
617 IVSHMEM_DPRINTF("ivshmem_load\n");
618
619 IVShmemState *proxy = opaque;
b7578eaa 620 PCIDevice *pci_dev = PCI_DEVICE(proxy);
4490c711 621 int ret;
6cbf4c8c
CM
622
623 if (version_id > 0) {
624 return -EINVAL;
625 }
626
627 if (proxy->role_val == IVSHMEM_PEER) {
628 fprintf(stderr, "ivshmem: 'peer' devices are not migratable\n");
629 return -EINVAL;
630 }
631
b7578eaa 632 ret = pci_device_load(pci_dev, f);
6cbf4c8c
CM
633 if (ret) {
634 return ret;
635 }
636
637 if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
b7578eaa 638 msix_load(pci_dev, f);
4490c711 639 ivshmem_use_msix(proxy);
6cbf4c8c
CM
640 } else {
641 proxy->intrstatus = qemu_get_be32(f);
642 proxy->intrmask = qemu_get_be32(f);
643 }
644
645 return 0;
646}
647
4490c711
MT
648static void ivshmem_write_config(PCIDevice *pci_dev, uint32_t address,
649 uint32_t val, int len)
650{
651 pci_default_write_config(pci_dev, address, val, len);
652 msix_write_config(pci_dev, address, val, len);
653}
654
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CM
655static int pci_ivshmem_init(PCIDevice *dev)
656{
eb3fedf3 657 IVShmemState *s = IVSHMEM(dev);
6cbf4c8c
CM
658 uint8_t *pci_conf;
659
660 if (s->sizearg == NULL)
661 s->ivshmem_size = 4 << 20; /* 4 MB default */
662 else {
663 s->ivshmem_size = ivshmem_get_size(s);
664 }
665
eb3fedf3 666 register_savevm(DEVICE(dev), "ivshmem", 0, 0, ivshmem_save, ivshmem_load,
6cbf4c8c
CM
667 dev);
668
669 /* IRQFD requires MSI */
670 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
671 !ivshmem_has_feature(s, IVSHMEM_MSI)) {
672 fprintf(stderr, "ivshmem: ioeventfd/irqfd requires MSI\n");
673 exit(1);
674 }
675
676 /* check that role is reasonable */
677 if (s->role) {
678 if (strncmp(s->role, "peer", 5) == 0) {
679 s->role_val = IVSHMEM_PEER;
680 } else if (strncmp(s->role, "master", 7) == 0) {
681 s->role_val = IVSHMEM_MASTER;
682 } else {
683 fprintf(stderr, "ivshmem: 'role' must be 'peer' or 'master'\n");
684 exit(1);
685 }
686 } else {
687 s->role_val = IVSHMEM_MASTER; /* default */
688 }
689
690 if (s->role_val == IVSHMEM_PEER) {
f231b88d
CR
691 error_setg(&s->migration_blocker,
692 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
38e0735e 693 migrate_add_blocker(s->migration_blocker);
6cbf4c8c
CM
694 }
695
b7578eaa 696 pci_conf = dev->config;
6cbf4c8c 697 pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
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CM
698
699 pci_config_set_interrupt_pin(pci_conf, 1);
700
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CM
701 s->shm_fd = 0;
702
3c161542 703 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
cb06608e
AK
704 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
705
6cbf4c8c 706 /* region for registers*/
b7578eaa 707 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
e824b2cc 708 &s->ivshmem_mmio);
cb06608e 709
3c161542 710 memory_region_init(&s->bar, OBJECT(s), "ivshmem-bar2-container", s->ivshmem_size);
c08ba66f
GH
711 s->ivshmem_attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
712 PCI_BASE_ADDRESS_MEM_PREFETCH;
713 if (s->ivshmem_64bit) {
714 s->ivshmem_attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
715 }
6cbf4c8c
CM
716
717 if ((s->server_chr != NULL) &&
718 (strncmp(s->server_chr->filename, "unix:", 5) == 0)) {
719 /* if we get a UNIX socket as the parameter we will talk
720 * to the ivshmem server to receive the memory region */
721
722 if (s->shmobj != NULL) {
723 fprintf(stderr, "WARNING: do not specify both 'chardev' "
724 "and 'shm' with ivshmem\n");
725 }
726
727 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
728 s->server_chr->filename);
729
730 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
731 ivshmem_setup_msi(s);
732 }
733
734 /* we allocate enough space for 16 guests and grow as needed */
735 s->nb_peers = 16;
736 s->vm_id = -1;
737
738 /* allocate/initialize space for interrupt handling */
7267c094 739 s->peers = g_malloc0(s->nb_peers * sizeof(Peer));
6cbf4c8c 740
b7578eaa 741 pci_register_bar(dev, 2, s->ivshmem_attr, &s->bar);
6cbf4c8c 742
7267c094 743 s->eventfd_chr = g_malloc0(s->vectors * sizeof(CharDriverState *));
6cbf4c8c
CM
744
745 qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
746 ivshmem_event, s);
747 } else {
748 /* just map the file immediately, we're not using a server */
749 int fd;
750
751 if (s->shmobj == NULL) {
752 fprintf(stderr, "Must specify 'chardev' or 'shm' to ivshmem\n");
baefb8bf 753 exit(1);
6cbf4c8c
CM
754 }
755
756 IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
757
758 /* try opening with O_EXCL and if it succeeds zero the memory
759 * by truncating to 0 */
760 if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
761 S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
762 /* truncate file to length PCI device's memory */
763 if (ftruncate(fd, s->ivshmem_size) != 0) {
764 fprintf(stderr, "ivshmem: could not truncate shared file\n");
765 }
766
767 } else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
768 S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
769 fprintf(stderr, "ivshmem: could not open shared file\n");
770 exit(-1);
771
772 }
773
774 if (check_shm_size(s, fd) == -1) {
775 exit(-1);
776 }
777
778 create_shared_memory_BAR(s, fd);
779
780 }
781
b7578eaa 782 dev->config_write = ivshmem_write_config;
4490c711 783
6cbf4c8c
CM
784 return 0;
785}
786
f90c2bcd 787static void pci_ivshmem_uninit(PCIDevice *dev)
6cbf4c8c 788{
eb3fedf3 789 IVShmemState *s = IVSHMEM(dev);
6cbf4c8c 790
38e0735e
AL
791 if (s->migration_blocker) {
792 migrate_del_blocker(s->migration_blocker);
793 error_free(s->migration_blocker);
794 }
795
cb06608e
AK
796 memory_region_destroy(&s->ivshmem_mmio);
797 memory_region_del_subregion(&s->bar, &s->ivshmem);
eb3fedf3 798 vmstate_unregister_ram(&s->ivshmem, DEVICE(dev));
cb06608e
AK
799 memory_region_destroy(&s->ivshmem);
800 memory_region_destroy(&s->bar);
eb3fedf3 801 unregister_savevm(DEVICE(dev), "ivshmem", s);
6cbf4c8c
CM
802}
803
40021f08
AL
804static Property ivshmem_properties[] = {
805 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
806 DEFINE_PROP_STRING("size", IVShmemState, sizearg),
807 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
808 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
809 DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
810 DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
811 DEFINE_PROP_STRING("role", IVShmemState, role),
c08ba66f 812 DEFINE_PROP_UINT32("use64", IVShmemState, ivshmem_64bit, 1),
40021f08
AL
813 DEFINE_PROP_END_OF_LIST(),
814};
815
816static void ivshmem_class_init(ObjectClass *klass, void *data)
817{
39bffca2 818 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08
AL
819 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
820
821 k->init = pci_ivshmem_init;
822 k->exit = pci_ivshmem_uninit;
b8ef62a9
PB
823 k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
824 k->device_id = PCI_DEVICE_ID_IVSHMEM;
40021f08 825 k->class_id = PCI_CLASS_MEMORY_RAM;
39bffca2
AL
826 dc->reset = ivshmem_reset;
827 dc->props = ivshmem_properties;
125ee0ed 828 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
40021f08
AL
829}
830
8c43a6f0 831static const TypeInfo ivshmem_info = {
eb3fedf3 832 .name = TYPE_IVSHMEM,
39bffca2
AL
833 .parent = TYPE_PCI_DEVICE,
834 .instance_size = sizeof(IVShmemState),
835 .class_init = ivshmem_class_init,
6cbf4c8c
CM
836};
837
83f7d43a 838static void ivshmem_register_types(void)
6cbf4c8c 839{
39bffca2 840 type_register_static(&ivshmem_info);
6cbf4c8c
CM
841}
842
83f7d43a 843type_init(ivshmem_register_types)