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CommitLineData
6cbf4c8c
CM
1/*
2 * Inter-VM Shared Memory PCI device.
3 *
4 * Author:
5 * Cam Macdonell <cam@cs.ualberta.ca>
6 *
7 * Based On: cirrus_vga.c
8 * Copyright (c) 2004 Fabrice Bellard
9 * Copyright (c) 2004 Makoto Suzuki (suzu)
10 *
11 * and rtl8139.c
12 * Copyright (c) 2006 Igor Kovalenko
13 *
14 * This code is licensed under the GNU GPL v2.
6b620ca3
PB
15 *
16 * Contributions after 2012-01-13 are licensed under the terms of the
17 * GNU GPL, version 2 or (at your option) any later version.
6cbf4c8c 18 */
83c9f4ca 19#include "hw/hw.h"
0d09e41a 20#include "hw/i386/pc.h"
83c9f4ca
PB
21#include "hw/pci/pci.h"
22#include "hw/pci/msix.h"
9c17d615 23#include "sysemu/kvm.h"
caf71f86 24#include "migration/migration.h"
d49b6836 25#include "qemu/error-report.h"
1de7afc9 26#include "qemu/event_notifier.h"
a2e9011b 27#include "qemu/fifo8.h"
dccfcd0e 28#include "sysemu/char.h"
6cbf4c8c
CM
29
30#include <sys/mman.h>
31#include <sys/types.h>
34bc07c5 32#include <limits.h>
6cbf4c8c 33
b8ef62a9
PB
34#define PCI_VENDOR_ID_IVSHMEM PCI_VENDOR_ID_REDHAT_QUMRANET
35#define PCI_DEVICE_ID_IVSHMEM 0x1110
36
61ea2d86 37#define IVSHMEM_MAX_PEERS G_MAXUINT16
6cbf4c8c
CM
38#define IVSHMEM_IOEVENTFD 0
39#define IVSHMEM_MSI 1
40
41#define IVSHMEM_PEER 0
42#define IVSHMEM_MASTER 1
43
44#define IVSHMEM_REG_BAR_SIZE 0x100
45
46//#define DEBUG_IVSHMEM
47#ifdef DEBUG_IVSHMEM
48#define IVSHMEM_DPRINTF(fmt, ...) \
49 do {printf("IVSHMEM: " fmt, ## __VA_ARGS__); } while (0)
50#else
51#define IVSHMEM_DPRINTF(fmt, ...)
52#endif
53
eb3fedf3
PC
54#define TYPE_IVSHMEM "ivshmem"
55#define IVSHMEM(obj) \
56 OBJECT_CHECK(IVShmemState, (obj), TYPE_IVSHMEM)
57
6cbf4c8c
CM
58typedef struct Peer {
59 int nb_eventfds;
563027cc 60 EventNotifier *eventfds;
6cbf4c8c
CM
61} Peer;
62
63typedef struct EventfdEntry {
64 PCIDevice *pdev;
65 int vector;
66} EventfdEntry;
67
68typedef struct IVShmemState {
b7578eaa
AF
69 /*< private >*/
70 PCIDevice parent_obj;
71 /*< public >*/
72
6cbf4c8c
CM
73 uint32_t intrmask;
74 uint32_t intrstatus;
6cbf4c8c
CM
75
76 CharDriverState **eventfd_chr;
77 CharDriverState *server_chr;
a2e9011b 78 Fifo8 incoming_fifo;
cb06608e 79 MemoryRegion ivshmem_mmio;
6cbf4c8c 80
cb06608e
AK
81 /* We might need to register the BAR before we actually have the memory.
82 * So prepare a container MemoryRegion for the BAR immediately and
83 * add a subregion when we have the memory.
84 */
85 MemoryRegion bar;
86 MemoryRegion ivshmem;
6cbf4c8c 87 uint64_t ivshmem_size; /* size of shared memory region */
c08ba66f 88 uint32_t ivshmem_64bit;
6cbf4c8c
CM
89 int shm_fd; /* shared memory file descriptor */
90
91 Peer *peers;
92 int nb_peers; /* how many guests we have space for */
6cbf4c8c
CM
93
94 int vm_id;
95 uint32_t vectors;
96 uint32_t features;
97 EventfdEntry *eventfd_table;
98
38e0735e
AL
99 Error *migration_blocker;
100
6cbf4c8c
CM
101 char * shmobj;
102 char * sizearg;
103 char * role;
104 int role_val; /* scalar to avoid multiple string comparisons */
105} IVShmemState;
106
107/* registers for the Inter-VM shared memory device */
108enum ivshmem_registers {
109 INTRMASK = 0,
110 INTRSTATUS = 4,
111 IVPOSITION = 8,
112 DOORBELL = 12,
113};
114
115static inline uint32_t ivshmem_has_feature(IVShmemState *ivs,
116 unsigned int feature) {
117 return (ivs->features & (1 << feature));
118}
119
6cbf4c8c 120/* accessing registers - based on rtl8139 */
d8a5da07 121static void ivshmem_update_irq(IVShmemState *s)
6cbf4c8c 122{
b7578eaa 123 PCIDevice *d = PCI_DEVICE(s);
6cbf4c8c
CM
124 int isr;
125 isr = (s->intrstatus & s->intrmask) & 0xffffffff;
126
127 /* don't print ISR resets */
128 if (isr) {
129 IVSHMEM_DPRINTF("Set IRQ to %d (%04x %04x)\n",
dbc464d4 130 isr ? 1 : 0, s->intrstatus, s->intrmask);
6cbf4c8c
CM
131 }
132
9e64f8a3 133 pci_set_irq(d, (isr != 0));
6cbf4c8c
CM
134}
135
136static void ivshmem_IntrMask_write(IVShmemState *s, uint32_t val)
137{
138 IVSHMEM_DPRINTF("IntrMask write(w) val = 0x%04x\n", val);
139
140 s->intrmask = val;
141
d8a5da07 142 ivshmem_update_irq(s);
6cbf4c8c
CM
143}
144
145static uint32_t ivshmem_IntrMask_read(IVShmemState *s)
146{
147 uint32_t ret = s->intrmask;
148
149 IVSHMEM_DPRINTF("intrmask read(w) val = 0x%04x\n", ret);
150
151 return ret;
152}
153
154static void ivshmem_IntrStatus_write(IVShmemState *s, uint32_t val)
155{
156 IVSHMEM_DPRINTF("IntrStatus write(w) val = 0x%04x\n", val);
157
158 s->intrstatus = val;
159
d8a5da07 160 ivshmem_update_irq(s);
6cbf4c8c
CM
161}
162
163static uint32_t ivshmem_IntrStatus_read(IVShmemState *s)
164{
165 uint32_t ret = s->intrstatus;
166
167 /* reading ISR clears all interrupts */
168 s->intrstatus = 0;
169
d8a5da07 170 ivshmem_update_irq(s);
6cbf4c8c
CM
171
172 return ret;
173}
174
a8170e5e 175static void ivshmem_io_write(void *opaque, hwaddr addr,
cb06608e 176 uint64_t val, unsigned size)
6cbf4c8c
CM
177{
178 IVShmemState *s = opaque;
179
6cbf4c8c
CM
180 uint16_t dest = val >> 16;
181 uint16_t vector = val & 0xff;
182
183 addr &= 0xfc;
184
185 IVSHMEM_DPRINTF("writing to addr " TARGET_FMT_plx "\n", addr);
186 switch (addr)
187 {
188 case INTRMASK:
189 ivshmem_IntrMask_write(s, val);
190 break;
191
192 case INTRSTATUS:
193 ivshmem_IntrStatus_write(s, val);
194 break;
195
196 case DOORBELL:
197 /* check that dest VM ID is reasonable */
95c8425c 198 if (dest >= s->nb_peers) {
6cbf4c8c
CM
199 IVSHMEM_DPRINTF("Invalid destination VM ID (%d)\n", dest);
200 break;
201 }
202
203 /* check doorbell range */
1b27d7a1 204 if (vector < s->peers[dest].nb_eventfds) {
563027cc
PB
205 IVSHMEM_DPRINTF("Notifying VM %d on vector %d\n", dest, vector);
206 event_notifier_set(&s->peers[dest].eventfds[vector]);
f59bb378
MAL
207 } else {
208 IVSHMEM_DPRINTF("Invalid destination vector %d on VM %d\n",
209 vector, dest);
6cbf4c8c
CM
210 }
211 break;
212 default:
f59bb378 213 IVSHMEM_DPRINTF("Unhandled write " TARGET_FMT_plx "\n", addr);
6cbf4c8c
CM
214 }
215}
216
a8170e5e 217static uint64_t ivshmem_io_read(void *opaque, hwaddr addr,
cb06608e 218 unsigned size)
6cbf4c8c
CM
219{
220
221 IVShmemState *s = opaque;
222 uint32_t ret;
223
224 switch (addr)
225 {
226 case INTRMASK:
227 ret = ivshmem_IntrMask_read(s);
228 break;
229
230 case INTRSTATUS:
231 ret = ivshmem_IntrStatus_read(s);
232 break;
233
234 case IVPOSITION:
235 /* return my VM ID if the memory is mapped */
236 if (s->shm_fd > 0) {
237 ret = s->vm_id;
238 } else {
239 ret = -1;
240 }
241 break;
242
243 default:
244 IVSHMEM_DPRINTF("why are we reading " TARGET_FMT_plx "\n", addr);
245 ret = 0;
246 }
247
248 return ret;
249}
250
cb06608e
AK
251static const MemoryRegionOps ivshmem_mmio_ops = {
252 .read = ivshmem_io_read,
253 .write = ivshmem_io_write,
254 .endianness = DEVICE_NATIVE_ENDIAN,
255 .impl = {
256 .min_access_size = 4,
257 .max_access_size = 4,
258 },
6cbf4c8c
CM
259};
260
261static void ivshmem_receive(void *opaque, const uint8_t *buf, int size)
262{
263 IVShmemState *s = opaque;
264
f59bb378 265 IVSHMEM_DPRINTF("ivshmem_receive 0x%02x size: %d\n", *buf, size);
6cbf4c8c 266
f59bb378 267 ivshmem_IntrStatus_write(s, *buf);
6cbf4c8c
CM
268}
269
270static int ivshmem_can_receive(void * opaque)
271{
b8ab854b 272 return sizeof(long);
6cbf4c8c
CM
273}
274
275static void ivshmem_event(void *opaque, int event)
276{
277 IVSHMEM_DPRINTF("ivshmem_event %d\n", event);
278}
279
280static void fake_irqfd(void *opaque, const uint8_t *buf, int size) {
281
282 EventfdEntry *entry = opaque;
283 PCIDevice *pdev = entry->pdev;
284
285 IVSHMEM_DPRINTF("interrupt on vector %p %d\n", pdev, entry->vector);
286 msix_notify(pdev, entry->vector);
287}
288
563027cc
PB
289static CharDriverState* create_eventfd_chr_device(void * opaque, EventNotifier *n,
290 int vector)
6cbf4c8c
CM
291{
292 /* create a event character device based on the passed eventfd */
293 IVShmemState *s = opaque;
294 CharDriverState * chr;
563027cc 295 int eventfd = event_notifier_get_fd(n);
6cbf4c8c
CM
296
297 chr = qemu_chr_open_eventfd(eventfd);
298
299 if (chr == NULL) {
36617792 300 error_report("creating chardriver for eventfd %d failed", eventfd);
03977ad5 301 return NULL;
6cbf4c8c 302 }
456d6069 303 qemu_chr_fe_claim_no_fail(chr);
6cbf4c8c
CM
304
305 /* if MSI is supported we need multiple interrupts */
306 if (ivshmem_has_feature(s, IVSHMEM_MSI)) {
b7578eaa 307 s->eventfd_table[vector].pdev = PCI_DEVICE(s);
6cbf4c8c
CM
308 s->eventfd_table[vector].vector = vector;
309
310 qemu_chr_add_handlers(chr, ivshmem_can_receive, fake_irqfd,
311 ivshmem_event, &s->eventfd_table[vector]);
312 } else {
313 qemu_chr_add_handlers(chr, ivshmem_can_receive, ivshmem_receive,
314 ivshmem_event, s);
315 }
316
317 return chr;
318
319}
320
d58d7e84
MAL
321static int check_shm_size(IVShmemState *s, int fd, Error **errp)
322{
6cbf4c8c
CM
323 /* check that the guest isn't going to try and map more memory than the
324 * the object has allocated return -1 to indicate error */
325
326 struct stat buf;
327
5edbdbcd 328 if (fstat(fd, &buf) < 0) {
d58d7e84
MAL
329 error_setg(errp, "exiting: fstat on fd %d failed: %s",
330 fd, strerror(errno));
5edbdbcd
HZ
331 return -1;
332 }
6cbf4c8c
CM
333
334 if (s->ivshmem_size > buf.st_size) {
d58d7e84
MAL
335 error_setg(errp, "Requested memory size greater"
336 " than shared object size (%" PRIu64 " > %" PRIu64")",
337 s->ivshmem_size, (uint64_t)buf.st_size);
6cbf4c8c
CM
338 return -1;
339 } else {
340 return 0;
341 }
342}
343
344/* create the shared memory BAR when we are not using the server, so we can
345 * create the BAR and map the memory immediately */
d58d7e84
MAL
346static int create_shared_memory_BAR(IVShmemState *s, int fd, uint8_t attr,
347 Error **errp)
348{
6cbf4c8c
CM
349 void * ptr;
350
6cbf4c8c 351 ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0);
d58d7e84
MAL
352 if (ptr == MAP_FAILED) {
353 error_setg_errno(errp, errno, "Failed to mmap shared memory");
354 return -1;
355 }
356
357 s->shm_fd = fd;
6cbf4c8c 358
3c161542 359 memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s), "ivshmem.bar2",
cb06608e 360 s->ivshmem_size, ptr);
eb3fedf3 361 vmstate_register_ram(&s->ivshmem, DEVICE(s));
cb06608e 362 memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
6cbf4c8c
CM
363
364 /* region for shared memory */
9113e3f3 365 pci_register_bar(PCI_DEVICE(s), 2, attr, &s->bar);
d58d7e84
MAL
366
367 return 0;
6cbf4c8c
CM
368}
369
563027cc
PB
370static void ivshmem_add_eventfd(IVShmemState *s, int posn, int i)
371{
372 memory_region_add_eventfd(&s->ivshmem_mmio,
373 DOORBELL,
374 4,
375 true,
376 (posn << 16) | i,
753d5e14 377 &s->peers[posn].eventfds[i]);
563027cc
PB
378}
379
380static void ivshmem_del_eventfd(IVShmemState *s, int posn, int i)
381{
382 memory_region_del_eventfd(&s->ivshmem_mmio,
383 DOORBELL,
384 4,
385 true,
386 (posn << 16) | i,
753d5e14 387 &s->peers[posn].eventfds[i]);
563027cc
PB
388}
389
6cbf4c8c
CM
390static void close_guest_eventfds(IVShmemState *s, int posn)
391{
392 int i, guest_curr_max;
393
98609cd8
PB
394 if (!ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
395 return;
396 }
363ba1c7 397 if (posn < 0 || posn >= s->nb_peers) {
ffa99afd 398 error_report("invalid peer %d", posn);
363ba1c7
SH
399 return;
400 }
98609cd8 401
6cbf4c8c
CM
402 guest_curr_max = s->peers[posn].nb_eventfds;
403
b6a1f3a5 404 memory_region_transaction_begin();
6cbf4c8c 405 for (i = 0; i < guest_curr_max; i++) {
563027cc 406 ivshmem_del_eventfd(s, posn, i);
b6a1f3a5
PB
407 }
408 memory_region_transaction_commit();
409 for (i = 0; i < guest_curr_max; i++) {
563027cc 410 event_notifier_cleanup(&s->peers[posn].eventfds[i]);
6cbf4c8c
CM
411 }
412
7267c094 413 g_free(s->peers[posn].eventfds);
6cbf4c8c
CM
414 s->peers[posn].nb_eventfds = 0;
415}
416
6cbf4c8c
CM
417/* this function increase the dynamic storage need to store data about other
418 * guests */
1300b273 419static int resize_peers(IVShmemState *s, int new_min_size)
34bc07c5 420{
6cbf4c8c 421
1300b273 422 int j, old_size;
6cbf4c8c 423
61ea2d86
MAL
424 /* limit number of max peers */
425 if (new_min_size <= 0 || new_min_size > IVSHMEM_MAX_PEERS) {
34bc07c5
SK
426 return -1;
427 }
1300b273 428 if (new_min_size <= s->nb_peers) {
34bc07c5
SK
429 return 0;
430 }
6cbf4c8c 431
1300b273
MAL
432 old_size = s->nb_peers;
433 s->nb_peers = new_min_size;
434
6cbf4c8c 435 IVSHMEM_DPRINTF("bumping storage to %d guests\n", s->nb_peers);
1300b273 436
7267c094 437 s->peers = g_realloc(s->peers, s->nb_peers * sizeof(Peer));
6cbf4c8c 438
1300b273 439 for (j = old_size; j < s->nb_peers; j++) {
81e507f0 440 s->peers[j].eventfds = g_new0(EventNotifier, s->vectors);
6cbf4c8c
CM
441 s->peers[j].nb_eventfds = 0;
442 }
34bc07c5
SK
443
444 return 0;
6cbf4c8c
CM
445}
446
0f14fd71
MAL
447static bool fifo_update_and_get(IVShmemState *s, const uint8_t *buf, int size,
448 void *data, size_t len)
449{
450 const uint8_t *p;
451 uint32_t num;
452
453 assert(len <= sizeof(long)); /* limitation of the fifo */
454 if (fifo8_is_empty(&s->incoming_fifo) && size == len) {
455 memcpy(data, buf, size);
456 return true;
457 }
458
459 IVSHMEM_DPRINTF("short read of %d bytes\n", size);
460
461 num = MIN(size, sizeof(long) - fifo8_num_used(&s->incoming_fifo));
462 fifo8_push_all(&s->incoming_fifo, buf, num);
463
464 if (fifo8_num_used(&s->incoming_fifo) < len) {
465 assert(num == 0);
466 return false;
467 }
468
469 size -= num;
470 buf += num;
471 p = fifo8_pop_buf(&s->incoming_fifo, len, &num);
472 assert(num == len);
473
474 memcpy(data, p, len);
475
476 if (size > 0) {
477 fifo8_push_all(&s->incoming_fifo, buf, size);
478 }
479
480 return true;
481}
482
a2e9011b 483static void ivshmem_read(void *opaque, const uint8_t *buf, int size)
6cbf4c8c
CM
484{
485 IVShmemState *s = opaque;
dee2151e 486 int incoming_fd;
9a2f0e64 487 int new_eventfd;
6cbf4c8c 488 long incoming_posn;
d58d7e84 489 Error *err = NULL;
9a2f0e64 490 Peer *peer;
6cbf4c8c 491
0f14fd71
MAL
492 if (!fifo_update_and_get(s, buf, size,
493 &incoming_posn, sizeof(incoming_posn))) {
494 return;
a2e9011b
SH
495 }
496
363ba1c7
SH
497 if (incoming_posn < -1) {
498 IVSHMEM_DPRINTF("invalid incoming_posn %ld\n", incoming_posn);
499 return;
500 }
501
6cbf4c8c 502 /* pick off s->server_chr->msgfd and store it, posn should accompany msg */
dee2151e
MAL
503 incoming_fd = qemu_chr_fe_get_msgfd(s->server_chr);
504 IVSHMEM_DPRINTF("posn is %ld, fd is %d\n", incoming_posn, incoming_fd);
6cbf4c8c
CM
505
506 /* make sure we have enough space for this guest */
507 if (incoming_posn >= s->nb_peers) {
1300b273
MAL
508 if (resize_peers(s, incoming_posn + 1) < 0) {
509 error_report("failed to resize peers array");
dee2151e
MAL
510 if (incoming_fd != -1) {
511 close(incoming_fd);
34bc07c5
SK
512 }
513 return;
514 }
6cbf4c8c
CM
515 }
516
9a2f0e64
MAL
517 peer = &s->peers[incoming_posn];
518
dee2151e 519 if (incoming_fd == -1) {
6cbf4c8c 520 /* if posn is positive and unseen before then this is our posn*/
81e507f0 521 if (incoming_posn >= 0 && s->vm_id == -1) {
6cbf4c8c
CM
522 /* receive our posn */
523 s->vm_id = incoming_posn;
6cbf4c8c
CM
524 } else {
525 /* otherwise an fd == -1 means an existing guest has gone away */
526 IVSHMEM_DPRINTF("posn %ld has gone away\n", incoming_posn);
527 close_guest_eventfds(s, incoming_posn);
6cbf4c8c 528 }
6f8a16d5 529 return;
6cbf4c8c
CM
530 }
531
6cbf4c8c
CM
532 /* if the position is -1, then it's shared memory region fd */
533 if (incoming_posn == -1) {
6cbf4c8c
CM
534 void * map_ptr;
535
d58d7e84
MAL
536 if (check_shm_size(s, incoming_fd, &err) == -1) {
537 error_report_err(err);
538 close(incoming_fd);
539 return;
6cbf4c8c
CM
540 }
541
542 /* mmap the region and map into the BAR2 */
543 map_ptr = mmap(0, s->ivshmem_size, PROT_READ|PROT_WRITE, MAP_SHARED,
544 incoming_fd, 0);
d58d7e84
MAL
545 if (map_ptr == MAP_FAILED) {
546 error_report("Failed to mmap shared memory %s", strerror(errno));
547 close(incoming_fd);
548 return;
549 }
3c161542 550 memory_region_init_ram_ptr(&s->ivshmem, OBJECT(s),
cb06608e 551 "ivshmem.bar2", s->ivshmem_size, map_ptr);
eb3fedf3 552 vmstate_register_ram(&s->ivshmem, DEVICE(s));
6cbf4c8c 553
7f9efb6b 554 IVSHMEM_DPRINTF("guest h/w addr = %p, size = %" PRIu64 "\n",
dbc464d4 555 map_ptr, s->ivshmem_size);
6cbf4c8c 556
cb06608e 557 memory_region_add_subregion(&s->bar, 0, &s->ivshmem);
6cbf4c8c
CM
558
559 /* only store the fd if it is successfully mapped */
560 s->shm_fd = incoming_fd;
561
562 return;
563 }
564
9a2f0e64
MAL
565 /* each peer has an associated array of eventfds, and we keep
566 * track of how many eventfds received so far */
567 /* get a new eventfd: */
568 new_eventfd = peer->nb_eventfds++;
6cbf4c8c 569
6cbf4c8c
CM
570 /* this is an eventfd for a particular guest VM */
571 IVSHMEM_DPRINTF("eventfds[%ld][%d] = %d\n", incoming_posn,
9a2f0e64
MAL
572 new_eventfd, incoming_fd);
573 event_notifier_init_fd(&peer->eventfds[new_eventfd], incoming_fd);
6cbf4c8c 574
6cbf4c8c 575 if (incoming_posn == s->vm_id) {
9a2f0e64
MAL
576 s->eventfd_chr[new_eventfd] = create_eventfd_chr_device(s,
577 &s->peers[s->vm_id].eventfds[new_eventfd],
578 new_eventfd);
6cbf4c8c
CM
579 }
580
581 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD)) {
9a2f0e64 582 ivshmem_add_eventfd(s, incoming_posn, new_eventfd);
6cbf4c8c 583 }
6cbf4c8c
CM
584}
585
4490c711
MT
586/* Select the MSI-X vectors used by device.
587 * ivshmem maps events to vectors statically, so
588 * we just enable all vectors on init and after reset. */
589static void ivshmem_use_msix(IVShmemState * s)
590{
b7578eaa 591 PCIDevice *d = PCI_DEVICE(s);
4490c711
MT
592 int i;
593
f59bb378 594 IVSHMEM_DPRINTF("%s, msix present: %d\n", __func__, msix_present(d));
b7578eaa 595 if (!msix_present(d)) {
4490c711
MT
596 return;
597 }
598
599 for (i = 0; i < s->vectors; i++) {
b7578eaa 600 msix_vector_use(d, i);
4490c711
MT
601 }
602}
603
6cbf4c8c
CM
604static void ivshmem_reset(DeviceState *d)
605{
eb3fedf3 606 IVShmemState *s = IVSHMEM(d);
6cbf4c8c
CM
607
608 s->intrstatus = 0;
4490c711 609 ivshmem_use_msix(s);
6cbf4c8c
CM
610}
611
d58d7e84 612static uint64_t ivshmem_get_size(IVShmemState * s, Error **errp) {
6cbf4c8c
CM
613
614 uint64_t value;
615 char *ptr;
616
617 value = strtoull(s->sizearg, &ptr, 10);
618 switch (*ptr) {
619 case 0: case 'M': case 'm':
620 value <<= 20;
621 break;
622 case 'G': case 'g':
623 value <<= 30;
624 break;
625 default:
d58d7e84
MAL
626 error_setg(errp, "invalid ram size: %s", s->sizearg);
627 return 0;
6cbf4c8c
CM
628 }
629
630 /* BARs must be a power of 2 */
e3093663 631 if (!is_power_of_2(value)) {
d58d7e84
MAL
632 error_setg(errp, "size must be power of 2");
633 return 0;
6cbf4c8c
CM
634 }
635
636 return value;
637}
638
d58d7e84 639static int ivshmem_setup_msi(IVShmemState * s)
4490c711 640{
b7578eaa 641 if (msix_init_exclusive_bar(PCI_DEVICE(s), s->vectors, 1)) {
d58d7e84 642 return -1;
6cbf4c8c
CM
643 }
644
1116b539
AW
645 IVSHMEM_DPRINTF("msix initialized (%d vectors)\n", s->vectors);
646
5cbdb3a3 647 /* allocate QEMU char devices for receiving interrupts */
7267c094 648 s->eventfd_table = g_malloc0(s->vectors * sizeof(EventfdEntry));
4490c711
MT
649
650 ivshmem_use_msix(s);
d58d7e84 651 return 0;
6cbf4c8c
CM
652}
653
654static void ivshmem_save(QEMUFile* f, void *opaque)
655{
656 IVShmemState *proxy = opaque;
b7578eaa 657 PCIDevice *pci_dev = PCI_DEVICE(proxy);
6cbf4c8c
CM
658
659 IVSHMEM_DPRINTF("ivshmem_save\n");
b7578eaa 660 pci_device_save(pci_dev, f);
6cbf4c8c
CM
661
662 if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
b7578eaa 663 msix_save(pci_dev, f);
6cbf4c8c
CM
664 } else {
665 qemu_put_be32(f, proxy->intrstatus);
666 qemu_put_be32(f, proxy->intrmask);
667 }
668
669}
670
671static int ivshmem_load(QEMUFile* f, void *opaque, int version_id)
672{
673 IVSHMEM_DPRINTF("ivshmem_load\n");
674
675 IVShmemState *proxy = opaque;
b7578eaa 676 PCIDevice *pci_dev = PCI_DEVICE(proxy);
4490c711 677 int ret;
6cbf4c8c
CM
678
679 if (version_id > 0) {
680 return -EINVAL;
681 }
682
683 if (proxy->role_val == IVSHMEM_PEER) {
dbc464d4 684 error_report("'peer' devices are not migratable");
6cbf4c8c
CM
685 return -EINVAL;
686 }
687
b7578eaa 688 ret = pci_device_load(pci_dev, f);
6cbf4c8c
CM
689 if (ret) {
690 return ret;
691 }
692
693 if (ivshmem_has_feature(proxy, IVSHMEM_MSI)) {
b7578eaa 694 msix_load(pci_dev, f);
4490c711 695 ivshmem_use_msix(proxy);
6cbf4c8c
CM
696 } else {
697 proxy->intrstatus = qemu_get_be32(f);
698 proxy->intrmask = qemu_get_be32(f);
699 }
700
701 return 0;
702}
703
4490c711 704static void ivshmem_write_config(PCIDevice *pci_dev, uint32_t address,
d58d7e84 705 uint32_t val, int len)
4490c711
MT
706{
707 pci_default_write_config(pci_dev, address, val, len);
4490c711
MT
708}
709
d58d7e84 710static void pci_ivshmem_realize(PCIDevice *dev, Error **errp)
6cbf4c8c 711{
eb3fedf3 712 IVShmemState *s = IVSHMEM(dev);
6cbf4c8c 713 uint8_t *pci_conf;
9113e3f3
MAL
714 uint8_t attr = PCI_BASE_ADDRESS_SPACE_MEMORY |
715 PCI_BASE_ADDRESS_MEM_PREFETCH;
d58d7e84 716 Error *local_err = NULL;
6cbf4c8c 717
d58d7e84 718 if (s->sizearg == NULL) {
6cbf4c8c 719 s->ivshmem_size = 4 << 20; /* 4 MB default */
d58d7e84
MAL
720 } else {
721 s->ivshmem_size = ivshmem_get_size(s, &local_err);
722 if (local_err) {
723 error_propagate(errp, local_err);
724 return;
725 }
6cbf4c8c
CM
726 }
727
a2e9011b 728 fifo8_create(&s->incoming_fifo, sizeof(long));
eb3fedf3 729 register_savevm(DEVICE(dev), "ivshmem", 0, 0, ivshmem_save, ivshmem_load,
6cbf4c8c 730 dev);
6cbf4c8c
CM
731 /* IRQFD requires MSI */
732 if (ivshmem_has_feature(s, IVSHMEM_IOEVENTFD) &&
733 !ivshmem_has_feature(s, IVSHMEM_MSI)) {
d58d7e84
MAL
734 error_setg(errp, "ioeventfd/irqfd requires MSI");
735 return;
6cbf4c8c
CM
736 }
737
738 /* check that role is reasonable */
739 if (s->role) {
740 if (strncmp(s->role, "peer", 5) == 0) {
741 s->role_val = IVSHMEM_PEER;
742 } else if (strncmp(s->role, "master", 7) == 0) {
743 s->role_val = IVSHMEM_MASTER;
744 } else {
d58d7e84
MAL
745 error_setg(errp, "'role' must be 'peer' or 'master'");
746 return;
6cbf4c8c
CM
747 }
748 } else {
749 s->role_val = IVSHMEM_MASTER; /* default */
750 }
751
752 if (s->role_val == IVSHMEM_PEER) {
f231b88d
CR
753 error_setg(&s->migration_blocker,
754 "Migration is disabled when using feature 'peer mode' in device 'ivshmem'");
38e0735e 755 migrate_add_blocker(s->migration_blocker);
6cbf4c8c
CM
756 }
757
b7578eaa 758 pci_conf = dev->config;
6cbf4c8c 759 pci_conf[PCI_COMMAND] = PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
6cbf4c8c
CM
760
761 pci_config_set_interrupt_pin(pci_conf, 1);
762
6cbf4c8c
CM
763 s->shm_fd = 0;
764
3c161542 765 memory_region_init_io(&s->ivshmem_mmio, OBJECT(s), &ivshmem_mmio_ops, s,
cb06608e
AK
766 "ivshmem-mmio", IVSHMEM_REG_BAR_SIZE);
767
6cbf4c8c 768 /* region for registers*/
b7578eaa 769 pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY,
e824b2cc 770 &s->ivshmem_mmio);
cb06608e 771
3c161542 772 memory_region_init(&s->bar, OBJECT(s), "ivshmem-bar2-container", s->ivshmem_size);
c08ba66f 773 if (s->ivshmem_64bit) {
9113e3f3 774 attr |= PCI_BASE_ADDRESS_MEM_TYPE_64;
c08ba66f 775 }
6cbf4c8c 776
36617792
MAL
777 if (s->server_chr != NULL) {
778 if (strncmp(s->server_chr->filename, "unix:", 5)) {
779 error_setg(errp, "chardev is not a unix client socket");
780 return;
781 }
782
6cbf4c8c
CM
783 /* if we get a UNIX socket as the parameter we will talk
784 * to the ivshmem server to receive the memory region */
785
786 if (s->shmobj != NULL) {
d58d7e84
MAL
787 error_setg(errp, "do not specify both 'chardev' "
788 "and 'shm' with ivshmem");
789 return;
6cbf4c8c
CM
790 }
791
792 IVSHMEM_DPRINTF("using shared memory server (socket = %s)\n",
dbc464d4 793 s->server_chr->filename);
6cbf4c8c 794
d58d7e84
MAL
795 if (ivshmem_has_feature(s, IVSHMEM_MSI) &&
796 ivshmem_setup_msi(s)) {
797 error_setg(errp, "msix initialization failed");
798 return;
6cbf4c8c
CM
799 }
800
801 /* we allocate enough space for 16 guests and grow as needed */
1300b273 802 resize_peers(s, 16);
6cbf4c8c
CM
803 s->vm_id = -1;
804
9113e3f3 805 pci_register_bar(dev, 2, attr, &s->bar);
6cbf4c8c 806
7267c094 807 s->eventfd_chr = g_malloc0(s->vectors * sizeof(CharDriverState *));
6cbf4c8c
CM
808
809 qemu_chr_add_handlers(s->server_chr, ivshmem_can_receive, ivshmem_read,
810 ivshmem_event, s);
811 } else {
812 /* just map the file immediately, we're not using a server */
813 int fd;
814
815 if (s->shmobj == NULL) {
d58d7e84
MAL
816 error_setg(errp, "Must specify 'chardev' or 'shm' to ivshmem");
817 return;
6cbf4c8c
CM
818 }
819
820 IVSHMEM_DPRINTF("using shm_open (shm object = %s)\n", s->shmobj);
821
822 /* try opening with O_EXCL and if it succeeds zero the memory
823 * by truncating to 0 */
824 if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR|O_EXCL,
825 S_IRWXU|S_IRWXG|S_IRWXO)) > 0) {
826 /* truncate file to length PCI device's memory */
827 if (ftruncate(fd, s->ivshmem_size) != 0) {
dbc464d4 828 error_report("could not truncate shared file");
6cbf4c8c
CM
829 }
830
831 } else if ((fd = shm_open(s->shmobj, O_CREAT|O_RDWR,
832 S_IRWXU|S_IRWXG|S_IRWXO)) < 0) {
d58d7e84
MAL
833 error_setg(errp, "could not open shared file");
834 return;
6cbf4c8c
CM
835 }
836
d58d7e84
MAL
837 if (check_shm_size(s, fd, errp) == -1) {
838 return;
6cbf4c8c
CM
839 }
840
d58d7e84 841 create_shared_memory_BAR(s, fd, attr, errp);
6cbf4c8c 842 }
6cbf4c8c
CM
843}
844
d58d7e84 845static void pci_ivshmem_exit(PCIDevice *dev)
6cbf4c8c 846{
eb3fedf3 847 IVShmemState *s = IVSHMEM(dev);
6cbf4c8c 848
38e0735e
AL
849 if (s->migration_blocker) {
850 migrate_del_blocker(s->migration_blocker);
851 error_free(s->migration_blocker);
852 }
853
cb06608e 854 memory_region_del_subregion(&s->bar, &s->ivshmem);
eb3fedf3 855 vmstate_unregister_ram(&s->ivshmem, DEVICE(dev));
eb3fedf3 856 unregister_savevm(DEVICE(dev), "ivshmem", s);
a2e9011b 857 fifo8_destroy(&s->incoming_fifo);
6cbf4c8c
CM
858}
859
40021f08
AL
860static Property ivshmem_properties[] = {
861 DEFINE_PROP_CHR("chardev", IVShmemState, server_chr),
862 DEFINE_PROP_STRING("size", IVShmemState, sizearg),
863 DEFINE_PROP_UINT32("vectors", IVShmemState, vectors, 1),
864 DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD, false),
865 DEFINE_PROP_BIT("msi", IVShmemState, features, IVSHMEM_MSI, true),
866 DEFINE_PROP_STRING("shm", IVShmemState, shmobj),
867 DEFINE_PROP_STRING("role", IVShmemState, role),
c08ba66f 868 DEFINE_PROP_UINT32("use64", IVShmemState, ivshmem_64bit, 1),
40021f08
AL
869 DEFINE_PROP_END_OF_LIST(),
870};
871
872static void ivshmem_class_init(ObjectClass *klass, void *data)
873{
39bffca2 874 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08
AL
875 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
876
d58d7e84
MAL
877 k->realize = pci_ivshmem_realize;
878 k->exit = pci_ivshmem_exit;
879 k->config_write = ivshmem_write_config;
b8ef62a9
PB
880 k->vendor_id = PCI_VENDOR_ID_IVSHMEM;
881 k->device_id = PCI_DEVICE_ID_IVSHMEM;
40021f08 882 k->class_id = PCI_CLASS_MEMORY_RAM;
39bffca2
AL
883 dc->reset = ivshmem_reset;
884 dc->props = ivshmem_properties;
125ee0ed 885 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
40021f08
AL
886}
887
8c43a6f0 888static const TypeInfo ivshmem_info = {
eb3fedf3 889 .name = TYPE_IVSHMEM,
39bffca2
AL
890 .parent = TYPE_PCI_DEVICE,
891 .instance_size = sizeof(IVShmemState),
892 .class_init = ivshmem_class_init,
6cbf4c8c
CM
893};
894
83f7d43a 895static void ivshmem_register_types(void)
6cbf4c8c 896{
39bffca2 897 type_register_static(&ivshmem_info);
6cbf4c8c
CM
898}
899
83f7d43a 900type_init(ivshmem_register_types)