]>
Commit | Line | Data |
---|---|---|
267002cd | 1 | /* |
3cbee15b | 2 | * QEMU PowerMac CUDA device support |
5fafdf24 | 3 | * |
3cbee15b JM |
4 | * Copyright (c) 2004-2007 Fabrice Bellard |
5 | * Copyright (c) 2007 Jocelyn Mayer | |
5fafdf24 | 6 | * |
267002cd FB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
0b8fa32f | 25 | |
0d75590d | 26 | #include "qemu/osdep.h" |
a8d25326 | 27 | #include "qemu-common.h" |
83c9f4ca PB |
28 | #include "hw/hw.h" |
29 | #include "hw/ppc/mac.h" | |
0d09e41a | 30 | #include "hw/input/adb.h" |
09a57347 | 31 | #include "hw/misc/mos6522.h" |
7092e84d | 32 | #include "hw/misc/macio/cuda.h" |
1de7afc9 | 33 | #include "qemu/timer.h" |
9c17d615 | 34 | #include "sysemu/sysemu.h" |
f348b6d1 | 35 | #include "qemu/cutils.h" |
03dd024f | 36 | #include "qemu/log.h" |
0b8fa32f | 37 | #include "qemu/module.h" |
4b402e09 | 38 | #include "trace.h" |
ea026b2f | 39 | |
267002cd | 40 | /* Bits in B data register: all active low */ |
09a57347 MCA |
41 | #define TREQ 0x08 /* Transfer request (input) */ |
42 | #define TACK 0x10 /* Transfer acknowledge (output) */ | |
43 | #define TIP 0x20 /* Transfer in progress (output) */ | |
267002cd FB |
44 | |
45 | /* commands (1st byte) */ | |
09a57347 MCA |
46 | #define ADB_PACKET 0 |
47 | #define CUDA_PACKET 1 | |
48 | #define ERROR_PACKET 2 | |
49 | #define TIMER_PACKET 3 | |
50 | #define POWER_PACKET 4 | |
51 | #define MACIIC_PACKET 5 | |
52 | #define PMU_PACKET 6 | |
267002cd FB |
53 | |
54 | #define CUDA_TIMER_FREQ (4700000 / 6) | |
55 | ||
d7ce296f FB |
56 | /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */ |
57 | #define RTC_OFFSET 2082844800 | |
58 | ||
5fafdf24 | 59 | static void cuda_receive_packet_from_host(CUDAState *s, |
267002cd FB |
60 | const uint8_t *data, int len); |
61 | ||
09a57347 MCA |
62 | /* MacOS uses timer 1 for calibration on startup, so we use |
63 | * the timebase frequency and cuda_get_counter_value() with | |
64 | * cuda_get_load_time() to steer MacOS to calculate calibrate its timers | |
65 | * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda | |
66 | * timer to expose tbfreq to guest" for more information) */ | |
267002cd | 67 | |
09a57347 | 68 | static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti) |
b981289c | 69 | { |
09a57347 | 70 | MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); |
2e3e5c7e | 71 | CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); |
09a57347 | 72 | |
ce19480e MCA |
73 | /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */ |
74 | uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), | |
09a57347 | 75 | cs->tb_frequency, NANOSECONDS_PER_SECOND) - |
ce19480e MCA |
76 | ti->load_time; |
77 | ||
09a57347 | 78 | return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24); |
ce19480e MCA |
79 | } |
80 | ||
09a57347 | 81 | static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti) |
ce19480e | 82 | { |
09a57347 | 83 | MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); |
2e3e5c7e | 84 | CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); |
09a57347 | 85 | |
ce19480e | 86 | uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), |
09a57347 | 87 | cs->tb_frequency, NANOSECONDS_PER_SECOND); |
ce19480e | 88 | return load_time; |
b981289c AG |
89 | } |
90 | ||
cffc331a MCA |
91 | static void cuda_set_sr_int(void *opaque) |
92 | { | |
93 | CUDAState *s = opaque; | |
2e3e5c7e | 94 | MOS6522CUDAState *mcs = &s->mos6522_cuda; |
09a57347 MCA |
95 | MOS6522State *ms = MOS6522(mcs); |
96 | MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); | |
cffc331a | 97 | |
09a57347 | 98 | mdc->set_sr_int(ms); |
cffc331a MCA |
99 | } |
100 | ||
101 | static void cuda_delay_set_sr_int(CUDAState *s) | |
102 | { | |
103 | int64_t expire; | |
104 | ||
4b402e09 | 105 | trace_cuda_delay_set_sr_int(); |
cffc331a | 106 | |
09a57347 | 107 | expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns; |
cffc331a MCA |
108 | timer_mod(s->sr_delay_timer, expire); |
109 | } | |
110 | ||
267002cd FB |
111 | /* NOTE: TIP and TREQ are negated */ |
112 | static void cuda_update(CUDAState *s) | |
113 | { | |
2e3e5c7e | 114 | MOS6522CUDAState *mcs = &s->mos6522_cuda; |
09a57347 | 115 | MOS6522State *ms = MOS6522(mcs); |
819e712b FB |
116 | int packet_received, len; |
117 | ||
118 | packet_received = 0; | |
09a57347 | 119 | if (!(ms->b & TIP)) { |
819e712b | 120 | /* transfer requested from host */ |
267002cd | 121 | |
09a57347 | 122 | if (ms->acr & SR_OUT) { |
819e712b | 123 | /* data output */ |
09a57347 | 124 | if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) { |
819e712b | 125 | if (s->data_out_index < sizeof(s->data_out)) { |
4b402e09 | 126 | trace_cuda_data_send(ms->sr); |
09a57347 | 127 | s->data_out[s->data_out_index++] = ms->sr; |
cffc331a | 128 | cuda_delay_set_sr_int(s); |
819e712b FB |
129 | } |
130 | } | |
131 | } else { | |
132 | if (s->data_in_index < s->data_in_size) { | |
133 | /* data input */ | |
09a57347 MCA |
134 | if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) { |
135 | ms->sr = s->data_in[s->data_in_index++]; | |
4b402e09 | 136 | trace_cuda_data_recv(ms->sr); |
819e712b FB |
137 | /* indicate end of transfer */ |
138 | if (s->data_in_index >= s->data_in_size) { | |
09a57347 | 139 | ms->b = (ms->b | TREQ); |
819e712b | 140 | } |
cffc331a | 141 | cuda_delay_set_sr_int(s); |
819e712b | 142 | } |
267002cd | 143 | } |
819e712b FB |
144 | } |
145 | } else { | |
146 | /* no transfer requested: handle sync case */ | |
09a57347 | 147 | if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) { |
819e712b | 148 | /* update TREQ state each time TACK change state */ |
09a57347 MCA |
149 | if (ms->b & TACK) { |
150 | ms->b = (ms->b | TREQ); | |
151 | } else { | |
152 | ms->b = (ms->b & ~TREQ); | |
153 | } | |
cffc331a | 154 | cuda_delay_set_sr_int(s); |
819e712b FB |
155 | } else { |
156 | if (!(s->last_b & TIP)) { | |
e91c8a77 | 157 | /* handle end of host to cuda transfer */ |
819e712b | 158 | packet_received = (s->data_out_index > 0); |
e91c8a77 | 159 | /* always an IRQ at the end of transfer */ |
cffc331a | 160 | cuda_delay_set_sr_int(s); |
819e712b FB |
161 | } |
162 | /* signal if there is data to read */ | |
163 | if (s->data_in_index < s->data_in_size) { | |
09a57347 | 164 | ms->b = (ms->b & ~TREQ); |
819e712b | 165 | } |
267002cd FB |
166 | } |
167 | } | |
168 | ||
09a57347 MCA |
169 | s->last_acr = ms->acr; |
170 | s->last_b = ms->b; | |
819e712b FB |
171 | |
172 | /* NOTE: cuda_receive_packet_from_host() can call cuda_update() | |
173 | recursively */ | |
174 | if (packet_received) { | |
175 | len = s->data_out_index; | |
176 | s->data_out_index = 0; | |
177 | cuda_receive_packet_from_host(s, s->data_out, len); | |
178 | } | |
267002cd FB |
179 | } |
180 | ||
5fafdf24 | 181 | static void cuda_send_packet_to_host(CUDAState *s, |
267002cd FB |
182 | const uint8_t *data, int len) |
183 | { | |
4b402e09 MCA |
184 | int i; |
185 | ||
186 | trace_cuda_packet_send(len); | |
187 | for (i = 0; i < len; i++) { | |
188 | trace_cuda_packet_send_data(i, data[i]); | |
819e712b | 189 | } |
4b402e09 | 190 | |
267002cd FB |
191 | memcpy(s->data_in, data, len); |
192 | s->data_in_size = len; | |
193 | s->data_in_index = 0; | |
194 | cuda_update(s); | |
cffc331a | 195 | cuda_delay_set_sr_int(s); |
267002cd FB |
196 | } |
197 | ||
7db4eea6 | 198 | static void cuda_adb_poll(void *opaque) |
e2733d20 FB |
199 | { |
200 | CUDAState *s = opaque; | |
201 | uint8_t obuf[ADB_MAX_OUT_LEN + 2]; | |
202 | int olen; | |
203 | ||
216c906e | 204 | olen = adb_poll(&s->adb_bus, obuf + 2, s->adb_poll_mask); |
e2733d20 FB |
205 | if (olen > 0) { |
206 | obuf[0] = ADB_PACKET; | |
207 | obuf[1] = 0x40; /* polled data */ | |
208 | cuda_send_packet_to_host(s, obuf, olen + 2); | |
209 | } | |
09a57347 MCA |
210 | timer_mod(s->adb_poll_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + |
211 | (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); | |
e2733d20 FB |
212 | } |
213 | ||
d20efaeb HP |
214 | /* description of commands */ |
215 | typedef struct CudaCommand { | |
216 | uint8_t command; | |
217 | const char *name; | |
218 | bool (*handler)(CUDAState *s, | |
219 | const uint8_t *in_args, int in_len, | |
220 | uint8_t *out_args, int *out_len); | |
221 | } CudaCommand; | |
222 | ||
1cdab104 HP |
223 | static bool cuda_cmd_autopoll(CUDAState *s, |
224 | const uint8_t *in_data, int in_len, | |
225 | uint8_t *out_data, int *out_len) | |
226 | { | |
227 | int autopoll; | |
228 | ||
229 | if (in_len != 1) { | |
230 | return false; | |
231 | } | |
232 | ||
233 | autopoll = (in_data[0] != 0); | |
234 | if (autopoll != s->autopoll) { | |
235 | s->autopoll = autopoll; | |
236 | if (autopoll) { | |
237 | timer_mod(s->adb_poll_timer, | |
238 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
73bcb24d | 239 | (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); |
1cdab104 HP |
240 | } else { |
241 | timer_del(s->adb_poll_timer); | |
242 | } | |
243 | } | |
244 | return true; | |
245 | } | |
246 | ||
374312e7 HP |
247 | static bool cuda_cmd_set_autorate(CUDAState *s, |
248 | const uint8_t *in_data, int in_len, | |
249 | uint8_t *out_data, int *out_len) | |
250 | { | |
251 | if (in_len != 1) { | |
252 | return false; | |
253 | } | |
254 | ||
255 | /* we don't want a period of 0 ms */ | |
256 | /* FIXME: check what real hardware does */ | |
257 | if (in_data[0] == 0) { | |
258 | return false; | |
259 | } | |
260 | ||
261 | s->autopoll_rate_ms = in_data[0]; | |
262 | if (s->autopoll) { | |
263 | timer_mod(s->adb_poll_timer, | |
264 | qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + | |
73bcb24d | 265 | (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms))); |
374312e7 HP |
266 | } |
267 | return true; | |
268 | } | |
269 | ||
216c906e HP |
270 | static bool cuda_cmd_set_device_list(CUDAState *s, |
271 | const uint8_t *in_data, int in_len, | |
272 | uint8_t *out_data, int *out_len) | |
273 | { | |
274 | if (in_len != 2) { | |
275 | return false; | |
276 | } | |
277 | ||
278 | s->adb_poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1]; | |
279 | return true; | |
280 | } | |
281 | ||
017da0b5 HP |
282 | static bool cuda_cmd_powerdown(CUDAState *s, |
283 | const uint8_t *in_data, int in_len, | |
284 | uint8_t *out_data, int *out_len) | |
285 | { | |
286 | if (in_len != 0) { | |
287 | return false; | |
288 | } | |
289 | ||
cf83f140 | 290 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
017da0b5 HP |
291 | return true; |
292 | } | |
293 | ||
54e89444 HP |
294 | static bool cuda_cmd_reset_system(CUDAState *s, |
295 | const uint8_t *in_data, int in_len, | |
296 | uint8_t *out_data, int *out_len) | |
297 | { | |
298 | if (in_len != 0) { | |
299 | return false; | |
300 | } | |
301 | ||
cf83f140 | 302 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
54e89444 HP |
303 | return true; |
304 | } | |
305 | ||
f5b94112 HP |
306 | static bool cuda_cmd_set_file_server_flag(CUDAState *s, |
307 | const uint8_t *in_data, int in_len, | |
308 | uint8_t *out_data, int *out_len) | |
309 | { | |
310 | if (in_len != 1) { | |
311 | return false; | |
312 | } | |
313 | ||
314 | qemu_log_mask(LOG_UNIMP, | |
315 | "CUDA: unimplemented command FILE_SERVER_FLAG %d\n", | |
316 | in_data[0]); | |
317 | return true; | |
318 | } | |
319 | ||
15b7b09b HP |
320 | static bool cuda_cmd_set_power_message(CUDAState *s, |
321 | const uint8_t *in_data, int in_len, | |
322 | uint8_t *out_data, int *out_len) | |
323 | { | |
324 | if (in_len != 1) { | |
325 | return false; | |
326 | } | |
327 | ||
328 | qemu_log_mask(LOG_UNIMP, | |
329 | "CUDA: unimplemented command SET_POWER_MESSAGE %d\n", | |
330 | in_data[0]); | |
331 | return true; | |
332 | } | |
333 | ||
547a4d19 HP |
334 | static bool cuda_cmd_get_time(CUDAState *s, |
335 | const uint8_t *in_data, int in_len, | |
336 | uint8_t *out_data, int *out_len) | |
337 | { | |
338 | uint32_t ti; | |
339 | ||
340 | if (in_len != 0) { | |
341 | return false; | |
342 | } | |
343 | ||
344 | ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) | |
73bcb24d | 345 | / NANOSECONDS_PER_SECOND); |
547a4d19 HP |
346 | out_data[0] = ti >> 24; |
347 | out_data[1] = ti >> 16; | |
348 | out_data[2] = ti >> 8; | |
349 | out_data[3] = ti; | |
350 | *out_len = 4; | |
351 | return true; | |
352 | } | |
353 | ||
e6473178 HP |
354 | static bool cuda_cmd_set_time(CUDAState *s, |
355 | const uint8_t *in_data, int in_len, | |
356 | uint8_t *out_data, int *out_len) | |
357 | { | |
358 | uint32_t ti; | |
359 | ||
360 | if (in_len != 4) { | |
361 | return false; | |
362 | } | |
363 | ||
ed3d807b AJ |
364 | ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16) |
365 | + (((uint32_t)in_data[2]) << 8) + in_data[3]; | |
e6473178 | 366 | s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) |
73bcb24d | 367 | / NANOSECONDS_PER_SECOND); |
e6473178 HP |
368 | return true; |
369 | } | |
370 | ||
d20efaeb | 371 | static const CudaCommand handlers[] = { |
1cdab104 | 372 | { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll }, |
374312e7 | 373 | { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate }, |
216c906e | 374 | { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list }, |
017da0b5 | 375 | { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown }, |
54e89444 | 376 | { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system }, |
f5b94112 HP |
377 | { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG", |
378 | cuda_cmd_set_file_server_flag }, | |
15b7b09b HP |
379 | { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES", |
380 | cuda_cmd_set_power_message }, | |
547a4d19 | 381 | { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time }, |
e6473178 | 382 | { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time }, |
d20efaeb HP |
383 | }; |
384 | ||
5fafdf24 | 385 | static void cuda_receive_packet(CUDAState *s, |
267002cd FB |
386 | const uint8_t *data, int len) |
387 | { | |
4202e63c | 388 | uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] }; |
d20efaeb | 389 | int i, out_len = 0; |
267002cd | 390 | |
d20efaeb HP |
391 | for (i = 0; i < ARRAY_SIZE(handlers); i++) { |
392 | const CudaCommand *desc = &handlers[i]; | |
393 | if (desc->command == data[0]) { | |
4b402e09 | 394 | trace_cuda_receive_packet_cmd(desc->name); |
d20efaeb HP |
395 | out_len = 0; |
396 | if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) { | |
397 | cuda_send_packet_to_host(s, obuf, 3 + out_len); | |
398 | } else { | |
399 | qemu_log_mask(LOG_GUEST_ERROR, | |
400 | "CUDA: %s: wrong parameters %d\n", | |
401 | desc->name, len); | |
402 | obuf[0] = ERROR_PACKET; | |
403 | obuf[1] = 0x5; /* bad parameters */ | |
404 | obuf[2] = CUDA_PACKET; | |
405 | obuf[3] = data[0]; | |
406 | cuda_send_packet_to_host(s, obuf, 4); | |
407 | } | |
408 | return; | |
409 | } | |
410 | } | |
411 | ||
0e8176e8 HP |
412 | qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]); |
413 | obuf[0] = ERROR_PACKET; | |
414 | obuf[1] = 0x2; /* unknown command */ | |
415 | obuf[2] = CUDA_PACKET; | |
416 | obuf[3] = data[0]; | |
417 | cuda_send_packet_to_host(s, obuf, 4); | |
267002cd FB |
418 | } |
419 | ||
5fafdf24 | 420 | static void cuda_receive_packet_from_host(CUDAState *s, |
267002cd FB |
421 | const uint8_t *data, int len) |
422 | { | |
4b402e09 MCA |
423 | int i; |
424 | ||
425 | trace_cuda_packet_receive(len); | |
426 | for (i = 0; i < len; i++) { | |
427 | trace_cuda_packet_receive_data(i, data[i]); | |
819e712b | 428 | } |
4b402e09 | 429 | |
267002cd FB |
430 | switch(data[0]) { |
431 | case ADB_PACKET: | |
e2733d20 | 432 | { |
6729aa40 | 433 | uint8_t obuf[ADB_MAX_OUT_LEN + 3]; |
e2733d20 | 434 | int olen; |
293c867d | 435 | olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1); |
38f0b147 | 436 | if (olen > 0) { |
e2733d20 FB |
437 | obuf[0] = ADB_PACKET; |
438 | obuf[1] = 0x00; | |
6729aa40 | 439 | cuda_send_packet_to_host(s, obuf, olen + 2); |
e2733d20 | 440 | } else { |
38f0b147 | 441 | /* error */ |
e2733d20 | 442 | obuf[0] = ADB_PACKET; |
38f0b147 | 443 | obuf[1] = -olen; |
6729aa40 | 444 | obuf[2] = data[1]; |
38f0b147 | 445 | olen = 0; |
6729aa40 | 446 | cuda_send_packet_to_host(s, obuf, olen + 3); |
e2733d20 | 447 | } |
e2733d20 | 448 | } |
267002cd FB |
449 | break; |
450 | case CUDA_PACKET: | |
451 | cuda_receive_packet(s, data + 1, len - 1); | |
452 | break; | |
453 | } | |
454 | } | |
455 | ||
09a57347 MCA |
456 | static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size) |
457 | { | |
458 | CUDAState *s = opaque; | |
2e3e5c7e | 459 | MOS6522CUDAState *mcs = &s->mos6522_cuda; |
09a57347 | 460 | MOS6522State *ms = MOS6522(mcs); |
267002cd | 461 | |
09a57347 MCA |
462 | addr = (addr >> 9) & 0xf; |
463 | return mos6522_read(ms, addr, size); | |
464 | } | |
465 | ||
466 | static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val, | |
467 | unsigned size) | |
9b64997f | 468 | { |
09a57347 | 469 | CUDAState *s = opaque; |
2e3e5c7e | 470 | MOS6522CUDAState *mcs = &s->mos6522_cuda; |
09a57347 | 471 | MOS6522State *ms = MOS6522(mcs); |
9b64997f | 472 | |
09a57347 MCA |
473 | addr = (addr >> 9) & 0xf; |
474 | mos6522_write(ms, addr, val, size); | |
9b64997f BS |
475 | } |
476 | ||
09a57347 MCA |
477 | static const MemoryRegionOps mos6522_cuda_ops = { |
478 | .read = mos6522_cuda_read, | |
479 | .write = mos6522_cuda_write, | |
480 | .endianness = DEVICE_BIG_ENDIAN, | |
481 | .valid = { | |
482 | .min_access_size = 1, | |
483 | .max_access_size = 1, | |
484 | }, | |
c0a93a9e | 485 | }; |
9b64997f | 486 | |
c0a93a9e JQ |
487 | static const VMStateDescription vmstate_cuda = { |
488 | .name = "cuda", | |
2e3e5c7e MCA |
489 | .version_id = 5, |
490 | .minimum_version_id = 5, | |
35d08458 | 491 | .fields = (VMStateField[]) { |
2e3e5c7e MCA |
492 | VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522, |
493 | MOS6522State), | |
ff57eae5 | 494 | VMSTATE_UINT8(last_b, CUDAState), |
ff57eae5 | 495 | VMSTATE_UINT8(last_acr, CUDAState), |
c0a93a9e JQ |
496 | VMSTATE_INT32(data_in_size, CUDAState), |
497 | VMSTATE_INT32(data_in_index, CUDAState), | |
498 | VMSTATE_INT32(data_out_index, CUDAState), | |
499 | VMSTATE_UINT8(autopoll, CUDAState), | |
374312e7 | 500 | VMSTATE_UINT8(autopoll_rate_ms, CUDAState), |
216c906e | 501 | VMSTATE_UINT16(adb_poll_mask, CUDAState), |
c0a93a9e JQ |
502 | VMSTATE_BUFFER(data_in, CUDAState), |
503 | VMSTATE_BUFFER(data_out, CUDAState), | |
504 | VMSTATE_UINT32(tick_offset, CUDAState), | |
6cb577dd | 505 | VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState), |
ff57eae5 | 506 | VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState), |
c0a93a9e JQ |
507 | VMSTATE_END_OF_LIST() |
508 | } | |
509 | }; | |
9b64997f | 510 | |
45fa67fb | 511 | static void cuda_reset(DeviceState *dev) |
6e6b7363 | 512 | { |
45fa67fb | 513 | CUDAState *s = CUDA(dev); |
6e6b7363 | 514 | |
6e6b7363 BS |
515 | s->data_in_size = 0; |
516 | s->data_in_index = 0; | |
517 | s->data_out_index = 0; | |
518 | s->autopoll = 0; | |
6e6b7363 BS |
519 | } |
520 | ||
09a57347 | 521 | static void cuda_realize(DeviceState *dev, Error **errp) |
267002cd | 522 | { |
45fa67fb | 523 | CUDAState *s = CUDA(dev); |
09a57347 MCA |
524 | SysBusDevice *sbd; |
525 | MOS6522State *ms; | |
526 | DeviceState *d; | |
5703c174 | 527 | struct tm tm; |
819e712b | 528 | |
09a57347 | 529 | /* Pass IRQ from 6522 */ |
2e3e5c7e | 530 | d = DEVICE(&s->mos6522_cuda); |
09a57347 MCA |
531 | ms = MOS6522(d); |
532 | sbd = SYS_BUS_DEVICE(s); | |
533 | sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms)); | |
61271e5c | 534 | |
9c554c1c AJ |
535 | qemu_get_timedate(&tm, 0); |
536 | s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET; | |
5703c174 | 537 | |
09a57347 | 538 | s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s); |
d6c666ad | 539 | s->sr_delay_ns = 20 * SCALE_US; |
09a57347 | 540 | |
bc72ad67 | 541 | s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s); |
216c906e | 542 | s->adb_poll_mask = 0xffff; |
09a57347 | 543 | s->autopoll_rate_ms = 20; |
45fa67fb AF |
544 | } |
545 | ||
09a57347 | 546 | static void cuda_init(Object *obj) |
45fa67fb | 547 | { |
45fa67fb | 548 | CUDAState *s = CUDA(obj); |
09a57347 | 549 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); |
45fa67fb | 550 | |
1069a3c6 TH |
551 | sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda, |
552 | sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA); | |
2e3e5c7e | 553 | |
09a57347 MCA |
554 | memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000); |
555 | sysbus_init_mmio(sbd, &s->mem); | |
84ede329 | 556 | |
fb17dfe0 AF |
557 | qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS, |
558 | DEVICE(obj), "adb.0"); | |
45fa67fb AF |
559 | } |
560 | ||
b981289c | 561 | static Property cuda_properties[] = { |
27c5cee1 | 562 | DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0), |
b981289c AG |
563 | DEFINE_PROP_END_OF_LIST() |
564 | }; | |
565 | ||
45fa67fb AF |
566 | static void cuda_class_init(ObjectClass *oc, void *data) |
567 | { | |
568 | DeviceClass *dc = DEVICE_CLASS(oc); | |
ea0a7eb4 | 569 | |
09a57347 | 570 | dc->realize = cuda_realize; |
45fa67fb AF |
571 | dc->reset = cuda_reset; |
572 | dc->vmsd = &vmstate_cuda; | |
b981289c | 573 | dc->props = cuda_properties; |
599d7326 | 574 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
267002cd | 575 | } |
45fa67fb AF |
576 | |
577 | static const TypeInfo cuda_type_info = { | |
578 | .name = TYPE_CUDA, | |
579 | .parent = TYPE_SYS_BUS_DEVICE, | |
580 | .instance_size = sizeof(CUDAState), | |
09a57347 | 581 | .instance_init = cuda_init, |
45fa67fb AF |
582 | .class_init = cuda_class_init, |
583 | }; | |
584 | ||
09a57347 MCA |
585 | static void mos6522_cuda_portB_write(MOS6522State *s) |
586 | { | |
587 | MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj); | |
2e3e5c7e | 588 | CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda); |
09a57347 | 589 | |
2e3e5c7e | 590 | cuda_update(cs); |
09a57347 MCA |
591 | } |
592 | ||
d638fd5c | 593 | static void mos6522_cuda_reset(DeviceState *dev) |
09a57347 MCA |
594 | { |
595 | MOS6522State *ms = MOS6522(dev); | |
596 | MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms); | |
597 | ||
d638fd5c | 598 | mdc->parent_reset(dev); |
09a57347 MCA |
599 | |
600 | ms->timers[0].frequency = CUDA_TIMER_FREQ; | |
601 | ms->timers[1].frequency = (SCALE_US * 6000) / 4700; | |
602 | } | |
603 | ||
09a57347 MCA |
604 | static void mos6522_cuda_class_init(ObjectClass *oc, void *data) |
605 | { | |
606 | DeviceClass *dc = DEVICE_CLASS(oc); | |
607 | MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc); | |
608 | ||
d638fd5c | 609 | dc->reset = mos6522_cuda_reset; |
09a57347 MCA |
610 | mdc->portB_write = mos6522_cuda_portB_write; |
611 | mdc->get_timer1_counter_value = cuda_get_counter_value; | |
612 | mdc->get_timer2_counter_value = cuda_get_counter_value; | |
613 | mdc->get_timer1_load_time = cuda_get_load_time; | |
614 | mdc->get_timer2_load_time = cuda_get_load_time; | |
615 | } | |
616 | ||
617 | static const TypeInfo mos6522_cuda_type_info = { | |
618 | .name = TYPE_MOS6522_CUDA, | |
619 | .parent = TYPE_MOS6522, | |
620 | .instance_size = sizeof(MOS6522CUDAState), | |
09a57347 MCA |
621 | .class_init = mos6522_cuda_class_init, |
622 | }; | |
623 | ||
45fa67fb AF |
624 | static void cuda_register_types(void) |
625 | { | |
09a57347 | 626 | type_register_static(&mos6522_cuda_type_info); |
45fa67fb AF |
627 | type_register_static(&cuda_type_info); |
628 | } | |
629 | ||
630 | type_init(cuda_register_types) |