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3cbee15b
JM
1/*
2 * PowerMac MacIO device emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
0d75590d 25#include "qemu/osdep.h"
da34e65c 26#include "qapi/error.h"
83c9f4ca
PB
27#include "hw/hw.h"
28#include "hw/ppc/mac.h"
29#include "hw/pci/pci.h"
0d09e41a
PB
30#include "hw/ppc/mac_dbdma.h"
31#include "hw/char/escc.h"
3cbee15b 32
fcf1bbab
AF
33#define TYPE_MACIO "macio"
34#define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
35
d8c51b05
AL
36typedef struct MacIOState
37{
fcf1bbab 38 /*< private >*/
d8c51b05 39 PCIDevice parent;
fcf1bbab
AF
40 /*< public >*/
41
23c5e4ca 42 MemoryRegion bar;
45fa67fb 43 CUDAState cuda;
07a7484e 44 void *dbdma;
23c5e4ca 45 MemoryRegion *pic_mem;
23c5e4ca 46 MemoryRegion *escc_mem;
b981289c 47 uint64_t frequency;
d8c51b05 48} MacIOState;
3cbee15b 49
95ed3b7c
AF
50#define OLDWORLD_MACIO(obj) \
51 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
52
53typedef struct OldWorldMacIOState {
54 /*< private >*/
55 MacIOState parent_obj;
56 /*< public >*/
57
14eefd0e 58 qemu_irq irqs[5];
07a7484e 59
95ed3b7c 60 MacIONVRAMState nvram;
14eefd0e 61 MACIOIDEState ide[2];
95ed3b7c
AF
62} OldWorldMacIOState;
63
07a7484e
AF
64#define NEWWORLD_MACIO(obj) \
65 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
66
67typedef struct NewWorldMacIOState {
68 /*< private >*/
69 MacIOState parent_obj;
70 /*< public >*/
45fa67fb 71 qemu_irq irqs[5];
07a7484e
AF
72 MACIOIDEState ide[2];
73} NewWorldMacIOState;
74
0d54a502
AG
75/*
76 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
77 * while the other one is the normal, current ESCC interface.
78 *
79 * The magic below creates memory aliases to spawn the escc-legacy device
80 * purely by rerouting the respective registers to our escc region. This
81 * works because the only difference between the two memory regions is the
82 * register layout, not their semantics.
83 *
84 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
85 */
86static void macio_escc_legacy_setup(MacIOState *macio_state)
87{
88 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
89 MemoryRegion *bar = &macio_state->bar;
90 int i;
91 static const int maps[] = {
92 0x00, 0x00,
93 0x02, 0x20,
94 0x04, 0x10,
95 0x06, 0x30,
96 0x08, 0x40,
97 0x0A, 0x50,
98 0x60, 0x60,
99 0x70, 0x70,
100 0x80, 0x70,
101 0x90, 0x80,
102 0xA0, 0x90,
103 0xB0, 0xA0,
104 0xC0, 0xB0,
105 0xD0, 0xC0,
106 0xE0, 0xD0,
107 0xF0, 0xE0,
108 };
109
81e0ab48 110 memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256);
0d54a502
AG
111 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
112 MemoryRegion *port = g_new(MemoryRegion, 1);
81e0ab48 113 memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port",
2c9b15ca 114 macio_state->escc_mem, maps[i+1], 0x2);
0d54a502
AG
115 memory_region_add_subregion(escc_legacy, maps[i], port);
116 }
117
118 memory_region_add_subregion(bar, 0x12000, escc_legacy);
119}
120
d8c51b05 121static void macio_bar_setup(MacIOState *macio_state)
3cbee15b 122{
23c5e4ca 123 MemoryRegion *bar = &macio_state->bar;
3cbee15b 124
23c5e4ca
AK
125 if (macio_state->escc_mem) {
126 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
0d54a502 127 macio_escc_legacy_setup(macio_state);
7fa9ae1a 128 }
3cbee15b
JM
129}
130
62e9cd77 131static void macio_common_realize(PCIDevice *d, Error **errp)
d8c51b05 132{
7b925079 133 MacIOState *s = MACIO(d);
45fa67fb 134 SysBusDevice *sysbus_dev;
62e9cd77 135 Error *err = NULL;
c7104402
PB
136 MemoryRegion *dbdma_mem;
137
138 s->dbdma = DBDMA_init(&dbdma_mem);
139 memory_region_add_subregion(&s->bar, 0x08000, dbdma_mem);
7b925079 140
62e9cd77
MA
141 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
142 if (err) {
143 error_propagate(errp, err);
144 return;
45fa67fb
AF
145 }
146 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
147 memory_region_add_subregion(&s->bar, 0x16000,
148 sysbus_mmio_get_region(sysbus_dev, 0));
149
7b925079
AF
150 macio_bar_setup(s);
151 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
d8c51b05
AL
152}
153
62e9cd77
MA
154static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
155 qemu_irq irq0, qemu_irq irq1, int dmaid,
156 Error **errp)
14eefd0e
AG
157{
158 SysBusDevice *sysbus_dev;
159
160 sysbus_dev = SYS_BUS_DEVICE(ide);
161 sysbus_connect_irq(sysbus_dev, 0, irq0);
162 sysbus_connect_irq(sysbus_dev, 1, irq1);
163 macio_ide_register_dma(ide, s->dbdma, dmaid);
62e9cd77 164 object_property_set_bool(OBJECT(ide), true, "realized", errp);
14eefd0e
AG
165}
166
62e9cd77 167static void macio_oldworld_realize(PCIDevice *d, Error **errp)
d037834a
AF
168{
169 MacIOState *s = MACIO(d);
95ed3b7c 170 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
62e9cd77 171 Error *err = NULL;
95ed3b7c 172 SysBusDevice *sysbus_dev;
14eefd0e
AG
173 int i;
174 int cur_irq = 0;
62e9cd77
MA
175
176 macio_common_realize(d, &err);
177 if (err) {
178 error_propagate(errp, err);
179 return;
d037834a
AF
180 }
181
45fa67fb 182 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
14eefd0e 183 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
45fa67fb 184
62e9cd77
MA
185 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
186 if (err) {
187 error_propagate(errp, err);
188 return;
95ed3b7c
AF
189 }
190 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
191 memory_region_add_subregion(&s->bar, 0x60000,
192 sysbus_mmio_get_region(sysbus_dev, 0));
193 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
194
d037834a
AF
195 if (s->pic_mem) {
196 /* Heathrow PIC */
197 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
198 }
199
14eefd0e
AG
200 /* IDE buses */
201 for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
202 qemu_irq irq0 = os->irqs[cur_irq++];
203 qemu_irq irq1 = os->irqs[cur_irq++];
204
62e9cd77
MA
205 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
206 if (err) {
207 error_propagate(errp, err);
208 return;
14eefd0e 209 }
07a7484e 210 }
d037834a
AF
211}
212
213f0c4f
AF
213static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
214 int index)
14eefd0e
AG
215{
216 gchar *name;
217
213f0c4f 218 object_initialize(ide, ide_size, TYPE_MACIO_IDE);
14eefd0e
AG
219 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
220 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
221 &ide->mem);
222 name = g_strdup_printf("ide[%i]", index);
223 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
224 g_free(name);
225}
226
95ed3b7c
AF
227static void macio_oldworld_init(Object *obj)
228{
07a7484e 229 MacIOState *s = MACIO(obj);
95ed3b7c
AF
230 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
231 DeviceState *dev;
14eefd0e 232 int i;
95ed3b7c 233
07a7484e
AF
234 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
235
213f0c4f 236 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
95ed3b7c
AF
237 dev = DEVICE(&os->nvram);
238 qdev_prop_set_uint32(dev, "size", 0x2000);
239 qdev_prop_set_uint32(dev, "it_shift", 4);
07a7484e 240
14eefd0e 241 for (i = 0; i < 2; i++) {
213f0c4f 242 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
14eefd0e 243 }
95ed3b7c
AF
244}
245
a0f9fdfd
AG
246static void timer_write(void *opaque, hwaddr addr, uint64_t value,
247 unsigned size)
248{
249}
250
251static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
252{
253 uint32_t value = 0;
d696760b
AG
254 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
255 uint64_t kltime;
256
257 kltime = muldiv64(systime, 4194300, get_ticks_per_sec() * 4);
258 kltime = muldiv64(kltime, 18432000, 1048575);
a0f9fdfd
AG
259
260 switch (addr) {
261 case 0x38:
d696760b 262 value = kltime;
a0f9fdfd
AG
263 break;
264 case 0x3c:
d696760b 265 value = kltime >> 32;
a0f9fdfd
AG
266 break;
267 }
268
269 return value;
270}
271
272static const MemoryRegionOps timer_ops = {
273 .read = timer_read,
274 .write = timer_write,
9397a7c8 275 .endianness = DEVICE_LITTLE_ENDIAN,
a0f9fdfd
AG
276};
277
62e9cd77 278static void macio_newworld_realize(PCIDevice *d, Error **errp)
d037834a
AF
279{
280 MacIOState *s = MACIO(d);
07a7484e 281 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
62e9cd77 282 Error *err = NULL;
07a7484e 283 SysBusDevice *sysbus_dev;
6c5819c4 284 MemoryRegion *timer_memory = NULL;
14eefd0e
AG
285 int i;
286 int cur_irq = 0;
62e9cd77
MA
287
288 macio_common_realize(d, &err);
289 if (err) {
290 error_propagate(errp, err);
291 return;
d037834a
AF
292 }
293
45fa67fb 294 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
14eefd0e 295 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
45fa67fb 296
d037834a
AF
297 if (s->pic_mem) {
298 /* OpenPIC */
299 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
300 }
301
14eefd0e
AG
302 /* IDE buses */
303 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
304 qemu_irq irq0 = ns->irqs[cur_irq++];
305 qemu_irq irq1 = ns->irqs[cur_irq++];
07a7484e 306
62e9cd77
MA
307 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
308 if (err) {
309 error_propagate(errp, err);
310 return;
14eefd0e 311 }
07a7484e
AF
312 }
313
a0f9fdfd 314 /* Timer */
6c5819c4 315 timer_memory = g_new(MemoryRegion, 1);
a0f9fdfd
AG
316 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
317 0x1000);
318 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
d037834a
AF
319}
320
07a7484e
AF
321static void macio_newworld_init(Object *obj)
322{
323 MacIOState *s = MACIO(obj);
324 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
325 int i;
07a7484e
AF
326
327 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
328
329 for (i = 0; i < 2; i++) {
213f0c4f 330 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
07a7484e
AF
331 }
332}
333
fcf1bbab
AF
334static void macio_instance_init(Object *obj)
335{
336 MacIOState *s = MACIO(obj);
337
81e0ab48 338 memory_region_init(&s->bar, obj, "macio", 0x80000);
07a7484e 339
213f0c4f 340 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
45fa67fb
AF
341 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
342 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
fcf1bbab
AF
343}
344
02635923
MCA
345static const VMStateDescription vmstate_macio_oldworld = {
346 .name = "macio-oldworld",
347 .version_id = 0,
348 .minimum_version_id = 0,
349 .fields = (VMStateField[]) {
350 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
351 VMSTATE_END_OF_LIST()
352 }
353};
354
d037834a
AF
355static void macio_oldworld_class_init(ObjectClass *oc, void *data)
356{
357 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
02635923 358 DeviceClass *dc = DEVICE_CLASS(oc);
d037834a 359
62e9cd77 360 pdc->realize = macio_oldworld_realize;
d037834a 361 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
02635923 362 dc->vmsd = &vmstate_macio_oldworld;
d037834a
AF
363}
364
02635923
MCA
365static const VMStateDescription vmstate_macio_newworld = {
366 .name = "macio-newworld",
367 .version_id = 0,
368 .minimum_version_id = 0,
369 .fields = (VMStateField[]) {
370 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
371 VMSTATE_END_OF_LIST()
372 }
373};
374
d037834a
AF
375static void macio_newworld_class_init(ObjectClass *oc, void *data)
376{
377 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
02635923 378 DeviceClass *dc = DEVICE_CLASS(oc);
d037834a 379
62e9cd77 380 pdc->realize = macio_newworld_realize;
d037834a 381 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
02635923 382 dc->vmsd = &vmstate_macio_newworld;
d037834a
AF
383}
384
b981289c
AG
385static Property macio_properties[] = {
386 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
387 DEFINE_PROP_END_OF_LIST()
388};
389
40021f08
AL
390static void macio_class_init(ObjectClass *klass, void *data)
391{
392 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
b981289c 393 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08 394
40021f08
AL
395 k->vendor_id = PCI_VENDOR_ID_APPLE;
396 k->class_id = PCI_CLASS_OTHERS << 8;
b981289c 397 dc->props = macio_properties;
f9f2a9f2 398 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
40021f08
AL
399}
400
d037834a
AF
401static const TypeInfo macio_oldworld_type_info = {
402 .name = TYPE_OLDWORLD_MACIO,
403 .parent = TYPE_MACIO,
95ed3b7c
AF
404 .instance_size = sizeof(OldWorldMacIOState),
405 .instance_init = macio_oldworld_init,
d037834a
AF
406 .class_init = macio_oldworld_class_init,
407};
408
409static const TypeInfo macio_newworld_type_info = {
410 .name = TYPE_NEWWORLD_MACIO,
411 .parent = TYPE_MACIO,
07a7484e
AF
412 .instance_size = sizeof(NewWorldMacIOState),
413 .instance_init = macio_newworld_init,
d037834a
AF
414 .class_init = macio_newworld_class_init,
415};
416
fcf1bbab
AF
417static const TypeInfo macio_type_info = {
418 .name = TYPE_MACIO,
39bffca2
AL
419 .parent = TYPE_PCI_DEVICE,
420 .instance_size = sizeof(MacIOState),
fcf1bbab 421 .instance_init = macio_instance_init,
d037834a 422 .abstract = true,
39bffca2 423 .class_init = macio_class_init,
d8c51b05
AL
424};
425
83f7d43a 426static void macio_register_types(void)
d8c51b05 427{
fcf1bbab 428 type_register_static(&macio_type_info);
d037834a
AF
429 type_register_static(&macio_oldworld_type_info);
430 type_register_static(&macio_newworld_type_info);
d8c51b05
AL
431}
432
83f7d43a 433type_init(macio_register_types)
d8c51b05 434
d037834a 435void macio_init(PCIDevice *d,
07a7484e 436 MemoryRegion *pic_mem,
d037834a 437 MemoryRegion *escc_mem)
3cbee15b 438{
d037834a 439 MacIOState *macio_state = MACIO(d);
3cbee15b 440
23c5e4ca 441 macio_state->pic_mem = pic_mem;
23c5e4ca 442 macio_state->escc_mem = escc_mem;
3cbee15b
JM
443 /* Note: this code is strongly inspirated from the corresponding code
444 in PearPC */
b981289c
AG
445 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
446 macio_state->frequency);
deb54399 447
7b925079 448 qdev_init_nofail(DEVICE(d));
3cbee15b 449}