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mac_dbdma: remove DBDMA_init() function
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3cbee15b
JM
1/*
2 * PowerMac MacIO device emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
0d75590d 25#include "qemu/osdep.h"
da34e65c 26#include "qapi/error.h"
83c9f4ca
PB
27#include "hw/hw.h"
28#include "hw/ppc/mac.h"
29#include "hw/pci/pci.h"
0d09e41a
PB
30#include "hw/ppc/mac_dbdma.h"
31#include "hw/char/escc.h"
3cbee15b 32
fcf1bbab
AF
33#define TYPE_MACIO "macio"
34#define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
35
d8c51b05
AL
36typedef struct MacIOState
37{
fcf1bbab 38 /*< private >*/
d8c51b05 39 PCIDevice parent;
fcf1bbab
AF
40 /*< public >*/
41
23c5e4ca 42 MemoryRegion bar;
45fa67fb 43 CUDAState cuda;
ecba28db 44 DBDMAState *dbdma;
23c5e4ca 45 MemoryRegion *pic_mem;
23c5e4ca 46 MemoryRegion *escc_mem;
b981289c 47 uint64_t frequency;
d8c51b05 48} MacIOState;
3cbee15b 49
95ed3b7c
AF
50#define OLDWORLD_MACIO(obj) \
51 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
52
53typedef struct OldWorldMacIOState {
54 /*< private >*/
55 MacIOState parent_obj;
56 /*< public >*/
57
14eefd0e 58 qemu_irq irqs[5];
07a7484e 59
95ed3b7c 60 MacIONVRAMState nvram;
14eefd0e 61 MACIOIDEState ide[2];
95ed3b7c
AF
62} OldWorldMacIOState;
63
07a7484e
AF
64#define NEWWORLD_MACIO(obj) \
65 OBJECT_CHECK(NewWorldMacIOState, (obj), TYPE_NEWWORLD_MACIO)
66
67typedef struct NewWorldMacIOState {
68 /*< private >*/
69 MacIOState parent_obj;
70 /*< public >*/
45fa67fb 71 qemu_irq irqs[5];
07a7484e
AF
72 MACIOIDEState ide[2];
73} NewWorldMacIOState;
74
0d54a502
AG
75/*
76 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
77 * while the other one is the normal, current ESCC interface.
78 *
79 * The magic below creates memory aliases to spawn the escc-legacy device
80 * purely by rerouting the respective registers to our escc region. This
81 * works because the only difference between the two memory regions is the
82 * register layout, not their semantics.
83 *
84 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
85 */
86static void macio_escc_legacy_setup(MacIOState *macio_state)
87{
88 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
89 MemoryRegion *bar = &macio_state->bar;
90 int i;
91 static const int maps[] = {
dd2fa4f7
BH
92 0x00, 0x00, /* Command B */
93 0x02, 0x20, /* Command A */
94 0x04, 0x10, /* Data B */
95 0x06, 0x30, /* Data A */
96 0x08, 0x40, /* Enhancement B */
97 0x0A, 0x50, /* Enhancement A */
98 0x80, 0x80, /* Recovery count */
99 0x90, 0x90, /* Start A */
100 0xa0, 0xa0, /* Start B */
101 0xb0, 0xb0, /* Detect AB */
0d54a502
AG
102 };
103
81e0ab48 104 memory_region_init(escc_legacy, OBJECT(macio_state), "escc-legacy", 256);
0d54a502
AG
105 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
106 MemoryRegion *port = g_new(MemoryRegion, 1);
81e0ab48 107 memory_region_init_alias(port, OBJECT(macio_state), "escc-legacy-port",
2c9b15ca 108 macio_state->escc_mem, maps[i+1], 0x2);
0d54a502
AG
109 memory_region_add_subregion(escc_legacy, maps[i], port);
110 }
111
112 memory_region_add_subregion(bar, 0x12000, escc_legacy);
113}
114
d8c51b05 115static void macio_bar_setup(MacIOState *macio_state)
3cbee15b 116{
23c5e4ca 117 MemoryRegion *bar = &macio_state->bar;
3cbee15b 118
23c5e4ca
AK
119 if (macio_state->escc_mem) {
120 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
0d54a502 121 macio_escc_legacy_setup(macio_state);
7fa9ae1a 122 }
3cbee15b
JM
123}
124
62e9cd77 125static void macio_common_realize(PCIDevice *d, Error **errp)
d8c51b05 126{
7b925079 127 MacIOState *s = MACIO(d);
45fa67fb 128 SysBusDevice *sysbus_dev;
62e9cd77 129 Error *err = NULL;
c7104402 130
ecba28db
MCA
131 object_property_set_bool(OBJECT(s->dbdma), true, "realized", &err);
132 if (err) {
133 error_propagate(errp, err);
134 return;
135 }
136 sysbus_dev = SYS_BUS_DEVICE(s->dbdma);
137 memory_region_add_subregion(&s->bar, 0x08000,
138 sysbus_mmio_get_region(sysbus_dev, 0));
7b925079 139
62e9cd77
MA
140 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
141 if (err) {
142 error_propagate(errp, err);
143 return;
45fa67fb
AF
144 }
145 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
146 memory_region_add_subregion(&s->bar, 0x16000,
147 sysbus_mmio_get_region(sysbus_dev, 0));
148
7b925079
AF
149 macio_bar_setup(s);
150 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
d8c51b05
AL
151}
152
62e9cd77
MA
153static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
154 qemu_irq irq0, qemu_irq irq1, int dmaid,
155 Error **errp)
14eefd0e
AG
156{
157 SysBusDevice *sysbus_dev;
158
159 sysbus_dev = SYS_BUS_DEVICE(ide);
160 sysbus_connect_irq(sysbus_dev, 0, irq0);
161 sysbus_connect_irq(sysbus_dev, 1, irq1);
162 macio_ide_register_dma(ide, s->dbdma, dmaid);
62e9cd77 163 object_property_set_bool(OBJECT(ide), true, "realized", errp);
14eefd0e
AG
164}
165
62e9cd77 166static void macio_oldworld_realize(PCIDevice *d, Error **errp)
d037834a
AF
167{
168 MacIOState *s = MACIO(d);
95ed3b7c 169 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
62e9cd77 170 Error *err = NULL;
95ed3b7c 171 SysBusDevice *sysbus_dev;
14eefd0e
AG
172 int i;
173 int cur_irq = 0;
62e9cd77
MA
174
175 macio_common_realize(d, &err);
176 if (err) {
177 error_propagate(errp, err);
178 return;
d037834a
AF
179 }
180
45fa67fb 181 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
14eefd0e 182 sysbus_connect_irq(sysbus_dev, 0, os->irqs[cur_irq++]);
45fa67fb 183
62e9cd77
MA
184 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
185 if (err) {
186 error_propagate(errp, err);
187 return;
95ed3b7c
AF
188 }
189 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
190 memory_region_add_subregion(&s->bar, 0x60000,
191 sysbus_mmio_get_region(sysbus_dev, 0));
192 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
193
d037834a
AF
194 if (s->pic_mem) {
195 /* Heathrow PIC */
196 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
197 }
198
14eefd0e
AG
199 /* IDE buses */
200 for (i = 0; i < ARRAY_SIZE(os->ide); i++) {
201 qemu_irq irq0 = os->irqs[cur_irq++];
202 qemu_irq irq1 = os->irqs[cur_irq++];
203
62e9cd77
MA
204 macio_realize_ide(s, &os->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
205 if (err) {
206 error_propagate(errp, err);
207 return;
14eefd0e 208 }
07a7484e 209 }
d037834a
AF
210}
211
213f0c4f
AF
212static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
213 int index)
14eefd0e
AG
214{
215 gchar *name;
216
213f0c4f 217 object_initialize(ide, ide_size, TYPE_MACIO_IDE);
14eefd0e
AG
218 qdev_set_parent_bus(DEVICE(ide), sysbus_get_default());
219 memory_region_add_subregion(&s->bar, 0x1f000 + ((index + 1) * 0x1000),
220 &ide->mem);
221 name = g_strdup_printf("ide[%i]", index);
222 object_property_add_child(OBJECT(s), name, OBJECT(ide), NULL);
223 g_free(name);
224}
225
95ed3b7c
AF
226static void macio_oldworld_init(Object *obj)
227{
07a7484e 228 MacIOState *s = MACIO(obj);
95ed3b7c
AF
229 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
230 DeviceState *dev;
14eefd0e 231 int i;
95ed3b7c 232
07a7484e
AF
233 qdev_init_gpio_out(DEVICE(obj), os->irqs, ARRAY_SIZE(os->irqs));
234
213f0c4f 235 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
95ed3b7c
AF
236 dev = DEVICE(&os->nvram);
237 qdev_prop_set_uint32(dev, "size", 0x2000);
238 qdev_prop_set_uint32(dev, "it_shift", 4);
07a7484e 239
14eefd0e 240 for (i = 0; i < 2; i++) {
213f0c4f 241 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
14eefd0e 242 }
95ed3b7c
AF
243}
244
a0f9fdfd
AG
245static void timer_write(void *opaque, hwaddr addr, uint64_t value,
246 unsigned size)
247{
248}
249
250static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
251{
252 uint32_t value = 0;
d696760b
AG
253 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
254 uint64_t kltime;
255
73bcb24d 256 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
d696760b 257 kltime = muldiv64(kltime, 18432000, 1048575);
a0f9fdfd
AG
258
259 switch (addr) {
260 case 0x38:
d696760b 261 value = kltime;
a0f9fdfd
AG
262 break;
263 case 0x3c:
d696760b 264 value = kltime >> 32;
a0f9fdfd
AG
265 break;
266 }
267
268 return value;
269}
270
271static const MemoryRegionOps timer_ops = {
272 .read = timer_read,
273 .write = timer_write,
9397a7c8 274 .endianness = DEVICE_LITTLE_ENDIAN,
a0f9fdfd
AG
275};
276
62e9cd77 277static void macio_newworld_realize(PCIDevice *d, Error **errp)
d037834a
AF
278{
279 MacIOState *s = MACIO(d);
07a7484e 280 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
62e9cd77 281 Error *err = NULL;
07a7484e 282 SysBusDevice *sysbus_dev;
6c5819c4 283 MemoryRegion *timer_memory = NULL;
14eefd0e
AG
284 int i;
285 int cur_irq = 0;
62e9cd77
MA
286
287 macio_common_realize(d, &err);
288 if (err) {
289 error_propagate(errp, err);
290 return;
d037834a
AF
291 }
292
45fa67fb 293 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
14eefd0e 294 sysbus_connect_irq(sysbus_dev, 0, ns->irqs[cur_irq++]);
45fa67fb 295
d037834a
AF
296 if (s->pic_mem) {
297 /* OpenPIC */
298 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
299 }
300
14eefd0e
AG
301 /* IDE buses */
302 for (i = 0; i < ARRAY_SIZE(ns->ide); i++) {
303 qemu_irq irq0 = ns->irqs[cur_irq++];
304 qemu_irq irq1 = ns->irqs[cur_irq++];
07a7484e 305
62e9cd77
MA
306 macio_realize_ide(s, &ns->ide[i], irq0, irq1, 0x16 + (i * 4), &err);
307 if (err) {
308 error_propagate(errp, err);
309 return;
14eefd0e 310 }
07a7484e
AF
311 }
312
a0f9fdfd 313 /* Timer */
6c5819c4 314 timer_memory = g_new(MemoryRegion, 1);
a0f9fdfd
AG
315 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
316 0x1000);
317 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
d037834a
AF
318}
319
07a7484e
AF
320static void macio_newworld_init(Object *obj)
321{
322 MacIOState *s = MACIO(obj);
323 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
324 int i;
07a7484e
AF
325
326 qdev_init_gpio_out(DEVICE(obj), ns->irqs, ARRAY_SIZE(ns->irqs));
327
328 for (i = 0; i < 2; i++) {
213f0c4f 329 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
07a7484e
AF
330 }
331}
332
fcf1bbab
AF
333static void macio_instance_init(Object *obj)
334{
335 MacIOState *s = MACIO(obj);
336
81e0ab48 337 memory_region_init(&s->bar, obj, "macio", 0x80000);
07a7484e 338
213f0c4f 339 object_initialize(&s->cuda, sizeof(s->cuda), TYPE_CUDA);
45fa67fb
AF
340 qdev_set_parent_bus(DEVICE(&s->cuda), sysbus_get_default());
341 object_property_add_child(obj, "cuda", OBJECT(&s->cuda), NULL);
ecba28db
MCA
342
343 s->dbdma = MAC_DBDMA(object_new(TYPE_MAC_DBDMA));
344 object_property_add_child(obj, "dbdma", OBJECT(s->dbdma), NULL);
fcf1bbab
AF
345}
346
02635923
MCA
347static const VMStateDescription vmstate_macio_oldworld = {
348 .name = "macio-oldworld",
349 .version_id = 0,
350 .minimum_version_id = 0,
351 .fields = (VMStateField[]) {
352 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
353 VMSTATE_END_OF_LIST()
354 }
355};
356
d037834a
AF
357static void macio_oldworld_class_init(ObjectClass *oc, void *data)
358{
359 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
02635923 360 DeviceClass *dc = DEVICE_CLASS(oc);
d037834a 361
62e9cd77 362 pdc->realize = macio_oldworld_realize;
d037834a 363 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
02635923 364 dc->vmsd = &vmstate_macio_oldworld;
d037834a
AF
365}
366
02635923
MCA
367static const VMStateDescription vmstate_macio_newworld = {
368 .name = "macio-newworld",
369 .version_id = 0,
370 .minimum_version_id = 0,
371 .fields = (VMStateField[]) {
372 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
373 VMSTATE_END_OF_LIST()
374 }
375};
376
d037834a
AF
377static void macio_newworld_class_init(ObjectClass *oc, void *data)
378{
379 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
02635923 380 DeviceClass *dc = DEVICE_CLASS(oc);
d037834a 381
62e9cd77 382 pdc->realize = macio_newworld_realize;
d037834a 383 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
02635923 384 dc->vmsd = &vmstate_macio_newworld;
d037834a
AF
385}
386
b981289c
AG
387static Property macio_properties[] = {
388 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
389 DEFINE_PROP_END_OF_LIST()
390};
391
40021f08
AL
392static void macio_class_init(ObjectClass *klass, void *data)
393{
394 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
b981289c 395 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08 396
40021f08
AL
397 k->vendor_id = PCI_VENDOR_ID_APPLE;
398 k->class_id = PCI_CLASS_OTHERS << 8;
b981289c 399 dc->props = macio_properties;
f9f2a9f2 400 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
40021f08
AL
401}
402
d037834a
AF
403static const TypeInfo macio_oldworld_type_info = {
404 .name = TYPE_OLDWORLD_MACIO,
405 .parent = TYPE_MACIO,
95ed3b7c
AF
406 .instance_size = sizeof(OldWorldMacIOState),
407 .instance_init = macio_oldworld_init,
d037834a
AF
408 .class_init = macio_oldworld_class_init,
409};
410
411static const TypeInfo macio_newworld_type_info = {
412 .name = TYPE_NEWWORLD_MACIO,
413 .parent = TYPE_MACIO,
07a7484e
AF
414 .instance_size = sizeof(NewWorldMacIOState),
415 .instance_init = macio_newworld_init,
d037834a
AF
416 .class_init = macio_newworld_class_init,
417};
418
fcf1bbab
AF
419static const TypeInfo macio_type_info = {
420 .name = TYPE_MACIO,
39bffca2
AL
421 .parent = TYPE_PCI_DEVICE,
422 .instance_size = sizeof(MacIOState),
fcf1bbab 423 .instance_init = macio_instance_init,
d037834a 424 .abstract = true,
39bffca2 425 .class_init = macio_class_init,
d8c51b05
AL
426};
427
83f7d43a 428static void macio_register_types(void)
d8c51b05 429{
fcf1bbab 430 type_register_static(&macio_type_info);
d037834a
AF
431 type_register_static(&macio_oldworld_type_info);
432 type_register_static(&macio_newworld_type_info);
d8c51b05
AL
433}
434
83f7d43a 435type_init(macio_register_types)
d8c51b05 436
d037834a 437void macio_init(PCIDevice *d,
07a7484e 438 MemoryRegion *pic_mem,
d037834a 439 MemoryRegion *escc_mem)
3cbee15b 440{
d037834a 441 MacIOState *macio_state = MACIO(d);
3cbee15b 442
23c5e4ca 443 macio_state->pic_mem = pic_mem;
23c5e4ca 444 macio_state->escc_mem = escc_mem;
3cbee15b
JM
445 /* Note: this code is strongly inspirated from the corresponding code
446 in PearPC */
b981289c
AG
447 qdev_prop_set_uint64(DEVICE(&macio_state->cuda), "frequency",
448 macio_state->frequency);
deb54399 449
7b925079 450 qdev_init_nofail(DEVICE(d));
3cbee15b 451}