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Commit | Line | Data |
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87e0331c | 1 | # See docs/devel/tracing.txt for syntax documentation. |
6b5bacf6 | 2 | |
d26af5de NL |
3 | # allwinner-cpucfg.c |
4 | allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32 | |
5 | allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
6 | allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
6556617c | 7 | |
b71d0385 NL |
8 | # allwinner-h3-dramc.c |
9 | allwinner_h3_dramc_rowmirror_disable(void) "Disable row mirror" | |
10 | allwinner_h3_dramc_rowmirror_enable(uint64_t addr) "Enable row mirror: addr 0x%" PRIx64 | |
11 | allwinner_h3_dramcom_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
12 | allwinner_h3_dramcom_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
13 | allwinner_h3_dramctl_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
14 | allwinner_h3_dramctl_write(uint64_t offset, uint64_t data, unsigned size) "Write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
15 | allwinner_h3_dramphy_read(uint64_t offset, uint64_t data, unsigned size) "Read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
16 | allwinner_h3_dramphy_write(uint64_t offset, uint64_t data, unsigned size) "write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
17 | ||
6556617c NL |
18 | # allwinner-sid.c |
19 | allwinner_sid_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
20 | allwinner_sid_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
d26af5de | 21 | |
dc288de0 MR |
22 | # avr_power.c |
23 | avr_power_read(uint8_t value) "power_reduc read value:%u" | |
24 | avr_power_write(uint8_t value) "power_reduc write value:%u" | |
25 | ||
500016e5 | 26 | # eccmemctl.c |
8908eb1a VSO |
27 | ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" |
28 | ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" | |
29 | ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x" | |
30 | ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x" | |
31 | ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x" | |
32 | ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x" | |
33 | ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x" | |
34 | ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x" | |
35 | ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x" | |
36 | ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x" | |
37 | ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x" | |
38 | ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x" | |
39 | ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x" | |
40 | ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x" | |
41 | ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x" | |
42 | ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x" | |
43 | ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x" | |
44 | ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" | |
6b5bacf6 | 45 | |
6007523a | 46 | # empty_slot.c |
6007523a PMD |
47 | empty_slot_write(uint64_t addr, unsigned width, uint64_t value, unsigned size, const char *name) "wr addr:0x%04"PRIx64" data:0x%0*"PRIx64" size %u [%s]" |
48 | ||
500016e5 | 49 | # slavio_misc.c |
6b5bacf6 DB |
50 | slavio_misc_update_irq_raise(void) "Raise IRQ" |
51 | slavio_misc_update_irq_lower(void) "Lower IRQ" | |
52 | slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" | |
8908eb1a VSO |
53 | slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x" |
54 | slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x" | |
55 | slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x" | |
56 | slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x" | |
57 | slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x" | |
58 | slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x" | |
59 | slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x" | |
60 | slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x" | |
61 | slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x" | |
62 | slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x" | |
63 | apc_mem_writeb(uint32_t val) "Write power management 0x%02x" | |
64 | apc_mem_readb(uint32_t ret) "Read power management 0x%02x" | |
65 | slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x" | |
66 | slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x" | |
67 | slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" | |
68 | slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" | |
6b5bacf6 | 69 | |
500016e5 | 70 | # milkymist-hpdmc.c |
8908eb1a VSO |
71 | milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" |
72 | milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" | |
6b5bacf6 | 73 | |
500016e5 | 74 | # milkymist-pfpu.c |
8908eb1a VSO |
75 | milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
76 | milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |
77 | milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x" | |
6b5bacf6 | 78 | milkymist_pfpu_pulse_irq(void) "Pulse IRQ" |
1c8a2388 | 79 | |
500016e5 | 80 | # aspeed_scu.c |
1c8a2388 | 81 | aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 |
dd73185b | 82 | |
dec97760 | 83 | # mps2-scc.c |
dd73185b PM |
84 | mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
85 | mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
86 | mps2_scc_reset(void) "MPS2 SCC: reset" | |
dd73185b PM |
87 | mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32 |
88 | mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32 | |
0ee1e1f4 | 89 | |
dec97760 | 90 | # mps2-fpgaio.c |
9a52d999 PM |
91 | mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
92 | mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
93 | mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset" | |
9a52d999 | 94 | |
500016e5 | 95 | # msf2-sysreg.c |
787bbc30 DB |
96 | msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32 |
97 | msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32 | |
0ee1e1f4 | 98 | msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register" |
30b2f870 | 99 | |
500016e5 | 100 | # imx7_gpr.c |
787bbc30 DB |
101 | imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64 |
102 | imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64 | |
51f233ec | 103 | |
500016e5 | 104 | # mos6522.c |
51f233ec MCA |
105 | mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" |
106 | mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 | |
107 | mos6522_set_sr_int(void) "set sr_int" | |
108 | mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 | |
109 | mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" | |
9eb8040c | 110 | |
e331f79e HS |
111 | # npcm7xx_clk.c |
112 | npcm7xx_clk_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 | |
113 | npcm7xx_clk_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 | |
114 | ||
e5a7ba87 HS |
115 | # npcm7xx_gcr.c |
116 | npcm7xx_gcr_read(uint64_t offset, uint32_t value) " offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 | |
117 | npcm7xx_gcr_write(uint64_t offset, uint32_t value) "offset: 0x%04" PRIx64 " value: 0x%08" PRIx32 | |
118 | ||
326ccfe2 HS |
119 | # npcm7xx_rng.c |
120 | npcm7xx_rng_read(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" | |
121 | npcm7xx_rng_write(uint64_t offset, uint64_t value, unsigned size) "offset: 0x%04" PRIx64 " value: 0x%02" PRIx64 " size: %u" | |
122 | ||
b15e402f | 123 | # stm32f4xx_syscfg.c |
870c034d AF |
124 | stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d" |
125 | stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d" | |
126 | stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " | |
127 | stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" | |
128 | ||
b15e402f | 129 | # stm32f4xx_exti.c |
e64d8c83 AF |
130 | stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d" |
131 | stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " | |
132 | stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" | |
133 | ||
500016e5 | 134 | # tz-mpc.c |
344f4b15 PM |
135 | tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" |
136 | tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
137 | tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d" | |
138 | tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" | |
139 | tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s" | |
dd29d068 | 140 | tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64 |
344f4b15 | 141 | |
500016e5 | 142 | # tz-msc.c |
211e701d PM |
143 | tz_msc_reset(void) "TZ MSC: reset" |
144 | tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d" | |
145 | tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d" | |
211e701d PM |
146 | tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d" |
147 | tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d" | |
148 | tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked" | |
149 | ||
500016e5 | 150 | # tz-ppc.c |
9eb8040c PM |
151 | tz_ppc_reset(void) "TZ PPC: reset" |
152 | tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d" | |
153 | tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d" | |
154 | tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d" | |
155 | tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d" | |
156 | tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d" | |
157 | tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d" | |
f32408f3 DB |
158 | tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked" |
159 | tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked" | |
de343bb6 | 160 | |
500016e5 | 161 | # iotkit-secctl.c |
de343bb6 PM |
162 | iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u" |
163 | iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
164 | iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |
165 | iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
781182e1 | 166 | |
500016e5 | 167 | # imx6ul_ccm.c |
794dcb54 PMD |
168 | ccm_entry(void) "" |
169 | ccm_freq(uint32_t freq) "freq = %d" | |
170 | ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d" | |
171 | ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 | |
172 | ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 | |
75750e4d | 173 | |
dec97760 | 174 | # iotkit-sysinfo.c |
75750e4d PM |
175 | iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
176 | iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
dec97760 MA |
177 | |
178 | # iotkit-sysctl.c | |
75750e4d PM |
179 | iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
180 | iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
181 | iotkit_sysctl_reset(void) "IoTKit SysCtl: reset" | |
5aeb3689 | 182 | |
500016e5 | 183 | # armsse-cpuid.c |
5aeb3689 PM |
184 | armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
185 | armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
cdf63440 | 186 | |
500016e5 | 187 | # armsse-mhu.c |
cdf63440 PM |
188 | armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
189 | armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
118c82e7 EJ |
190 | |
191 | # aspeed_xdma.c | |
192 | aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64 | |
19845504 | 193 | |
b15e402f MA |
194 | # bcm2835_property.c |
195 | bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu" | |
196 | ||
19845504 PMD |
197 | # bcm2835_mbox.c |
198 | bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 | |
199 | bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 | |
200 | bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u" | |
b2619c15 LV |
201 | |
202 | # mac_via.c | |
203 | via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x" | |
204 | via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x" | |
205 | via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x" | |
206 | via1_rtc_internal_cmd(int cmd) "cmd=0x%02x" | |
207 | via1_rtc_cmd_invalid(int value) "value=0x%02x" | |
208 | via1_rtc_internal_time(uint32_t time) "time=0x%08x" | |
209 | via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x" | |
210 | via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x" | |
211 | via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u" | |
212 | via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x" | |
213 | via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x" | |
214 | via1_rtc_cmd_test_write(int value) "value=0x%02x" | |
215 | via1_rtc_cmd_wprotect_write(int value) "value=0x%02x" | |
216 | via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x" | |
217 | via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x" | |
218 | via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x" | |
219 | via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x" | |
975fcedd MCA |
220 | via1_adb_send(const char *state, uint8_t data, const char *vadbint) "state %s data=0x%02x vADBInt=%s" |
221 | via1_adb_receive(const char *state, uint8_t data, const char *vadbint, int status, int index, int size) "state %s data=0x%02x vADBInt=%s status=0x%x index=%d size=%d" | |
222 | via1_adb_poll(uint8_t data, const char *vadbint, int status, int index, int size) "data=0x%02x vADBInt=%s status=0x%x index=%d size=%d" | |
d15188dd PMD |
223 | |
224 | # grlib_ahb_apb_pnp.c | |
225 | grlib_ahb_pnp_read(uint64_t addr, uint32_t value) "AHB PnP read addr:0x%03"PRIx64" data:0x%08x" | |
226 | grlib_apb_pnp_read(uint64_t addr, uint32_t value) "APB PnP read addr:0x%03"PRIx64" data:0x%08x" | |
b989b89f | 227 | |
c1b29826 PMD |
228 | # led.c |
229 | led_set_intensity(const char *color, const char *desc, uint8_t intensity_percent) "LED desc:'%s' color:%s intensity: %u%%" | |
4aef4399 | 230 | led_change_intensity(const char *color, const char *desc, uint8_t old_intensity_percent, uint8_t new_intensity_percent) "LED desc:'%s' color:%s intensity %u%% -> %u%%" |
c1b29826 | 231 | |
b989b89f PMD |
232 | # pca9552.c |
233 | pca955x_gpio_status(const char *description, const char *buf) "%s GPIOs 0-15 [%s]" | |
d82ab293 | 234 | pca955x_gpio_change(const char *description, unsigned id, unsigned prev_state, unsigned current_state) "%s GPIO id:%u status: %u -> %u" |
fc14176b LM |
235 | |
236 | # bcm2835_cprman.c | |
237 | bcm2835_cprman_read(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64 | |
238 | bcm2835_cprman_write(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64 | |
239 | bcm2835_cprman_write_invalid_magic(uint64_t offset, uint64_t value) "offset:0x%" PRIx64 " value:0x%" PRIx64 |