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Commit | Line | Data |
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87e0331c | 1 | # See docs/devel/tracing.txt for syntax documentation. |
6b5bacf6 | 2 | |
d26af5de NL |
3 | # allwinner-cpucfg.c |
4 | allwinner_cpucfg_cpu_reset(uint8_t cpu_id, uint32_t reset_addr) "id %u, reset_addr 0x%" PRIu32 | |
5 | allwinner_cpucfg_read(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
6 | allwinner_cpucfg_write(uint64_t offset, uint64_t data, unsigned size) "offset 0x%" PRIx64 " data 0x%" PRIx64 " size %" PRIu32 | |
7 | ||
500016e5 | 8 | # eccmemctl.c |
8908eb1a VSO |
9 | ecc_mem_writel_mer(uint32_t val) "Write memory enable 0x%08x" |
10 | ecc_mem_writel_mdr(uint32_t val) "Write memory delay 0x%08x" | |
11 | ecc_mem_writel_mfsr(uint32_t val) "Write memory fault status 0x%08x" | |
12 | ecc_mem_writel_vcr(uint32_t val) "Write slot configuration 0x%08x" | |
13 | ecc_mem_writel_dr(uint32_t val) "Write diagnostic 0x%08x" | |
14 | ecc_mem_writel_ecr0(uint32_t val) "Write event count 1 0x%08x" | |
15 | ecc_mem_writel_ecr1(uint32_t val) "Write event count 2 0x%08x" | |
16 | ecc_mem_readl_mer(uint32_t ret) "Read memory enable 0x%08x" | |
17 | ecc_mem_readl_mdr(uint32_t ret) "Read memory delay 0x%08x" | |
18 | ecc_mem_readl_mfsr(uint32_t ret) "Read memory fault status 0x%08x" | |
19 | ecc_mem_readl_vcr(uint32_t ret) "Read slot configuration 0x%08x" | |
20 | ecc_mem_readl_mfar0(uint32_t ret) "Read memory fault address 0 0x%08x" | |
21 | ecc_mem_readl_mfar1(uint32_t ret) "Read memory fault address 1 0x%08x" | |
22 | ecc_mem_readl_dr(uint32_t ret) "Read diagnostic 0x%08x" | |
23 | ecc_mem_readl_ecr0(uint32_t ret) "Read event count 1 0x%08x" | |
24 | ecc_mem_readl_ecr1(uint32_t ret) "Read event count 2 0x%08x" | |
25 | ecc_diag_mem_writeb(uint64_t addr, uint32_t val) "Write diagnostic %"PRId64" = 0x%02x" | |
26 | ecc_diag_mem_readb(uint64_t addr, uint32_t ret) "Read diagnostic %"PRId64"= 0x%02x" | |
6b5bacf6 | 27 | |
500016e5 | 28 | # slavio_misc.c |
6b5bacf6 DB |
29 | slavio_misc_update_irq_raise(void) "Raise IRQ" |
30 | slavio_misc_update_irq_lower(void) "Lower IRQ" | |
31 | slavio_set_power_fail(int power_failing, uint8_t config) "Power fail: %d, config: %d" | |
8908eb1a VSO |
32 | slavio_cfg_mem_writeb(uint32_t val) "Write config 0x%02x" |
33 | slavio_cfg_mem_readb(uint32_t ret) "Read config 0x%02x" | |
34 | slavio_diag_mem_writeb(uint32_t val) "Write diag 0x%02x" | |
35 | slavio_diag_mem_readb(uint32_t ret) "Read diag 0x%02x" | |
36 | slavio_mdm_mem_writeb(uint32_t val) "Write modem control 0x%02x" | |
37 | slavio_mdm_mem_readb(uint32_t ret) "Read modem control 0x%02x" | |
38 | slavio_aux1_mem_writeb(uint32_t val) "Write aux1 0x%02x" | |
39 | slavio_aux1_mem_readb(uint32_t ret) "Read aux1 0x%02x" | |
40 | slavio_aux2_mem_writeb(uint32_t val) "Write aux2 0x%02x" | |
41 | slavio_aux2_mem_readb(uint32_t ret) "Read aux2 0x%02x" | |
42 | apc_mem_writeb(uint32_t val) "Write power management 0x%02x" | |
43 | apc_mem_readb(uint32_t ret) "Read power management 0x%02x" | |
44 | slavio_sysctrl_mem_writel(uint32_t val) "Write system control 0x%08x" | |
45 | slavio_sysctrl_mem_readl(uint32_t ret) "Read system control 0x%08x" | |
46 | slavio_led_mem_writew(uint32_t val) "Write diagnostic LED 0x%04x" | |
47 | slavio_led_mem_readw(uint32_t ret) "Read diagnostic LED 0x%04x" | |
6b5bacf6 | 48 | |
500016e5 | 49 | # milkymist-hpdmc.c |
8908eb1a VSO |
50 | milkymist_hpdmc_memory_read(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" |
51 | milkymist_hpdmc_memory_write(uint32_t addr, uint32_t value) "addr=0x%08x value=0x%08x" | |
6b5bacf6 | 52 | |
500016e5 | 53 | # milkymist-pfpu.c |
8908eb1a VSO |
54 | milkymist_pfpu_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" |
55 | milkymist_pfpu_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x value 0x%08x" | |
56 | milkymist_pfpu_vectout(uint32_t a, uint32_t b, uint32_t dma_ptr) "a 0x%08x b 0x%08x dma_ptr 0x%08x" | |
6b5bacf6 | 57 | milkymist_pfpu_pulse_irq(void) "Pulse IRQ" |
1c8a2388 | 58 | |
500016e5 | 59 | # aspeed_scu.c |
1c8a2388 | 60 | aspeed_scu_write(uint64_t offset, unsigned size, uint32_t data) "To 0x%" PRIx64 " of size %u: 0x%" PRIx32 |
dd73185b | 61 | |
dec97760 | 62 | # mps2-scc.c |
dd73185b PM |
63 | mps2_scc_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
64 | mps2_scc_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 SCC write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
65 | mps2_scc_reset(void) "MPS2 SCC: reset" | |
66 | mps2_scc_leds(char led7, char led6, char led5, char led4, char led3, char led2, char led1, char led0) "MPS2 SCC LEDs: %c%c%c%c%c%c%c%c" | |
67 | mps2_scc_cfg_write(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config write: function %d device %d data 0x%" PRIx32 | |
68 | mps2_scc_cfg_read(unsigned function, unsigned device, uint32_t value) "MPS2 SCC config read: function %d device %d data 0x%" PRIx32 | |
0ee1e1f4 | 69 | |
dec97760 | 70 | # mps2-fpgaio.c |
9a52d999 PM |
71 | mps2_fpgaio_read(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
72 | mps2_fpgaio_write(uint64_t offset, uint64_t data, unsigned size) "MPS2 FPGAIO write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
73 | mps2_fpgaio_reset(void) "MPS2 FPGAIO: reset" | |
74 | mps2_fpgaio_leds(char led1, char led0) "MPS2 FPGAIO LEDs: %c%c" | |
75 | ||
500016e5 | 76 | # msf2-sysreg.c |
787bbc30 DB |
77 | msf2_sysreg_write(uint64_t offset, uint32_t val, uint32_t prev) "msf2-sysreg write: addr 0x%08" PRIx64 " data 0x%" PRIx32 " prev 0x%" PRIx32 |
78 | msf2_sysreg_read(uint64_t offset, uint32_t val) "msf2-sysreg read: addr 0x%08" PRIx64 " data 0x%08" PRIx32 | |
0ee1e1f4 | 79 | msf2_sysreg_write_pll_status(void) "Invalid write to read only PLL status register" |
30b2f870 | 80 | |
500016e5 | 81 | # imx7_gpr.c |
787bbc30 DB |
82 | imx7_gpr_read(uint64_t offset) "addr 0x%08" PRIx64 |
83 | imx7_gpr_write(uint64_t offset, uint64_t value) "addr 0x%08" PRIx64 "value 0x%08" PRIx64 | |
51f233ec | 84 | |
500016e5 | 85 | # mos6522.c |
51f233ec MCA |
86 | mos6522_set_counter(int index, unsigned int val) "T%d.counter=%d" |
87 | mos6522_get_next_irq_time(uint16_t latch, int64_t d, int64_t delta) "latch=%d counter=0x%"PRId64 " delta_next=0x%"PRId64 | |
88 | mos6522_set_sr_int(void) "set sr_int" | |
89 | mos6522_write(uint64_t addr, uint64_t val) "reg=0x%"PRIx64 " val=0x%"PRIx64 | |
90 | mos6522_read(uint64_t addr, unsigned val) "reg=0x%"PRIx64 " val=0x%x" | |
9eb8040c | 91 | |
870c034d AF |
92 | # stm32f4xx_syscfg |
93 | stm32f4xx_syscfg_set_irq(int gpio, int line, int level) "Interupt: GPIO: %d, Line: %d; Level: %d" | |
94 | stm32f4xx_pulse_exti(int irq) "Pulse EXTI: %d" | |
95 | stm32f4xx_syscfg_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " | |
96 | stm32f4xx_syscfg_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" | |
97 | ||
e64d8c83 AF |
98 | # stm32f4xx_exti |
99 | stm32f4xx_exti_set_irq(int irq, int leve) "Set EXTI: %d to %d" | |
100 | stm32f4xx_exti_read(uint64_t addr) "reg read: addr: 0x%" PRIx64 " " | |
101 | stm32f4xx_exti_write(uint64_t addr, uint64_t data) "reg write: addr: 0x%" PRIx64 " val: 0x%" PRIx64 "" | |
102 | ||
500016e5 | 103 | # tz-mpc.c |
344f4b15 PM |
104 | tz_mpc_reg_read(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs read: offset 0x%x data 0x%" PRIx64 " size %u" |
105 | tz_mpc_reg_write(uint32_t offset, uint64_t data, unsigned size) "TZ MPC regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
106 | tz_mpc_mem_blocked_read(uint64_t addr, unsigned size, bool secure) "TZ MPC blocked read: offset 0x%" PRIx64 " size %u secure %d" | |
107 | tz_mpc_mem_blocked_write(uint64_t addr, uint64_t data, unsigned size, bool secure) "TZ MPC blocked write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u secure %d" | |
108 | tz_mpc_translate(uint64_t addr, int flags, const char *idx, const char *res) "TZ MPC translate: addr 0x%" PRIx64 " flags 0x%x iommu_idx %s: %s" | |
dd29d068 | 109 | tz_mpc_iommu_notify(uint64_t addr) "TZ MPC iommu: notifying UNMAP/MAP for 0x%" PRIx64 |
344f4b15 | 110 | |
500016e5 | 111 | # tz-msc.c |
211e701d PM |
112 | tz_msc_reset(void) "TZ MSC: reset" |
113 | tz_msc_cfg_nonsec(int level) "TZ MSC: cfg_nonsec = %d" | |
114 | tz_msc_cfg_sec_resp(int level) "TZ MSC: cfg_sec_resp = %d" | |
211e701d PM |
115 | tz_msc_irq_clear(int level) "TZ MSC: int_clear = %d" |
116 | tz_msc_update_irq(int level) "TZ MSC: setting irq line to %d" | |
117 | tz_msc_access_blocked(uint64_t offset) "TZ MSC: offset 0x%" PRIx64 " access blocked" | |
118 | ||
500016e5 | 119 | # tz-ppc.c |
9eb8040c PM |
120 | tz_ppc_reset(void) "TZ PPC: reset" |
121 | tz_ppc_cfg_nonsec(int n, int level) "TZ PPC: cfg_nonsec[%d] = %d" | |
122 | tz_ppc_cfg_ap(int n, int level) "TZ PPC: cfg_ap[%d] = %d" | |
123 | tz_ppc_cfg_sec_resp(int level) "TZ PPC: cfg_sec_resp = %d" | |
124 | tz_ppc_irq_enable(int level) "TZ PPC: int_enable = %d" | |
125 | tz_ppc_irq_clear(int level) "TZ PPC: int_clear = %d" | |
126 | tz_ppc_update_irq(int level) "TZ PPC: setting irq line to %d" | |
f32408f3 DB |
127 | tz_ppc_read_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " read (secure %d user %d) blocked" |
128 | tz_ppc_write_blocked(int n, uint64_t offset, bool secure, bool user) "TZ PPC: port %d offset 0x%" PRIx64 " write (secure %d user %d) blocked" | |
de343bb6 | 129 | |
500016e5 | 130 | # iotkit-secctl.c |
de343bb6 PM |
131 | iotkit_secctl_s_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs read: offset 0x%x data 0x%" PRIx64 " size %u" |
132 | iotkit_secctl_s_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl S regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
133 | iotkit_secctl_ns_read(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs read: offset 0x%x data 0x%" PRIx64 " size %u" | |
134 | iotkit_secctl_ns_write(uint32_t offset, uint64_t data, unsigned size) "IoTKit SecCtl NS regs write: offset 0x%x data 0x%" PRIx64 " size %u" | |
781182e1 | 135 | |
500016e5 | 136 | # imx6ul_ccm.c |
794dcb54 PMD |
137 | ccm_entry(void) "" |
138 | ccm_freq(uint32_t freq) "freq = %d" | |
139 | ccm_clock_freq(uint32_t clock, uint32_t freq) "(Clock = %d) = %d" | |
140 | ccm_read_reg(const char *reg_name, uint32_t value) "reg[%s] <= 0x%" PRIx32 | |
141 | ccm_write_reg(const char *reg_name, uint32_t value) "reg[%s] => 0x%" PRIx32 | |
75750e4d | 142 | |
dec97760 | 143 | # iotkit-sysinfo.c |
75750e4d PM |
144 | iotkit_sysinfo_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
145 | iotkit_sysinfo_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysInfo write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
dec97760 MA |
146 | |
147 | # iotkit-sysctl.c | |
75750e4d PM |
148 | iotkit_sysctl_read(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
149 | iotkit_sysctl_write(uint64_t offset, uint64_t data, unsigned size) "IoTKit SysCtl write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
150 | iotkit_sysctl_reset(void) "IoTKit SysCtl: reset" | |
5aeb3689 | 151 | |
500016e5 | 152 | # armsse-cpuid.c |
5aeb3689 PM |
153 | armsse_cpuid_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
154 | armsse_cpuid_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 CPU_IDENTITY write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
cdf63440 | 155 | |
500016e5 | 156 | # armsse-mhu.c |
cdf63440 PM |
157 | armsse_mhu_read(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU read: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" |
158 | armsse_mhu_write(uint64_t offset, uint64_t data, unsigned size) "SSE-200 MHU write: offset 0x%" PRIx64 " data 0x%" PRIx64 " size %u" | |
118c82e7 EJ |
159 | |
160 | # aspeed_xdma.c | |
161 | aspeed_xdma_write(uint64_t offset, uint64_t data) "XDMA write: offset 0x%" PRIx64 " data 0x%" PRIx64 | |
19845504 PMD |
162 | |
163 | # bcm2835_mbox.c | |
164 | bcm2835_mbox_write(unsigned int size, uint64_t addr, uint64_t value) "mbox write sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 | |
165 | bcm2835_mbox_read(unsigned int size, uint64_t addr, uint64_t value) "mbox read sz:%u addr:0x%"PRIx64" data:0x%"PRIx64 | |
166 | bcm2835_mbox_irq(unsigned level) "mbox irq:ARM level:%u" | |
167 | bcm2835_mbox_property(uint32_t tag, uint32_t bufsize, size_t resplen) "mbox property tag:0x%08x in_sz:%u out_sz:%zu" | |
b2619c15 LV |
168 | |
169 | # mac_via.c | |
170 | via1_rtc_update_data_out(int count, int value) "count=%d value=0x%02x" | |
171 | via1_rtc_update_data_in(int count, int value) "count=%d value=0x%02x" | |
172 | via1_rtc_internal_status(int cmd, int alt, int value) "cmd=0x%02x alt=0x%02x value=0x%02x" | |
173 | via1_rtc_internal_cmd(int cmd) "cmd=0x%02x" | |
174 | via1_rtc_cmd_invalid(int value) "value=0x%02x" | |
175 | via1_rtc_internal_time(uint32_t time) "time=0x%08x" | |
176 | via1_rtc_internal_set_cmd(int cmd) "cmd=0x%02x" | |
177 | via1_rtc_internal_ignore_cmd(int cmd) "cmd=0x%02x" | |
178 | via1_rtc_internal_set_alt(int alt, int sector, int offset) "alt=0x%02x sector=%u offset=%u" | |
179 | via1_rtc_cmd_seconds_read(int reg, int value) "reg=%d value=0x%02x" | |
180 | via1_rtc_cmd_seconds_write(int reg, int value) "reg=%d value=0x%02x" | |
181 | via1_rtc_cmd_test_write(int value) "value=0x%02x" | |
182 | via1_rtc_cmd_wprotect_write(int value) "value=0x%02x" | |
183 | via1_rtc_cmd_pram_read(int addr, int value) "addr=%u value=0x%02x" | |
184 | via1_rtc_cmd_pram_write(int addr, int value) "addr=%u value=0x%02x" | |
185 | via1_rtc_cmd_pram_sect_read(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x" | |
186 | via1_rtc_cmd_pram_sect_write(int sector, int offset, int addr, int value) "sector=%u offset=%u addr=%d value=0x%02x" |