[mirror_qemu.git] / hw / net / e1000x_common.h

/*
* QEMU e1000(e) emulation - shared code
*
* Copyright (c) 2008 Qumranet
*
* Based on work done by:
* Nir Peleg, Tutis Systems Ltd. for Qumranet Inc.
* Copyright (c) 2007 Dan Aloni
* Copyright (c) 2004 Antony T Curtis
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2 of the License, or (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
*/

#ifndef HW_NET_E1000X_COMMON_H
#define HW_NET_E1000X_COMMON_H

#include "e1000_regs.h"

#define defreg(x)   x = (E1000_##x >> 2)
enum {
    defreg(CTRL),    defreg(EECD),    defreg(EERD),    defreg(GPRC),
    defreg(GPTC),    defreg(ICR),     defreg(ICS),     defreg(IMC),
    defreg(IMS),     defreg(LEDCTL),  defreg(MANC),    defreg(MDIC),
    defreg(MPC),     defreg(PBA),     defreg(RCTL),    defreg(RDBAH0),
    defreg(RDBAL0),  defreg(RDH0),    defreg(RDLEN0),  defreg(RDT0),
    defreg(STATUS),  defreg(SWSM),    defreg(TCTL),    defreg(TDBAH),
    defreg(TDBAL),   defreg(TDH),     defreg(TDLEN),   defreg(TDT),
    defreg(TDLEN1),  defreg(TDBAL1),  defreg(TDBAH1),  defreg(TDH1),
    defreg(TDT1),    defreg(TORH),    defreg(TORL),    defreg(TOTH),
    defreg(TOTL),    defreg(TPR),     defreg(TPT),     defreg(TXDCTL),
    defreg(WUFC),    defreg(RA),      defreg(MTA),     defreg(CRCERRS),
    defreg(VFTA),    defreg(VET),     defreg(RDTR),    defreg(RADV),
    defreg(TADV),    defreg(ITR),     defreg(SCC),     defreg(ECOL),
    defreg(MCC),     defreg(LATECOL), defreg(COLC),    defreg(DC),
    defreg(TNCRS),   defreg(SEQEC),   defreg(CEXTERR), defreg(RLEC),
    defreg(XONRXC),  defreg(XONTXC),  defreg(XOFFRXC), defreg(XOFFTXC),
    defreg(FCRUC),   defreg(AIT),     defreg(TDFH),    defreg(TDFT),
    defreg(TDFHS),   defreg(TDFTS),   defreg(TDFPC),   defreg(WUC),
    defreg(WUS),     defreg(POEMB),   defreg(PBS),     defreg(RDFH),
    defreg(RDFT),    defreg(RDFHS),   defreg(RDFTS),   defreg(RDFPC),
    defreg(PBM),     defreg(IPAV),    defreg(IP4AT),   defreg(IP6AT),
    defreg(WUPM),    defreg(FFLT),    defreg(FFMT),    defreg(FFVT),
    defreg(TARC0),   defreg(TARC1),   defreg(IAM),     defreg(EXTCNF_CTRL),
    defreg(GCR),     defreg(TIMINCA), defreg(EIAC),    defreg(CTRL_EXT),
    defreg(IVAR),    defreg(MFUTP01), defreg(MFUTP23), defreg(MANC2H),
    defreg(MFVAL),   defreg(MDEF),    defreg(FACTPS),  defreg(FTFT),
    defreg(RUC),     defreg(ROC),     defreg(RFC),     defreg(RJC),
    defreg(PRC64),   defreg(PRC127),  defreg(PRC255),  defreg(PRC511),
    defreg(PRC1023), defreg(PRC1522), defreg(PTC64),   defreg(PTC127),
    defreg(PTC255),  defreg(PTC511),  defreg(PTC1023), defreg(PTC1522),
    defreg(GORCL),   defreg(GORCH),   defreg(GOTCL),   defreg(GOTCH),
    defreg(RNBC),    defreg(BPRC),    defreg(MPRC),    defreg(RFCTL),
    defreg(PSRCTL),  defreg(MPTC),    defreg(BPTC),    defreg(TSCTFC),
    defreg(IAC),     defreg(MGTPRC),  defreg(MGTPDC),  defreg(MGTPTC),
    defreg(TSCTC),   defreg(RXCSUM),  defreg(FUNCTAG), defreg(GSCL_1),
    defreg(GSCL_2),  defreg(GSCL_3),  defreg(GSCL_4),  defreg(GSCN_0),
    defreg(GSCN_1),  defreg(GSCN_2),  defreg(GSCN_3),  defreg(GCR2),
    defreg(RAID),    defreg(RSRPD),   defreg(TIDV),    defreg(EITR),
    defreg(MRQC),    defreg(RETA),    defreg(RSSRK),   defreg(RDBAH1),
    defreg(RDBAL1),  defreg(RDLEN1),  defreg(RDH1),    defreg(RDT1),
    defreg(PBACLR),  defreg(FCAL),    defreg(FCAH),    defreg(FCT),
    defreg(FCRTH),   defreg(FCRTL),   defreg(FCTTV),   defreg(FCRTV),
    defreg(FLA),     defreg(EEWR),    defreg(FLOP),    defreg(FLOL),
    defreg(FLSWCTL), defreg(FLSWCNT), defreg(RXDCTL),  defreg(RXDCTL1),
    defreg(MAVTV0),  defreg(MAVTV1),  defreg(MAVTV2),  defreg(MAVTV3),
    defreg(TXSTMPL), defreg(TXSTMPH), defreg(SYSTIML), defreg(SYSTIMH),
    defreg(RXCFGL),  defreg(RXUDP),   defreg(TIMADJL), defreg(TIMADJH),
    defreg(RXSTMPH), defreg(RXSTMPL), defreg(RXSATRL), defreg(RXSATRH),
    defreg(FLASHT),  defreg(TIPG),    defreg(RDH),     defreg(RDT),
    defreg(RDLEN),   defreg(RDBAH),   defreg(RDBAL),
    defreg(TXDCTL1),
    defreg(FLSWDATA),
    defreg(CTRL_DUP),
    defreg(EXTCNF_SIZE),
    defreg(EEMNGCTL),
    defreg(EEMNGDATA),
    defreg(FLMNGCTL),
    defreg(FLMNGDATA),
    defreg(FLMNGCNT),
    defreg(TSYNCRXCTL),
    defreg(TSYNCTXCTL),

    /* Aliases */
    defreg(RDH0_A),  defreg(RDT0_A),  defreg(RDTR_A),  defreg(RDFH_A),
    defreg(RDFT_A),  defreg(TDH_A),   defreg(TDT_A),   defreg(TIDV_A),
    defreg(TDFH_A),  defreg(TDFT_A),  defreg(RA_A),    defreg(RDBAL0_A),
    defreg(TDBAL_A), defreg(TDLEN_A), defreg(VFTA_A),  defreg(RDLEN0_A),
    defreg(FCRTL_A), defreg(FCRTH_A)
};

static inline void
e1000x_inc_reg_if_not_full(uint32_t *mac, int index)
{
    if (mac[index] != 0xffffffff) {
        mac[index]++;
    }
}

static inline void
e1000x_grow_8reg_if_not_full(uint32_t *mac, int index, int size)
{
    uint64_t sum = mac[index] | (uint64_t)mac[index + 1] << 32;

    if (sum + size < sum) {
        sum = ~0ULL;
    } else {
        sum += size;
    }
    mac[index] = sum;
    mac[index + 1] = sum >> 32;
}

static inline int
e1000x_vlan_enabled(uint32_t *mac)
{
    return ((mac[CTRL] & E1000_CTRL_VME) != 0);
}

static inline int
e1000x_is_vlan_txd(uint32_t txd_lower)
{
    return ((txd_lower & E1000_TXD_CMD_VLE) != 0);
}

static inline int
e1000x_vlan_rx_filter_enabled(uint32_t *mac)
{
    return ((mac[RCTL] & E1000_RCTL_VFE) != 0);
}

static inline int
e1000x_fcs_len(uint32_t *mac)
{
    /* FCS aka Ethernet CRC-32. We don't get it from backends and can't
    * fill it in, just pad descriptor length by 4 bytes unless guest
    * told us to strip it off the packet. */
    return (mac[RCTL] & E1000_RCTL_SECRC) ? 0 : 4;
}

static inline void
e1000x_update_regs_on_link_down(uint32_t *mac, uint16_t *phy)
{
    mac[STATUS] &= ~E1000_STATUS_LU;
    phy[PHY_STATUS] &= ~MII_SR_LINK_STATUS;
    phy[PHY_STATUS] &= ~MII_SR_AUTONEG_COMPLETE;
    phy[PHY_LP_ABILITY] &= ~MII_LPAR_LPACK;
}

static inline void
e1000x_update_regs_on_link_up(uint32_t *mac, uint16_t *phy)
{
    mac[STATUS] |= E1000_STATUS_LU;
    phy[PHY_STATUS] |= MII_SR_LINK_STATUS;
}

void e1000x_update_rx_total_stats(uint32_t *mac,
                                  size_t data_size,
                                  size_t data_fcs_size);

void e1000x_core_prepare_eeprom(uint16_t       *eeprom,
                                const uint16_t *templ,
                                uint32_t        templ_size,
                                uint16_t        dev_id,
                                const uint8_t  *macaddr);

uint32_t e1000x_rxbufsize(uint32_t rctl);

bool e1000x_rx_ready(PCIDevice *d, uint32_t *mac);

bool e1000x_is_vlan_packet(const uint8_t *buf, uint16_t vet);

bool e1000x_rx_group_filter(uint32_t *mac, const uint8_t *buf);

bool e1000x_hw_rx_enabled(uint32_t *mac);

bool e1000x_is_oversized(uint32_t *mac, size_t size);

void e1000x_restart_autoneg(uint32_t *mac, uint16_t *phy, QEMUTimer *timer);

void e1000x_reset_mac_addr(NICState *nic, uint32_t *mac_regs,
                           uint8_t *mac_addr);

void e1000x_update_regs_on_autoneg_done(uint32_t *mac, uint16_t *phy);

void e1000x_increase_size_stats(uint32_t *mac, const int *size_regs, int size);

typedef struct e1000x_txd_props {
    uint8_t ipcss;
    uint8_t ipcso;
    uint16_t ipcse;
    uint8_t tucss;
    uint8_t tucso;
    uint16_t tucse;
    uint32_t paylen;
    uint8_t hdr_len;
    uint16_t mss;
    int8_t ip;
    int8_t tcp;
    bool tse;
} e1000x_txd_props;

void e1000x_read_tx_ctx_descr(struct e1000_context_desc *d,
                              e1000x_txd_props *props);

#endif
Commit	Line	Data
093454e2 DF	1	/*
	2	* QEMU e1000(e) emulation - shared code
	3	*
	4	* Copyright (c) 2008 Qumranet
	5	*
	6	* Based on work done by:
	7	* Nir Peleg, Tutis Systems Ltd. for Qumranet Inc.
	8	* Copyright (c) 2007 Dan Aloni
	9	* Copyright (c) 2004 Antony T Curtis
	10	*
	11	* This library is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU Lesser General Public
	13	* License as published by the Free Software Foundation; either
	14	* version 2 of the License, or (at your option) any later version.
	15	*
	16	* This library is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	19	* Lesser General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU Lesser General Public
	22	* License along with this library; if not, see <http://www.gnu.org/licenses/>.
	23	*/
	24
f91005e1 MA	25	#ifndef HW_NET_E1000X_COMMON_H
	26	#define HW_NET_E1000X_COMMON_H
	27
093454e2 DF	28	#include "e1000_regs.h"
	29
	30	#define defreg(x) x = (E1000_##x >> 2)
	31	enum {
	32	defreg(CTRL), defreg(EECD), defreg(EERD), defreg(GPRC),
	33	defreg(GPTC), defreg(ICR), defreg(ICS), defreg(IMC),
	34	defreg(IMS), defreg(LEDCTL), defreg(MANC), defreg(MDIC),
	35	defreg(MPC), defreg(PBA), defreg(RCTL), defreg(RDBAH0),
	36	defreg(RDBAL0), defreg(RDH0), defreg(RDLEN0), defreg(RDT0),
	37	defreg(STATUS), defreg(SWSM), defreg(TCTL), defreg(TDBAH),
	38	defreg(TDBAL), defreg(TDH), defreg(TDLEN), defreg(TDT),
	39	defreg(TDLEN1), defreg(TDBAL1), defreg(TDBAH1), defreg(TDH1),
	40	defreg(TDT1), defreg(TORH), defreg(TORL), defreg(TOTH),
	41	defreg(TOTL), defreg(TPR), defreg(TPT), defreg(TXDCTL),
	42	defreg(WUFC), defreg(RA), defreg(MTA), defreg(CRCERRS),
	43	defreg(VFTA), defreg(VET), defreg(RDTR), defreg(RADV),
	44	defreg(TADV), defreg(ITR), defreg(SCC), defreg(ECOL),
	45	defreg(MCC), defreg(LATECOL), defreg(COLC), defreg(DC),
757704f1	46	defreg(TNCRS), defreg(SEQEC), defreg(CEXTERR), defreg(RLEC),
093454e2 DF	47	defreg(XONRXC), defreg(XONTXC), defreg(XOFFRXC), defreg(XOFFTXC),
	48	defreg(FCRUC), defreg(AIT), defreg(TDFH), defreg(TDFT),
	49	defreg(TDFHS), defreg(TDFTS), defreg(TDFPC), defreg(WUC),
	50	defreg(WUS), defreg(POEMB), defreg(PBS), defreg(RDFH),
	51	defreg(RDFT), defreg(RDFHS), defreg(RDFTS), defreg(RDFPC),
	52	defreg(PBM), defreg(IPAV), defreg(IP4AT), defreg(IP6AT),
	53	defreg(WUPM), defreg(FFLT), defreg(FFMT), defreg(FFVT),
	54	defreg(TARC0), defreg(TARC1), defreg(IAM), defreg(EXTCNF_CTRL),
	55	defreg(GCR), defreg(TIMINCA), defreg(EIAC), defreg(CTRL_EXT),
	56	defreg(IVAR), defreg(MFUTP01), defreg(MFUTP23), defreg(MANC2H),
	57	defreg(MFVAL), defreg(MDEF), defreg(FACTPS), defreg(FTFT),
	58	defreg(RUC), defreg(ROC), defreg(RFC), defreg(RJC),
	59	defreg(PRC64), defreg(PRC127), defreg(PRC255), defreg(PRC511),
	60	defreg(PRC1023), defreg(PRC1522), defreg(PTC64), defreg(PTC127),
	61	defreg(PTC255), defreg(PTC511), defreg(PTC1023), defreg(PTC1522),
	62	defreg(GORCL), defreg(GORCH), defreg(GOTCL), defreg(GOTCH),
	63	defreg(RNBC), defreg(BPRC), defreg(MPRC), defreg(RFCTL),
	64	defreg(PSRCTL), defreg(MPTC), defreg(BPTC), defreg(TSCTFC),
	65	defreg(IAC), defreg(MGTPRC), defreg(MGTPDC), defreg(MGTPTC),
	66	defreg(TSCTC), defreg(RXCSUM), defreg(FUNCTAG), defreg(GSCL_1),
	67	defreg(GSCL_2), defreg(GSCL_3), defreg(GSCL_4), defreg(GSCN_0),
	68	defreg(GSCN_1), defreg(GSCN_2), defreg(GSCN_3), defreg(GCR2),
	69	defreg(RAID), defreg(RSRPD), defreg(TIDV), defreg(EITR),
	70	defreg(MRQC), defreg(RETA), defreg(RSSRK), defreg(RDBAH1),
	71	defreg(RDBAL1), defreg(RDLEN1), defreg(RDH1), defreg(RDT1),
	72	defreg(PBACLR), defreg(FCAL), defreg(FCAH), defreg(FCT),
	73	defreg(FCRTH), defreg(FCRTL), defreg(FCTTV), defreg(FCRTV),
	74	defreg(FLA), defreg(EEWR), defreg(FLOP), defreg(FLOL),
	75	defreg(FLSWCTL), defreg(FLSWCNT), defreg(RXDCTL), defreg(RXDCTL1),
	76	defreg(MAVTV0), defreg(MAVTV1), defreg(MAVTV2), defreg(MAVTV3),
	77	defreg(TXSTMPL), defreg(TXSTMPH), defreg(SYSTIML), defreg(SYSTIMH),
	78	defreg(RXCFGL), defreg(RXUDP), defreg(TIMADJL), defreg(TIMADJH),
	79	defreg(RXSTMPH), defreg(RXSTMPL), defreg(RXSATRL), defreg(RXSATRH),
	80	defreg(FLASHT), defreg(TIPG), defreg(RDH), defreg(RDT),
	81	defreg(RDLEN), defreg(RDBAH), defreg(RDBAL),
	82	defreg(TXDCTL1),
	83	defreg(FLSWDATA),
	84	defreg(CTRL_DUP),
	85	defreg(EXTCNF_SIZE),
	86	defreg(EEMNGCTL),
	87	defreg(EEMNGDATA),
	88	defreg(FLMNGCTL),
	89	defreg(FLMNGDATA),
	90	defreg(FLMNGCNT),
	91	defreg(TSYNCRXCTL),
	92	defreg(TSYNCTXCTL),
	93
	94	/* Aliases */
	95	defreg(RDH0_A), defreg(RDT0_A), defreg(RDTR_A), defreg(RDFH_A),
	96	defreg(RDFT_A), defreg(TDH_A), defreg(TDT_A), defreg(TIDV_A),
	97	defreg(TDFH_A), defreg(TDFT_A), defreg(RA_A), defreg(RDBAL0_A),
	98	defreg(TDBAL_A), defreg(TDLEN_A), defreg(VFTA_A), defreg(RDLEN0_A),
	99	defreg(FCRTL_A), defreg(FCRTH_A)
	100	};
	101
	102	static inline void
	103	e1000x_inc_reg_if_not_full(uint32_t *mac, int index)
	104	{
	105	if (mac[index] != 0xffffffff) {
	106	mac[index]++;
	107	}
	108	}
	109
	110	static inline void
111	e1000x_grow_8reg_if_not_full(uint32_t *mac, int index, int size)
112	{
113	uint64_t sum = mac[index] \| (uint64_t)mac[index + 1] << 32;
114
115	if (sum + size < sum) {
116	sum = ~0ULL;
117	} else {
118	sum += size;
119	}
120	mac[index] = sum;
121	mac[index + 1] = sum >> 32;
122	}
123
124	static inline int
125	e1000x_vlan_enabled(uint32_t *mac)
126	{
127	return ((mac[CTRL] & E1000_CTRL_VME) != 0);
128	}
129
130	static inline int
131	e1000x_is_vlan_txd(uint32_t txd_lower)
132	{
133	return ((txd_lower & E1000_TXD_CMD_VLE) != 0);
134	}
135
136	static inline int
137	e1000x_vlan_rx_filter_enabled(uint32_t *mac)
138	{
139	return ((mac[RCTL] & E1000_RCTL_VFE) != 0);
140	}
141
142	static inline int
143	e1000x_fcs_len(uint32_t *mac)
144	{
145	/* FCS aka Ethernet CRC-32. We don't get it from backends and can't
146	* fill it in, just pad descriptor length by 4 bytes unless guest
147	* told us to strip it off the packet. */
148	return (mac[RCTL] & E1000_RCTL_SECRC) ? 0 : 4;
149	}
150
151	static inline void
152	e1000x_update_regs_on_link_down(uint32_t mac, uint16_t phy)
153	{
154	mac[STATUS] &= ~E1000_STATUS_LU;
155	phy[PHY_STATUS] &= ~MII_SR_LINK_STATUS;
156	phy[PHY_STATUS] &= ~MII_SR_AUTONEG_COMPLETE;
157	phy[PHY_LP_ABILITY] &= ~MII_LPAR_LPACK;
158	}
159
160	static inline void
161	e1000x_update_regs_on_link_up(uint32_t mac, uint16_t phy)
162	{
163	mac[STATUS] \|= E1000_STATUS_LU;
164	phy[PHY_STATUS] \|= MII_SR_LINK_STATUS;
165	}
166
167	void e1000x_update_rx_total_stats(uint32_t *mac,
168	size_t data_size,
169	size_t data_fcs_size);
170
171	void e1000x_core_prepare_eeprom(uint16_t *eeprom,
172	const uint16_t *templ,
173	uint32_t templ_size,
174	uint16_t dev_id,
175	const uint8_t *macaddr);
176
177	uint32_t e1000x_rxbufsize(uint32_t rctl);
178
179	bool e1000x_rx_ready(PCIDevice d, uint32_t mac);
180
181	bool e1000x_is_vlan_packet(const uint8_t *buf, uint16_t vet);
182
183	bool e1000x_rx_group_filter(uint32_t mac, const uint8_t buf);
184
185	bool e1000x_hw_rx_enabled(uint32_t *mac);
186
187	bool e1000x_is_oversized(uint32_t *mac, size_t size);
188
189	void e1000x_restart_autoneg(uint32_t mac, uint16_t phy, QEMUTimer *timer);
190
191	void e1000x_reset_mac_addr(NICState nic, uint32_t mac_regs,
192	uint8_t *mac_addr);
193
194	void e1000x_update_regs_on_autoneg_done(uint32_t mac, uint16_t phy);
195
196	void e1000x_increase_size_stats(uint32_t mac, const int size_regs, int size);
197
198	typedef struct e1000x_txd_props {
093454e2 DF	199	uint8_t ipcss;
	200	uint8_t ipcso;
	201	uint16_t ipcse;
	202	uint8_t tucss;
	203	uint8_t tucso;
	204	uint16_t tucse;
	205	uint32_t paylen;
	206	uint8_t hdr_len;
	207	uint16_t mss;
	208	int8_t ip;
	209	int8_t tcp;
	210	bool tse;
093454e2 DF	211	} e1000x_txd_props;
	212
	213	void e1000x_read_tx_ctx_descr(struct e1000_context_desc *d,
	214	e1000x_txd_props *props);
f91005e1 MA	215
f91005e1 MA	216	#endif