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1/* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
2 *
3 * Copyright (C) 2008
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
6 *
7 * based on PalmOne's (TM) PDAs support (palm.c)
8 */
9
10/*
11 * PalmOne's (TM) PDAs.
12 *
13 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
fad6cb1a 25 * You should have received a copy of the GNU General Public License along
8167ee88 26 * with this program; if not, see <http://www.gnu.org/licenses/>.
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27 */
28#include "hw.h"
28ecbaee 29#include "ui/console.h"
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30#include "omap.h"
31#include "boards.h"
32#include "arm-misc.h"
33#include "flash.h"
2446333c 34#include "blockdev.h"
022c62cb 35#include "exec/address-spaces.h"
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36
37/*****************************************************************************/
38/* Siemens SX1 Cellphone V1 */
39/* - ARM OMAP310 processor
40 * - SRAM 192 kB
41 * - SDRAM 32 MB at 0x10000000
42 * - Boot flash 16 MB at 0x00000000
43 * - Application flash 8 MB at 0x04000000
44 * - 3 serial ports
45 * - 1 SecureDigital
46 * - 1 LCD display
47 * - 1 RTC
48 */
49
50/*****************************************************************************/
51/* Siemens SX1 Cellphone V2 */
52/* - ARM OMAP310 processor
53 * - SRAM 192 kB
54 * - SDRAM 32 MB at 0x10000000
55 * - Boot flash 32 MB at 0x00000000
56 * - 3 serial ports
57 * - 1 SecureDigital
58 * - 1 LCD display
59 * - 1 RTC
60 */
61
a8170e5e 62static uint64_t static_read(void *opaque, hwaddr offset,
ba158029 63 unsigned size)
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64{
65 uint32_t *val = (uint32_t *) opaque;
ba158029 66 uint32_t mask = (4 / size) - 1;
997641a8 67
ba158029 68 return *val >> ((offset & mask) << 3);
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69}
70
a8170e5e 71static void static_write(void *opaque, hwaddr offset,
ba158029 72 uint64_t value, unsigned size)
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73{
74#ifdef SPY
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75 printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
76 __func__, value, size, (int)offset);
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77#endif
78}
79
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80static const MemoryRegionOps static_ops = {
81 .read = static_read,
82 .write = static_write,
83 .endianness = DEVICE_NATIVE_ENDIAN,
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84};
85
86#define sdram_size 0x02000000
87#define sector_size (128 * 1024)
88#define flash0_size (16 * 1024 * 1024)
89#define flash1_size ( 8 * 1024 * 1024)
90#define flash2_size (32 * 1024 * 1024)
91#define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
92#define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
93
94static struct arm_boot_info sx1_binfo = {
95 .loader_start = OMAP_EMIFF_BASE,
96 .ram_size = sdram_size,
97 .board_id = 0x265,
98};
99
6952625d 100static void sx1_init(QEMUMachineInitArgs *args, const int version)
997641a8 101{
59b91996 102 struct omap_mpu_state_s *mpu;
4b3fedf3 103 MemoryRegion *address_space = get_system_memory();
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104 MemoryRegion *flash = g_new(MemoryRegion, 1);
105 MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
106 MemoryRegion *cs = g_new(MemoryRegion, 4);
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107 static uint32_t cs0val = 0x00213090;
108 static uint32_t cs1val = 0x00215070;
109 static uint32_t cs2val = 0x00001139;
110 static uint32_t cs3val = 0x00001139;
751c6a17 111 DriveInfo *dinfo;
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112 int fl_idx;
113 uint32_t flash_size = flash0_size;
01e0451a 114 int be;
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115
116 if (version == 2) {
117 flash_size = flash2_size;
118 }
119
6952625d 120 mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, args->cpu_model);
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121
122 /* External Flash (EMIFS) */
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123 memory_region_init_ram(flash, "omap_sx1.flash0-0", flash_size);
124 vmstate_register_ram_global(flash);
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125 memory_region_set_readonly(flash, true);
126 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
127
128 memory_region_init_io(&cs[0], &static_ops, &cs0val,
129 "sx1.cs0", OMAP_CS0_SIZE - flash_size);
130 memory_region_add_subregion(address_space,
131 OMAP_CS0_BASE + flash_size, &cs[0]);
132
133
134 memory_region_init_io(&cs[2], &static_ops, &cs2val,
135 "sx1.cs2", OMAP_CS2_SIZE);
136 memory_region_add_subregion(address_space,
137 OMAP_CS2_BASE, &cs[2]);
138
139 memory_region_init_io(&cs[3], &static_ops, &cs3val,
140 "sx1.cs3", OMAP_CS3_SIZE);
141 memory_region_add_subregion(address_space,
142 OMAP_CS2_BASE, &cs[3]);
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143
144 fl_idx = 0;
3d08ff69 145#ifdef TARGET_WORDS_BIGENDIAN
01e0451a 146 be = 1;
3d08ff69 147#else
01e0451a 148 be = 0;
3d08ff69 149#endif
997641a8 150
751c6a17 151 if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
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152 if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
153 "omap_sx1.flash0-1", flash_size,
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154 dinfo->bdrv, sector_size,
155 flash_size / sector_size,
01e0451a 156 4, 0, 0, 0, 0, be)) {
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157 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
158 fl_idx);
159 }
160 fl_idx++;
161 }
162
163 if ((version == 1) &&
751c6a17 164 (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
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165 memory_region_init_ram(flash_1, "omap_sx1.flash1-0", flash1_size);
166 vmstate_register_ram_global(flash_1);
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167 memory_region_set_readonly(flash_1, true);
168 memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
169
170 memory_region_init_io(&cs[1], &static_ops, &cs1val,
171 "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
172 memory_region_add_subregion(address_space,
173 OMAP_CS1_BASE + flash1_size, &cs[1]);
997641a8 174
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175 if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
176 "omap_sx1.flash1-1", flash1_size,
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177 dinfo->bdrv, sector_size,
178 flash1_size / sector_size,
01e0451a 179 4, 0, 0, 0, 0, be)) {
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180 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
181 fl_idx);
182 }
183 fl_idx++;
184 } else {
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185 memory_region_init_io(&cs[1], &static_ops, &cs1val,
186 "sx1.cs1", OMAP_CS1_SIZE);
187 memory_region_add_subregion(address_space,
188 OMAP_CS1_BASE, &cs[1]);
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189 }
190
6952625d 191 if (!args->kernel_filename && !fl_idx) {
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192 fprintf(stderr, "Kernel or Flash image must be specified\n");
193 exit(1);
194 }
195
196 /* Load the kernel. */
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197 if (args->kernel_filename) {
198 sx1_binfo.kernel_filename = args->kernel_filename;
199 sx1_binfo.kernel_cmdline = args->kernel_cmdline;
200 sx1_binfo.initrd_filename = args->initrd_filename;
3aaa8dfa 201 arm_load_kernel(mpu->cpu, &sx1_binfo);
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202 }
203
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204 /* TODO: fix next line */
205 //~ qemu_console_resize(ds, 640, 480);
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206}
207
5f072e1f 208static void sx1_init_v1(QEMUMachineInitArgs *args)
997641a8 209{
6952625d 210 sx1_init(args, 1);
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211}
212
5f072e1f 213static void sx1_init_v2(QEMUMachineInitArgs *args)
997641a8 214{
6952625d 215 sx1_init(args, 2);
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216}
217
f80f9ec9 218static QEMUMachine sx1_machine_v2 = {
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219 .name = "sx1",
220 .desc = "Siemens SX1 (OMAP310) V2",
221 .init = sx1_init_v2,
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222};
223
f80f9ec9 224static QEMUMachine sx1_machine_v1 = {
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225 .name = "sx1-v1",
226 .desc = "Siemens SX1 (OMAP310) V1",
227 .init = sx1_init_v1,
997641a8 228};
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229
230static void sx1_machine_init(void)
231{
232 qemu_register_machine(&sx1_machine_v2);
233 qemu_register_machine(&sx1_machine_v1);
234}
235
236machine_init(sx1_machine_init);