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Commit | Line | Data |
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80cabfad FB |
1 | /* |
2 | * QEMU PC System Emulator | |
5fafdf24 | 3 | * |
80cabfad | 4 | * Copyright (c) 2003-2004 Fabrice Bellard |
5fafdf24 | 5 | * |
80cabfad FB |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
87ecb68b PB |
24 | #include "hw.h" |
25 | #include "pc.h" | |
26 | #include "fdc.h" | |
27 | #include "pci.h" | |
28 | #include "block.h" | |
29 | #include "sysemu.h" | |
30 | #include "audio/audio.h" | |
31 | #include "net.h" | |
32 | #include "smbus.h" | |
33 | #include "boards.h" | |
cfa2af1f | 34 | #include "console.h" |
3cce6243 | 35 | #include "fw_cfg.h" |
80cabfad | 36 | |
b41a2cd1 FB |
37 | /* output Bochs bios info messages */ |
38 | //#define DEBUG_BIOS | |
39 | ||
80cabfad FB |
40 | #define BIOS_FILENAME "bios.bin" |
41 | #define VGABIOS_FILENAME "vgabios.bin" | |
de9258a8 | 42 | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
80cabfad | 43 | |
7fb4fdcf AZ |
44 | #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) |
45 | ||
a80274c3 PB |
46 | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */ |
47 | #define ACPI_DATA_SIZE 0x10000 | |
3cce6243 | 48 | #define BIOS_CFG_IOPORT 0x510 |
80cabfad | 49 | |
e4bcb14c TS |
50 | #define MAX_IDE_BUS 2 |
51 | ||
baca51fa | 52 | static fdctrl_t *floppy_controller; |
b0a21b53 | 53 | static RTCState *rtc_state; |
ec844b96 | 54 | static PITState *pit; |
d592d303 | 55 | static IOAPICState *ioapic; |
a5954d5c | 56 | static PCIDevice *i440fx_state; |
80cabfad | 57 | |
b41a2cd1 | 58 | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
80cabfad FB |
59 | { |
60 | } | |
61 | ||
f929aad6 | 62 | /* MSDOS compatibility mode FPU exception support */ |
d537cf6c | 63 | static qemu_irq ferr_irq; |
f929aad6 FB |
64 | /* XXX: add IGNNE support */ |
65 | void cpu_set_ferr(CPUX86State *s) | |
66 | { | |
d537cf6c | 67 | qemu_irq_raise(ferr_irq); |
f929aad6 FB |
68 | } |
69 | ||
70 | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) | |
71 | { | |
d537cf6c | 72 | qemu_irq_lower(ferr_irq); |
f929aad6 FB |
73 | } |
74 | ||
28ab0e2e | 75 | /* TSC handling */ |
28ab0e2e FB |
76 | uint64_t cpu_get_tsc(CPUX86State *env) |
77 | { | |
1dce7c3c FB |
78 | /* Note: when using kqemu, it is more logical to return the host TSC |
79 | because kqemu does not trap the RDTSC instruction for | |
80 | performance reasons */ | |
eb38c52c | 81 | #ifdef USE_KQEMU |
1dce7c3c FB |
82 | if (env->kqemu_enabled) { |
83 | return cpu_get_real_ticks(); | |
5fafdf24 | 84 | } else |
1dce7c3c FB |
85 | #endif |
86 | { | |
87 | return cpu_get_ticks(); | |
88 | } | |
28ab0e2e FB |
89 | } |
90 | ||
a5954d5c FB |
91 | /* SMM support */ |
92 | void cpu_smm_update(CPUState *env) | |
93 | { | |
94 | if (i440fx_state && env == first_cpu) | |
95 | i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1); | |
96 | } | |
97 | ||
98 | ||
3de388f6 FB |
99 | /* IRQ handling */ |
100 | int cpu_get_pic_interrupt(CPUState *env) | |
101 | { | |
102 | int intno; | |
103 | ||
3de388f6 FB |
104 | intno = apic_get_interrupt(env); |
105 | if (intno >= 0) { | |
106 | /* set irq request if a PIC irq is still pending */ | |
107 | /* XXX: improve that */ | |
5fafdf24 | 108 | pic_update_irq(isa_pic); |
3de388f6 FB |
109 | return intno; |
110 | } | |
3de388f6 | 111 | /* read the irq from the PIC */ |
0e21e12b TS |
112 | if (!apic_accept_pic_intr(env)) |
113 | return -1; | |
114 | ||
3de388f6 FB |
115 | intno = pic_read_irq(isa_pic); |
116 | return intno; | |
117 | } | |
118 | ||
d537cf6c | 119 | static void pic_irq_request(void *opaque, int irq, int level) |
3de388f6 | 120 | { |
a5b38b51 AJ |
121 | CPUState *env = first_cpu; |
122 | ||
d5529471 AJ |
123 | if (env->apic_state) { |
124 | while (env) { | |
125 | if (apic_accept_pic_intr(env)) | |
1a7de94a | 126 | apic_deliver_pic_intr(env, level); |
d5529471 AJ |
127 | env = env->next_cpu; |
128 | } | |
129 | } else { | |
b614106a AJ |
130 | if (level) |
131 | cpu_interrupt(env, CPU_INTERRUPT_HARD); | |
132 | else | |
133 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); | |
a5b38b51 | 134 | } |
3de388f6 FB |
135 | } |
136 | ||
b0a21b53 FB |
137 | /* PC cmos mappings */ |
138 | ||
80cabfad FB |
139 | #define REG_EQUIPMENT_BYTE 0x14 |
140 | ||
777428f2 FB |
141 | static int cmos_get_fd_drive_type(int fd0) |
142 | { | |
143 | int val; | |
144 | ||
145 | switch (fd0) { | |
146 | case 0: | |
147 | /* 1.44 Mb 3"5 drive */ | |
148 | val = 4; | |
149 | break; | |
150 | case 1: | |
151 | /* 2.88 Mb 3"5 drive */ | |
152 | val = 5; | |
153 | break; | |
154 | case 2: | |
155 | /* 1.2 Mb 5"5 drive */ | |
156 | val = 2; | |
157 | break; | |
158 | default: | |
159 | val = 0; | |
160 | break; | |
161 | } | |
162 | return val; | |
163 | } | |
164 | ||
5fafdf24 | 165 | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
ba6c2377 FB |
166 | { |
167 | RTCState *s = rtc_state; | |
168 | int cylinders, heads, sectors; | |
169 | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); | |
170 | rtc_set_memory(s, type_ofs, 47); | |
171 | rtc_set_memory(s, info_ofs, cylinders); | |
172 | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); | |
173 | rtc_set_memory(s, info_ofs + 2, heads); | |
174 | rtc_set_memory(s, info_ofs + 3, 0xff); | |
175 | rtc_set_memory(s, info_ofs + 4, 0xff); | |
176 | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); | |
177 | rtc_set_memory(s, info_ofs + 6, cylinders); | |
178 | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); | |
179 | rtc_set_memory(s, info_ofs + 8, sectors); | |
180 | } | |
181 | ||
6ac0e82d AZ |
182 | /* convert boot_device letter to something recognizable by the bios */ |
183 | static int boot_device2nibble(char boot_device) | |
184 | { | |
185 | switch(boot_device) { | |
186 | case 'a': | |
187 | case 'b': | |
188 | return 0x01; /* floppy boot */ | |
189 | case 'c': | |
190 | return 0x02; /* hard drive boot */ | |
191 | case 'd': | |
192 | return 0x03; /* CD-ROM boot */ | |
193 | case 'n': | |
194 | return 0x04; /* Network boot */ | |
195 | } | |
196 | return 0; | |
197 | } | |
198 | ||
0ecdffbb AJ |
199 | /* copy/pasted from cmos_init, should be made a general function |
200 | and used there as well */ | |
3b4366de | 201 | static int pc_boot_set(void *opaque, const char *boot_device) |
0ecdffbb AJ |
202 | { |
203 | #define PC_MAX_BOOT_DEVICES 3 | |
3b4366de | 204 | RTCState *s = (RTCState *)opaque; |
0ecdffbb AJ |
205 | int nbds, bds[3] = { 0, }; |
206 | int i; | |
207 | ||
208 | nbds = strlen(boot_device); | |
209 | if (nbds > PC_MAX_BOOT_DEVICES) { | |
210 | term_printf("Too many boot devices for PC\n"); | |
211 | return(1); | |
212 | } | |
213 | for (i = 0; i < nbds; i++) { | |
214 | bds[i] = boot_device2nibble(boot_device[i]); | |
215 | if (bds[i] == 0) { | |
216 | term_printf("Invalid boot device for PC: '%c'\n", | |
217 | boot_device[i]); | |
218 | return(1); | |
219 | } | |
220 | } | |
221 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); | |
222 | rtc_set_memory(s, 0x38, (bds[2] << 4)); | |
223 | return(0); | |
224 | } | |
225 | ||
ba6c2377 | 226 | /* hd_table must contain 4 block drivers */ |
00f82b8a AJ |
227 | static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
228 | const char *boot_device, BlockDriverState **hd_table) | |
80cabfad | 229 | { |
b0a21b53 | 230 | RTCState *s = rtc_state; |
28c5af54 | 231 | int nbds, bds[3] = { 0, }; |
80cabfad | 232 | int val; |
b41a2cd1 | 233 | int fd0, fd1, nb; |
ba6c2377 | 234 | int i; |
b0a21b53 | 235 | |
b0a21b53 | 236 | /* various important CMOS locations needed by PC/Bochs bios */ |
80cabfad FB |
237 | |
238 | /* memory size */ | |
333190eb FB |
239 | val = 640; /* base memory in K */ |
240 | rtc_set_memory(s, 0x15, val); | |
241 | rtc_set_memory(s, 0x16, val >> 8); | |
242 | ||
80cabfad FB |
243 | val = (ram_size / 1024) - 1024; |
244 | if (val > 65535) | |
245 | val = 65535; | |
b0a21b53 FB |
246 | rtc_set_memory(s, 0x17, val); |
247 | rtc_set_memory(s, 0x18, val >> 8); | |
248 | rtc_set_memory(s, 0x30, val); | |
249 | rtc_set_memory(s, 0x31, val >> 8); | |
80cabfad | 250 | |
00f82b8a AJ |
251 | if (above_4g_mem_size) { |
252 | rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); | |
253 | rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); | |
254 | rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); | |
255 | } | |
256 | ||
9da98861 FB |
257 | if (ram_size > (16 * 1024 * 1024)) |
258 | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); | |
259 | else | |
260 | val = 0; | |
80cabfad FB |
261 | if (val > 65535) |
262 | val = 65535; | |
b0a21b53 FB |
263 | rtc_set_memory(s, 0x34, val); |
264 | rtc_set_memory(s, 0x35, val >> 8); | |
3b46e624 | 265 | |
298e01b6 AJ |
266 | /* set the number of CPU */ |
267 | rtc_set_memory(s, 0x5f, smp_cpus - 1); | |
268 | ||
6ac0e82d | 269 | /* set boot devices, and disable floppy signature check if requested */ |
28c5af54 JM |
270 | #define PC_MAX_BOOT_DEVICES 3 |
271 | nbds = strlen(boot_device); | |
272 | if (nbds > PC_MAX_BOOT_DEVICES) { | |
273 | fprintf(stderr, "Too many boot devices for PC\n"); | |
274 | exit(1); | |
275 | } | |
276 | for (i = 0; i < nbds; i++) { | |
277 | bds[i] = boot_device2nibble(boot_device[i]); | |
278 | if (bds[i] == 0) { | |
279 | fprintf(stderr, "Invalid boot device for PC: '%c'\n", | |
280 | boot_device[i]); | |
281 | exit(1); | |
282 | } | |
283 | } | |
284 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); | |
285 | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); | |
80cabfad | 286 | |
b41a2cd1 FB |
287 | /* floppy type */ |
288 | ||
baca51fa FB |
289 | fd0 = fdctrl_get_drive_type(floppy_controller, 0); |
290 | fd1 = fdctrl_get_drive_type(floppy_controller, 1); | |
80cabfad | 291 | |
777428f2 | 292 | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1); |
b0a21b53 | 293 | rtc_set_memory(s, 0x10, val); |
3b46e624 | 294 | |
b0a21b53 | 295 | val = 0; |
b41a2cd1 | 296 | nb = 0; |
80cabfad FB |
297 | if (fd0 < 3) |
298 | nb++; | |
299 | if (fd1 < 3) | |
300 | nb++; | |
301 | switch (nb) { | |
302 | case 0: | |
303 | break; | |
304 | case 1: | |
b0a21b53 | 305 | val |= 0x01; /* 1 drive, ready for boot */ |
80cabfad FB |
306 | break; |
307 | case 2: | |
b0a21b53 | 308 | val |= 0x41; /* 2 drives, ready for boot */ |
80cabfad FB |
309 | break; |
310 | } | |
b0a21b53 FB |
311 | val |= 0x02; /* FPU is there */ |
312 | val |= 0x04; /* PS/2 mouse installed */ | |
313 | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); | |
314 | ||
ba6c2377 FB |
315 | /* hard drives */ |
316 | ||
317 | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); | |
318 | if (hd_table[0]) | |
319 | cmos_init_hd(0x19, 0x1b, hd_table[0]); | |
5fafdf24 | 320 | if (hd_table[1]) |
ba6c2377 FB |
321 | cmos_init_hd(0x1a, 0x24, hd_table[1]); |
322 | ||
323 | val = 0; | |
40b6ecc6 | 324 | for (i = 0; i < 4; i++) { |
ba6c2377 | 325 | if (hd_table[i]) { |
46d4767d FB |
326 | int cylinders, heads, sectors, translation; |
327 | /* NOTE: bdrv_get_geometry_hint() returns the physical | |
328 | geometry. It is always such that: 1 <= sects <= 63, 1 | |
329 | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS | |
330 | geometry can be different if a translation is done. */ | |
331 | translation = bdrv_get_translation_hint(hd_table[i]); | |
332 | if (translation == BIOS_ATA_TRANSLATION_AUTO) { | |
333 | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); | |
334 | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { | |
335 | /* No translation. */ | |
336 | translation = 0; | |
337 | } else { | |
338 | /* LBA translation. */ | |
339 | translation = 1; | |
340 | } | |
40b6ecc6 | 341 | } else { |
46d4767d | 342 | translation--; |
ba6c2377 | 343 | } |
ba6c2377 FB |
344 | val |= translation << (i * 2); |
345 | } | |
40b6ecc6 | 346 | } |
ba6c2377 | 347 | rtc_set_memory(s, 0x39, val); |
80cabfad FB |
348 | } |
349 | ||
59b8ad81 FB |
350 | void ioport_set_a20(int enable) |
351 | { | |
352 | /* XXX: send to all CPUs ? */ | |
353 | cpu_x86_set_a20(first_cpu, enable); | |
354 | } | |
355 | ||
356 | int ioport_get_a20(void) | |
357 | { | |
358 | return ((first_cpu->a20_mask >> 20) & 1); | |
359 | } | |
360 | ||
e1a23744 FB |
361 | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
362 | { | |
59b8ad81 | 363 | ioport_set_a20((val >> 1) & 1); |
e1a23744 FB |
364 | /* XXX: bit 0 is fast reset */ |
365 | } | |
366 | ||
367 | static uint32_t ioport92_read(void *opaque, uint32_t addr) | |
368 | { | |
59b8ad81 | 369 | return ioport_get_a20() << 1; |
e1a23744 FB |
370 | } |
371 | ||
80cabfad FB |
372 | /***********************************************************/ |
373 | /* Bochs BIOS debug ports */ | |
374 | ||
9596ebb7 | 375 | static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
80cabfad | 376 | { |
a2f659ee FB |
377 | static const char shutdown_str[8] = "Shutdown"; |
378 | static int shutdown_index = 0; | |
3b46e624 | 379 | |
80cabfad FB |
380 | switch(addr) { |
381 | /* Bochs BIOS messages */ | |
382 | case 0x400: | |
383 | case 0x401: | |
384 | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val); | |
385 | exit(1); | |
386 | case 0x402: | |
387 | case 0x403: | |
388 | #ifdef DEBUG_BIOS | |
389 | fprintf(stderr, "%c", val); | |
390 | #endif | |
391 | break; | |
a2f659ee FB |
392 | case 0x8900: |
393 | /* same as Bochs power off */ | |
394 | if (val == shutdown_str[shutdown_index]) { | |
395 | shutdown_index++; | |
396 | if (shutdown_index == 8) { | |
397 | shutdown_index = 0; | |
398 | qemu_system_shutdown_request(); | |
399 | } | |
400 | } else { | |
401 | shutdown_index = 0; | |
402 | } | |
403 | break; | |
80cabfad FB |
404 | |
405 | /* LGPL'ed VGA BIOS messages */ | |
406 | case 0x501: | |
407 | case 0x502: | |
408 | fprintf(stderr, "VGA BIOS panic, line %d\n", val); | |
409 | exit(1); | |
410 | case 0x500: | |
411 | case 0x503: | |
412 | #ifdef DEBUG_BIOS | |
413 | fprintf(stderr, "%c", val); | |
414 | #endif | |
415 | break; | |
416 | } | |
417 | } | |
418 | ||
9596ebb7 | 419 | static void bochs_bios_init(void) |
80cabfad | 420 | { |
3cce6243 BS |
421 | void *fw_cfg; |
422 | ||
b41a2cd1 FB |
423 | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
424 | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); | |
425 | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); | |
426 | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); | |
a2f659ee | 427 | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
b41a2cd1 FB |
428 | |
429 | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); | |
430 | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); | |
431 | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); | |
432 | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); | |
3cce6243 BS |
433 | |
434 | fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0); | |
435 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1); | |
80cabfad FB |
436 | } |
437 | ||
642a4f96 TS |
438 | /* Generate an initial boot sector which sets state and jump to |
439 | a specified vector */ | |
3f6c925f | 440 | static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
642a4f96 TS |
441 | { |
442 | uint8_t bootsect[512], *p; | |
443 | int i; | |
e4bcb14c | 444 | int hda; |
642a4f96 | 445 | |
e4bcb14c TS |
446 | hda = drive_get_index(IF_IDE, 0, 0); |
447 | if (hda == -1) { | |
642a4f96 | 448 | fprintf(stderr, "A disk image must be given for 'hda' when booting " |
f97572e5 | 449 | "a Linux kernel\n(if you really don't want it, use /dev/zero)\n"); |
642a4f96 TS |
450 | exit(1); |
451 | } | |
452 | ||
453 | memset(bootsect, 0, sizeof(bootsect)); | |
454 | ||
455 | /* Copy the MSDOS partition table if possible */ | |
e4bcb14c | 456 | bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1); |
642a4f96 TS |
457 | |
458 | /* Make sure we have a partition signature */ | |
459 | bootsect[510] = 0x55; | |
460 | bootsect[511] = 0xaa; | |
461 | ||
462 | /* Actual code */ | |
463 | p = bootsect; | |
464 | *p++ = 0xfa; /* CLI */ | |
465 | *p++ = 0xfc; /* CLD */ | |
466 | ||
467 | for (i = 0; i < 6; i++) { | |
468 | if (i == 1) /* Skip CS */ | |
469 | continue; | |
470 | ||
471 | *p++ = 0xb8; /* MOV AX,imm16 */ | |
472 | *p++ = segs[i]; | |
473 | *p++ = segs[i] >> 8; | |
474 | *p++ = 0x8e; /* MOV <seg>,AX */ | |
475 | *p++ = 0xc0 + (i << 3); | |
476 | } | |
477 | ||
478 | for (i = 0; i < 8; i++) { | |
479 | *p++ = 0x66; /* 32-bit operand size */ | |
480 | *p++ = 0xb8 + i; /* MOV <reg>,imm32 */ | |
481 | *p++ = gpr[i]; | |
482 | *p++ = gpr[i] >> 8; | |
483 | *p++ = gpr[i] >> 16; | |
484 | *p++ = gpr[i] >> 24; | |
485 | } | |
486 | ||
487 | *p++ = 0xea; /* JMP FAR */ | |
488 | *p++ = ip; /* IP */ | |
489 | *p++ = ip >> 8; | |
490 | *p++ = segs[1]; /* CS */ | |
491 | *p++ = segs[1] >> 8; | |
492 | ||
e4bcb14c | 493 | bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect)); |
642a4f96 | 494 | } |
80cabfad | 495 | |
642a4f96 TS |
496 | static long get_file_size(FILE *f) |
497 | { | |
498 | long where, size; | |
499 | ||
500 | /* XXX: on Unix systems, using fstat() probably makes more sense */ | |
501 | ||
502 | where = ftell(f); | |
503 | fseek(f, 0, SEEK_END); | |
504 | size = ftell(f); | |
505 | fseek(f, where, SEEK_SET); | |
506 | ||
507 | return size; | |
508 | } | |
509 | ||
510 | static void load_linux(const char *kernel_filename, | |
511 | const char *initrd_filename, | |
512 | const char *kernel_cmdline) | |
513 | { | |
514 | uint16_t protocol; | |
515 | uint32_t gpr[8]; | |
516 | uint16_t seg[6]; | |
517 | uint16_t real_seg; | |
518 | int setup_size, kernel_size, initrd_size, cmdline_size; | |
519 | uint32_t initrd_max; | |
520 | uint8_t header[1024]; | |
a37af289 | 521 | target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr; |
642a4f96 TS |
522 | FILE *f, *fi; |
523 | ||
524 | /* Align to 16 bytes as a paranoia measure */ | |
525 | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; | |
526 | ||
527 | /* load the kernel header */ | |
528 | f = fopen(kernel_filename, "rb"); | |
529 | if (!f || !(kernel_size = get_file_size(f)) || | |
530 | fread(header, 1, 1024, f) != 1024) { | |
531 | fprintf(stderr, "qemu: could not load kernel '%s'\n", | |
532 | kernel_filename); | |
533 | exit(1); | |
534 | } | |
535 | ||
536 | /* kernel protocol version */ | |
bc4edd79 | 537 | #if 0 |
642a4f96 | 538 | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202)); |
bc4edd79 | 539 | #endif |
642a4f96 TS |
540 | if (ldl_p(header+0x202) == 0x53726448) |
541 | protocol = lduw_p(header+0x206); | |
542 | else | |
543 | protocol = 0; | |
544 | ||
545 | if (protocol < 0x200 || !(header[0x211] & 0x01)) { | |
546 | /* Low kernel */ | |
a37af289 BS |
547 | real_addr = 0x90000; |
548 | cmdline_addr = 0x9a000 - cmdline_size; | |
549 | prot_addr = 0x10000; | |
642a4f96 TS |
550 | } else if (protocol < 0x202) { |
551 | /* High but ancient kernel */ | |
a37af289 BS |
552 | real_addr = 0x90000; |
553 | cmdline_addr = 0x9a000 - cmdline_size; | |
554 | prot_addr = 0x100000; | |
642a4f96 TS |
555 | } else { |
556 | /* High and recent kernel */ | |
a37af289 BS |
557 | real_addr = 0x10000; |
558 | cmdline_addr = 0x20000; | |
559 | prot_addr = 0x100000; | |
642a4f96 TS |
560 | } |
561 | ||
bc4edd79 | 562 | #if 0 |
642a4f96 | 563 | fprintf(stderr, |
526ccb7a AZ |
564 | "qemu: real_addr = 0x" TARGET_FMT_plx "\n" |
565 | "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n" | |
566 | "qemu: prot_addr = 0x" TARGET_FMT_plx "\n", | |
a37af289 BS |
567 | real_addr, |
568 | cmdline_addr, | |
569 | prot_addr); | |
bc4edd79 | 570 | #endif |
642a4f96 TS |
571 | |
572 | /* highest address for loading the initrd */ | |
573 | if (protocol >= 0x203) | |
574 | initrd_max = ldl_p(header+0x22c); | |
575 | else | |
576 | initrd_max = 0x37ffffff; | |
577 | ||
578 | if (initrd_max >= ram_size-ACPI_DATA_SIZE) | |
579 | initrd_max = ram_size-ACPI_DATA_SIZE-1; | |
580 | ||
581 | /* kernel command line */ | |
a37af289 | 582 | pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline); |
642a4f96 TS |
583 | |
584 | if (protocol >= 0x202) { | |
a37af289 | 585 | stl_p(header+0x228, cmdline_addr); |
642a4f96 TS |
586 | } else { |
587 | stw_p(header+0x20, 0xA33F); | |
588 | stw_p(header+0x22, cmdline_addr-real_addr); | |
589 | } | |
590 | ||
591 | /* loader type */ | |
592 | /* High nybble = B reserved for Qemu; low nybble is revision number. | |
593 | If this code is substantially changed, you may want to consider | |
594 | incrementing the revision. */ | |
595 | if (protocol >= 0x200) | |
596 | header[0x210] = 0xB0; | |
597 | ||
598 | /* heap */ | |
599 | if (protocol >= 0x201) { | |
600 | header[0x211] |= 0x80; /* CAN_USE_HEAP */ | |
601 | stw_p(header+0x224, cmdline_addr-real_addr-0x200); | |
602 | } | |
603 | ||
604 | /* load initrd */ | |
605 | if (initrd_filename) { | |
606 | if (protocol < 0x200) { | |
607 | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n"); | |
608 | exit(1); | |
609 | } | |
610 | ||
611 | fi = fopen(initrd_filename, "rb"); | |
612 | if (!fi) { | |
613 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", | |
614 | initrd_filename); | |
615 | exit(1); | |
616 | } | |
617 | ||
618 | initrd_size = get_file_size(fi); | |
a37af289 | 619 | initrd_addr = (initrd_max-initrd_size) & ~4095; |
642a4f96 | 620 | |
526ccb7a AZ |
621 | fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx |
622 | "\n", initrd_size, initrd_addr); | |
642a4f96 | 623 | |
a37af289 | 624 | if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) { |
642a4f96 TS |
625 | fprintf(stderr, "qemu: read error on initial ram disk '%s'\n", |
626 | initrd_filename); | |
627 | exit(1); | |
628 | } | |
629 | fclose(fi); | |
630 | ||
a37af289 | 631 | stl_p(header+0x218, initrd_addr); |
642a4f96 TS |
632 | stl_p(header+0x21c, initrd_size); |
633 | } | |
634 | ||
635 | /* store the finalized header and load the rest of the kernel */ | |
a37af289 | 636 | cpu_physical_memory_write(real_addr, header, 1024); |
642a4f96 TS |
637 | |
638 | setup_size = header[0x1f1]; | |
639 | if (setup_size == 0) | |
640 | setup_size = 4; | |
641 | ||
642 | setup_size = (setup_size+1)*512; | |
643 | kernel_size -= setup_size; /* Size of protected-mode code */ | |
644 | ||
a37af289 BS |
645 | if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) || |
646 | !fread_targphys_ok(prot_addr, kernel_size, f)) { | |
642a4f96 TS |
647 | fprintf(stderr, "qemu: read error on kernel '%s'\n", |
648 | kernel_filename); | |
649 | exit(1); | |
650 | } | |
651 | fclose(f); | |
652 | ||
653 | /* generate bootsector to set up the initial register state */ | |
a37af289 | 654 | real_seg = real_addr >> 4; |
642a4f96 TS |
655 | seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
656 | seg[1] = real_seg+0x20; /* CS */ | |
657 | memset(gpr, 0, sizeof gpr); | |
658 | gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ | |
659 | ||
660 | generate_bootsect(gpr, seg, 0); | |
661 | } | |
662 | ||
59b8ad81 FB |
663 | static void main_cpu_reset(void *opaque) |
664 | { | |
665 | CPUState *env = opaque; | |
666 | cpu_reset(env); | |
667 | } | |
668 | ||
b41a2cd1 FB |
669 | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
670 | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; | |
671 | static const int ide_irq[2] = { 14, 15 }; | |
672 | ||
673 | #define NE2000_NB_MAX 6 | |
674 | ||
8d11df9e | 675 | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
b41a2cd1 FB |
676 | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
677 | ||
8d11df9e FB |
678 | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
679 | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; | |
680 | ||
6508fe59 FB |
681 | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
682 | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; | |
683 | ||
6a36d84e | 684 | #ifdef HAS_AUDIO |
d537cf6c | 685 | static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
6a36d84e FB |
686 | { |
687 | struct soundhw *c; | |
688 | int audio_enabled = 0; | |
689 | ||
690 | for (c = soundhw; !audio_enabled && c->name; ++c) { | |
691 | audio_enabled = c->enabled; | |
692 | } | |
693 | ||
694 | if (audio_enabled) { | |
695 | AudioState *s; | |
696 | ||
697 | s = AUD_init (); | |
698 | if (s) { | |
699 | for (c = soundhw; c->name; ++c) { | |
700 | if (c->enabled) { | |
701 | if (c->isa) { | |
d537cf6c | 702 | c->init.init_isa (s, pic); |
6a36d84e FB |
703 | } |
704 | else { | |
705 | if (pci_bus) { | |
706 | c->init.init_pci (pci_bus, s); | |
707 | } | |
708 | } | |
709 | } | |
710 | } | |
711 | } | |
712 | } | |
713 | } | |
714 | #endif | |
715 | ||
d537cf6c | 716 | static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
a41b2ff2 PB |
717 | { |
718 | static int nb_ne2k = 0; | |
719 | ||
720 | if (nb_ne2k == NE2000_NB_MAX) | |
721 | return; | |
d537cf6c | 722 | isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
a41b2ff2 PB |
723 | nb_ne2k++; |
724 | } | |
725 | ||
80cabfad | 726 | /* PC hardware initialisation */ |
00f82b8a | 727 | static void pc_init1(ram_addr_t ram_size, int vga_ram_size, |
b881c2c6 | 728 | const char *boot_device, DisplayState *ds, |
b5ff2d6e | 729 | const char *kernel_filename, const char *kernel_cmdline, |
3dbbdc25 | 730 | const char *initrd_filename, |
a049de61 | 731 | int pci_enabled, const char *cpu_model) |
80cabfad FB |
732 | { |
733 | char buf[1024]; | |
642a4f96 | 734 | int ret, linux_boot, i; |
970ac5a3 | 735 | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
00f82b8a | 736 | ram_addr_t below_4g_mem_size, above_4g_mem_size = 0; |
970ac5a3 | 737 | int bios_size, isa_bios_size, vga_bios_size; |
46e50e9d | 738 | PCIBus *pci_bus; |
5c3ff3a7 | 739 | int piix3_devfn = -1; |
59b8ad81 | 740 | CPUState *env; |
a41b2ff2 | 741 | NICInfo *nd; |
d537cf6c PB |
742 | qemu_irq *cpu_irq; |
743 | qemu_irq *i8259; | |
e4bcb14c TS |
744 | int index; |
745 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; | |
746 | BlockDriverState *fd[MAX_FD]; | |
d592d303 | 747 | |
00f82b8a AJ |
748 | if (ram_size >= 0xe0000000 ) { |
749 | above_4g_mem_size = ram_size - 0xe0000000; | |
750 | below_4g_mem_size = 0xe0000000; | |
751 | } else { | |
752 | below_4g_mem_size = ram_size; | |
753 | } | |
754 | ||
80cabfad FB |
755 | linux_boot = (kernel_filename != NULL); |
756 | ||
59b8ad81 | 757 | /* init CPUs */ |
a049de61 FB |
758 | if (cpu_model == NULL) { |
759 | #ifdef TARGET_X86_64 | |
760 | cpu_model = "qemu64"; | |
761 | #else | |
762 | cpu_model = "qemu32"; | |
763 | #endif | |
764 | } | |
765 | ||
59b8ad81 | 766 | for(i = 0; i < smp_cpus; i++) { |
aaed909a FB |
767 | env = cpu_init(cpu_model); |
768 | if (!env) { | |
769 | fprintf(stderr, "Unable to find x86 CPU definition\n"); | |
770 | exit(1); | |
771 | } | |
59b8ad81 | 772 | if (i != 0) |
ce5232c5 | 773 | env->halted = 1; |
59b8ad81 FB |
774 | if (smp_cpus > 1) { |
775 | /* XXX: enable it in all cases */ | |
776 | env->cpuid_features |= CPUID_APIC; | |
777 | } | |
59b8ad81 FB |
778 | qemu_register_reset(main_cpu_reset, env); |
779 | if (pci_enabled) { | |
780 | apic_init(env); | |
781 | } | |
782 | } | |
783 | ||
26fb5e48 AJ |
784 | vmport_init(); |
785 | ||
80cabfad | 786 | /* allocate RAM */ |
82b36dc3 AL |
787 | ram_addr = qemu_ram_alloc(0xa0000); |
788 | cpu_register_physical_memory(0, 0xa0000, ram_addr); | |
789 | ||
790 | /* Allocate, even though we won't register, so we don't break the | |
791 | * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000), | |
792 | * and some bios areas, which will be registered later | |
793 | */ | |
794 | ram_addr = qemu_ram_alloc(0x100000 - 0xa0000); | |
795 | ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000); | |
796 | cpu_register_physical_memory(0x100000, | |
797 | below_4g_mem_size - 0x100000, | |
798 | ram_addr); | |
00f82b8a AJ |
799 | |
800 | /* above 4giga memory allocation */ | |
801 | if (above_4g_mem_size > 0) { | |
82b36dc3 AL |
802 | ram_addr = qemu_ram_alloc(above_4g_mem_size); |
803 | cpu_register_physical_memory(0x100000000ULL, | |
526ccb7a | 804 | above_4g_mem_size, |
82b36dc3 | 805 | ram_addr); |
00f82b8a | 806 | } |
80cabfad | 807 | |
82b36dc3 | 808 | |
970ac5a3 FB |
809 | /* allocate VGA RAM */ |
810 | vga_ram_addr = qemu_ram_alloc(vga_ram_size); | |
7587cf44 | 811 | |
970ac5a3 | 812 | /* BIOS load */ |
1192dad8 JM |
813 | if (bios_name == NULL) |
814 | bios_name = BIOS_FILENAME; | |
815 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); | |
7587cf44 | 816 | bios_size = get_image_size(buf); |
5fafdf24 | 817 | if (bios_size <= 0 || |
970ac5a3 | 818 | (bios_size % 65536) != 0) { |
7587cf44 FB |
819 | goto bios_error; |
820 | } | |
970ac5a3 | 821 | bios_offset = qemu_ram_alloc(bios_size); |
7587cf44 FB |
822 | ret = load_image(buf, phys_ram_base + bios_offset); |
823 | if (ret != bios_size) { | |
824 | bios_error: | |
970ac5a3 | 825 | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf); |
80cabfad FB |
826 | exit(1); |
827 | } | |
7587cf44 | 828 | |
80cabfad | 829 | /* VGA BIOS load */ |
de9258a8 FB |
830 | if (cirrus_vga_enabled) { |
831 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); | |
832 | } else { | |
833 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); | |
834 | } | |
970ac5a3 | 835 | vga_bios_size = get_image_size(buf); |
5fafdf24 | 836 | if (vga_bios_size <= 0 || vga_bios_size > 65536) |
970ac5a3 FB |
837 | goto vga_bios_error; |
838 | vga_bios_offset = qemu_ram_alloc(65536); | |
839 | ||
7587cf44 | 840 | ret = load_image(buf, phys_ram_base + vga_bios_offset); |
970ac5a3 FB |
841 | if (ret != vga_bios_size) { |
842 | vga_bios_error: | |
843 | fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf); | |
844 | exit(1); | |
845 | } | |
846 | ||
80cabfad | 847 | /* setup basic memory access */ |
5fafdf24 | 848 | cpu_register_physical_memory(0xc0000, 0x10000, |
7587cf44 FB |
849 | vga_bios_offset | IO_MEM_ROM); |
850 | ||
851 | /* map the last 128KB of the BIOS in ISA space */ | |
852 | isa_bios_size = bios_size; | |
853 | if (isa_bios_size > (128 * 1024)) | |
854 | isa_bios_size = 128 * 1024; | |
5fafdf24 | 855 | cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
7587cf44 | 856 | IO_MEM_UNASSIGNED); |
5fafdf24 TS |
857 | cpu_register_physical_memory(0x100000 - isa_bios_size, |
858 | isa_bios_size, | |
7587cf44 | 859 | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
9ae02555 | 860 | |
970ac5a3 FB |
861 | { |
862 | ram_addr_t option_rom_offset; | |
863 | int size, offset; | |
864 | ||
865 | offset = 0; | |
866 | for (i = 0; i < nb_option_roms; i++) { | |
867 | size = get_image_size(option_rom[i]); | |
868 | if (size < 0) { | |
5fafdf24 | 869 | fprintf(stderr, "Could not load option rom '%s'\n", |
970ac5a3 FB |
870 | option_rom[i]); |
871 | exit(1); | |
872 | } | |
873 | if (size > (0x10000 - offset)) | |
874 | goto option_rom_error; | |
875 | option_rom_offset = qemu_ram_alloc(size); | |
876 | ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); | |
877 | if (ret != size) { | |
878 | option_rom_error: | |
879 | fprintf(stderr, "Too many option ROMS\n"); | |
880 | exit(1); | |
881 | } | |
882 | size = (size + 4095) & ~4095; | |
883 | cpu_register_physical_memory(0xd0000 + offset, | |
884 | size, option_rom_offset | IO_MEM_ROM); | |
885 | offset += size; | |
886 | } | |
9ae02555 TS |
887 | } |
888 | ||
7587cf44 | 889 | /* map all the bios at the top of memory */ |
5fafdf24 | 890 | cpu_register_physical_memory((uint32_t)(-bios_size), |
7587cf44 | 891 | bios_size, bios_offset | IO_MEM_ROM); |
3b46e624 | 892 | |
80cabfad FB |
893 | bochs_bios_init(); |
894 | ||
642a4f96 TS |
895 | if (linux_boot) |
896 | load_linux(kernel_filename, initrd_filename, kernel_cmdline); | |
80cabfad | 897 | |
a5b38b51 | 898 | cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1); |
d537cf6c PB |
899 | i8259 = i8259_init(cpu_irq[0]); |
900 | ferr_irq = i8259[13]; | |
901 | ||
69b91039 | 902 | if (pci_enabled) { |
d537cf6c | 903 | pci_bus = i440fx_init(&i440fx_state, i8259); |
8f1c91d8 | 904 | piix3_devfn = piix3_init(pci_bus, -1); |
46e50e9d FB |
905 | } else { |
906 | pci_bus = NULL; | |
69b91039 FB |
907 | } |
908 | ||
80cabfad | 909 | /* init basic PC hardware */ |
b41a2cd1 | 910 | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
80cabfad | 911 | |
f929aad6 FB |
912 | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
913 | ||
1f04275e FB |
914 | if (cirrus_vga_enabled) { |
915 | if (pci_enabled) { | |
5fafdf24 TS |
916 | pci_cirrus_vga_init(pci_bus, |
917 | ds, phys_ram_base + vga_ram_addr, | |
970ac5a3 | 918 | vga_ram_addr, vga_ram_size); |
1f04275e | 919 | } else { |
5fafdf24 | 920 | isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
970ac5a3 | 921 | vga_ram_addr, vga_ram_size); |
1f04275e | 922 | } |
d34cab9f TS |
923 | } else if (vmsvga_enabled) { |
924 | if (pci_enabled) | |
45e4522e AZ |
925 | pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
926 | vga_ram_addr, vga_ram_size); | |
d34cab9f TS |
927 | else |
928 | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__); | |
1f04275e | 929 | } else { |
89b6b508 | 930 | if (pci_enabled) { |
5fafdf24 | 931 | pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
970ac5a3 | 932 | vga_ram_addr, vga_ram_size, 0, 0); |
89b6b508 | 933 | } else { |
5fafdf24 | 934 | isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
970ac5a3 | 935 | vga_ram_addr, vga_ram_size); |
89b6b508 | 936 | } |
1f04275e | 937 | } |
80cabfad | 938 | |
d537cf6c | 939 | rtc_state = rtc_init(0x70, i8259[8]); |
80cabfad | 940 | |
3b4366de BS |
941 | qemu_register_boot_set(pc_boot_set, rtc_state); |
942 | ||
e1a23744 FB |
943 | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
944 | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); | |
945 | ||
d592d303 | 946 | if (pci_enabled) { |
d592d303 FB |
947 | ioapic = ioapic_init(); |
948 | } | |
d537cf6c | 949 | pit = pit_init(0x40, i8259[0]); |
fd06c375 | 950 | pcspk_init(pit); |
d592d303 FB |
951 | if (pci_enabled) { |
952 | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); | |
953 | } | |
b41a2cd1 | 954 | |
8d11df9e FB |
955 | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
956 | if (serial_hds[i]) { | |
b6cd0ea1 AJ |
957 | serial_init(serial_io[i], i8259[serial_irq[i]], 115200, |
958 | serial_hds[i]); | |
8d11df9e FB |
959 | } |
960 | } | |
b41a2cd1 | 961 | |
6508fe59 FB |
962 | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
963 | if (parallel_hds[i]) { | |
d537cf6c PB |
964 | parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
965 | parallel_hds[i]); | |
6508fe59 FB |
966 | } |
967 | } | |
968 | ||
a41b2ff2 PB |
969 | for(i = 0; i < nb_nics; i++) { |
970 | nd = &nd_table[i]; | |
971 | if (!nd->model) { | |
972 | if (pci_enabled) { | |
973 | nd->model = "ne2k_pci"; | |
974 | } else { | |
975 | nd->model = "ne2k_isa"; | |
976 | } | |
69b91039 | 977 | } |
a41b2ff2 | 978 | if (strcmp(nd->model, "ne2k_isa") == 0) { |
d537cf6c | 979 | pc_init_ne2k_isa(nd, i8259); |
a41b2ff2 | 980 | } else if (pci_enabled) { |
c4a7060c BS |
981 | if (strcmp(nd->model, "?") == 0) |
982 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n"); | |
abcebc7e | 983 | pci_nic_init(pci_bus, nd, -1); |
c4a7060c BS |
984 | } else if (strcmp(nd->model, "?") == 0) { |
985 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n"); | |
986 | exit(1); | |
a41b2ff2 PB |
987 | } else { |
988 | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model); | |
989 | exit(1); | |
69b91039 | 990 | } |
a41b2ff2 | 991 | } |
b41a2cd1 | 992 | |
e4bcb14c TS |
993 | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { |
994 | fprintf(stderr, "qemu: too many IDE bus\n"); | |
995 | exit(1); | |
996 | } | |
997 | ||
998 | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { | |
999 | index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); | |
1000 | if (index != -1) | |
1001 | hd[i] = drives_table[index].bdrv; | |
1002 | else | |
1003 | hd[i] = NULL; | |
1004 | } | |
1005 | ||
a41b2ff2 | 1006 | if (pci_enabled) { |
e4bcb14c | 1007 | pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259); |
a41b2ff2 | 1008 | } else { |
e4bcb14c | 1009 | for(i = 0; i < MAX_IDE_BUS; i++) { |
d537cf6c | 1010 | isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
e4bcb14c | 1011 | hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); |
69b91039 | 1012 | } |
b41a2cd1 | 1013 | } |
69b91039 | 1014 | |
d537cf6c | 1015 | i8042_init(i8259[1], i8259[12], 0x60); |
7c29d0c0 | 1016 | DMA_init(0); |
6a36d84e | 1017 | #ifdef HAS_AUDIO |
d537cf6c | 1018 | audio_init(pci_enabled ? pci_bus : NULL, i8259); |
fb065187 | 1019 | #endif |
80cabfad | 1020 | |
e4bcb14c TS |
1021 | for(i = 0; i < MAX_FD; i++) { |
1022 | index = drive_get_index(IF_FLOPPY, 0, i); | |
1023 | if (index != -1) | |
1024 | fd[i] = drives_table[index].bdrv; | |
1025 | else | |
1026 | fd[i] = NULL; | |
1027 | } | |
1028 | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); | |
b41a2cd1 | 1029 | |
00f82b8a | 1030 | cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd); |
69b91039 | 1031 | |
bb36d470 | 1032 | if (pci_enabled && usb_enabled) { |
afcc3cdf | 1033 | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2); |
bb36d470 FB |
1034 | } |
1035 | ||
6515b203 | 1036 | if (pci_enabled && acpi_enabled) { |
3fffc223 | 1037 | uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
0ff596d0 PB |
1038 | i2c_bus *smbus; |
1039 | ||
1040 | /* TODO: Populate SPD eeprom data. */ | |
cf7a2fe2 | 1041 | smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]); |
3fffc223 | 1042 | for (i = 0; i < 8; i++) { |
0ff596d0 | 1043 | smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
3fffc223 | 1044 | } |
6515b203 | 1045 | } |
3b46e624 | 1046 | |
a5954d5c FB |
1047 | if (i440fx_state) { |
1048 | i440fx_init_memory_mappings(i440fx_state); | |
1049 | } | |
e4bcb14c | 1050 | |
7d8406be | 1051 | if (pci_enabled) { |
e4bcb14c TS |
1052 | int max_bus; |
1053 | int bus, unit; | |
7d8406be | 1054 | void *scsi; |
96d30e48 | 1055 | |
e4bcb14c TS |
1056 | max_bus = drive_get_max_bus(IF_SCSI); |
1057 | ||
1058 | for (bus = 0; bus <= max_bus; bus++) { | |
1059 | scsi = lsi_scsi_init(pci_bus, -1); | |
1060 | for (unit = 0; unit < LSI_MAX_DEVS; unit++) { | |
1061 | index = drive_get_index(IF_SCSI, bus, unit); | |
1062 | if (index == -1) | |
1063 | continue; | |
1064 | lsi_scsi_attach(scsi, drives_table[index].bdrv, unit); | |
1065 | } | |
1066 | } | |
7d8406be | 1067 | } |
80cabfad | 1068 | } |
b5ff2d6e | 1069 | |
00f82b8a | 1070 | static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size, |
b881c2c6 | 1071 | const char *boot_device, DisplayState *ds, |
5fafdf24 | 1072 | const char *kernel_filename, |
3dbbdc25 | 1073 | const char *kernel_cmdline, |
94fc95cd JM |
1074 | const char *initrd_filename, |
1075 | const char *cpu_model) | |
3dbbdc25 | 1076 | { |
b881c2c6 | 1077 | pc_init1(ram_size, vga_ram_size, boot_device, ds, |
3dbbdc25 | 1078 | kernel_filename, kernel_cmdline, |
a049de61 | 1079 | initrd_filename, 1, cpu_model); |
3dbbdc25 FB |
1080 | } |
1081 | ||
00f82b8a | 1082 | static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size, |
b881c2c6 | 1083 | const char *boot_device, DisplayState *ds, |
5fafdf24 | 1084 | const char *kernel_filename, |
3dbbdc25 | 1085 | const char *kernel_cmdline, |
94fc95cd JM |
1086 | const char *initrd_filename, |
1087 | const char *cpu_model) | |
3dbbdc25 | 1088 | { |
b881c2c6 | 1089 | pc_init1(ram_size, vga_ram_size, boot_device, ds, |
3dbbdc25 | 1090 | kernel_filename, kernel_cmdline, |
a049de61 | 1091 | initrd_filename, 0, cpu_model); |
3dbbdc25 FB |
1092 | } |
1093 | ||
b5ff2d6e | 1094 | QEMUMachine pc_machine = { |
a245f2e7 AJ |
1095 | .name = "pc", |
1096 | .desc = "Standard PC", | |
1097 | .init = pc_init_pci, | |
1098 | .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, | |
3dbbdc25 FB |
1099 | }; |
1100 | ||
1101 | QEMUMachine isapc_machine = { | |
a245f2e7 AJ |
1102 | .name = "isapc", |
1103 | .desc = "ISA-only PC", | |
1104 | .init = pc_init_isa, | |
1105 | .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, | |
b5ff2d6e | 1106 | }; |