[mirror_qemu.git] / hw / pc.c

/*
 * QEMU PC System Emulator
 * 
 * Copyright (c) 2003-2004 Fabrice Bellard
 * 
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "vl.h"

/* output Bochs bios info messages */
//#define DEBUG_BIOS

#define BIOS_FILENAME "bios.bin"
#define VGABIOS_FILENAME "vgabios.bin"
#define LINUX_BOOT_FILENAME "linux_boot.bin"

#define KERNEL_LOAD_ADDR     0x00100000
#define INITRD_LOAD_ADDR     0x00400000
#define KERNEL_PARAMS_ADDR   0x00090000
#define KERNEL_CMDLINE_ADDR  0x00099000

int speaker_data_on;
int dummy_refresh_clock;
static fdctrl_t *floppy_controller;
static RTCState *rtc_state;
static PITState *pit;

static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
{
}

/* MSDOS compatibility mode FPU exception support */
/* XXX: add IGNNE support */
void cpu_set_ferr(CPUX86State *s)
{
    pic_set_irq(13, 1);
}

static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
{
    pic_set_irq(13, 0);
}

/* PC cmos mappings */

#define REG_EQUIPMENT_BYTE          0x14
#define REG_IBM_CENTURY_BYTE        0x32
#define REG_IBM_PS2_CENTURY_BYTE    0x37


static inline int to_bcd(RTCState *s, int a)
{
    return ((a / 10) << 4) | (a % 10);
}

static void cmos_init(int ram_size, int boot_device)
{
    RTCState *s = rtc_state;
    int val;
    int fd0, fd1, nb;
    time_t ti;
    struct tm *tm;

    /* set the CMOS date */
    time(&ti);
    tm = gmtime(&ti);
    rtc_set_date(s, tm);

    val = to_bcd(s, (tm->tm_year / 100) + 19);
    rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
    rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);

    /* various important CMOS locations needed by PC/Bochs bios */

    /* memory size */
    val = 640; /* base memory in K */
    rtc_set_memory(s, 0x15, val);
    rtc_set_memory(s, 0x16, val >> 8);

    val = (ram_size / 1024) - 1024;
    if (val > 65535)
        val = 65535;
    rtc_set_memory(s, 0x17, val);
    rtc_set_memory(s, 0x18, val >> 8);
    rtc_set_memory(s, 0x30, val);
    rtc_set_memory(s, 0x31, val >> 8);

    val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
    if (val > 65535)
        val = 65535;
    rtc_set_memory(s, 0x34, val);
    rtc_set_memory(s, 0x35, val >> 8);
    
    switch(boot_device) {
    case 'a':
    case 'b':
        rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
        break;
    default:
    case 'c':
        rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
        break;
    case 'd':
        rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
        break;
    }

    /* floppy type */

    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);

    val = 0;
    switch (fd0) {
    case 0:
        /* 1.44 Mb 3"5 drive */
        val |= 0x40;
        break;
    case 1:
        /* 2.88 Mb 3"5 drive */
        val |= 0x60;
        break;
    case 2:
        /* 1.2 Mb 5"5 drive */
        val |= 0x20;
        break;
    }
    switch (fd1) {
    case 0:
        /* 1.44 Mb 3"5 drive */
        val |= 0x04;
        break;
    case 1:
        /* 2.88 Mb 3"5 drive */
        val |= 0x06;
        break;
    case 2:
        /* 1.2 Mb 5"5 drive */
        val |= 0x02;
        break;
    }
    rtc_set_memory(s, 0x10, val);
    
    val = 0;
    nb = 0;
    if (fd0 < 3)
        nb++;
    if (fd1 < 3)
        nb++;
    switch (nb) {
    case 0:
        break;
    case 1:
        val |= 0x01; /* 1 drive, ready for boot */
        break;
    case 2:
        val |= 0x41; /* 2 drives, ready for boot */
        break;
    }
    val |= 0x02; /* FPU is there */
    val |= 0x04; /* PS/2 mouse installed */
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);

}

static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
{
    speaker_data_on = (val >> 1) & 1;
    pit_set_gate(pit, 2, val & 1);
}

static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
{
    int out;
    out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
    dummy_refresh_clock ^= 1;
    return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
      (dummy_refresh_clock << 4);
}

static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
{
    cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
    /* XXX: bit 0 is fast reset */
}

static uint32_t ioport92_read(void *opaque, uint32_t addr)
{
    return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
}

/***********************************************************/
/* Bochs BIOS debug ports */

void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
{
    switch(addr) {
        /* Bochs BIOS messages */
    case 0x400:
    case 0x401:
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
        exit(1);
    case 0x402:
    case 0x403:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;

        /* LGPL'ed VGA BIOS messages */
    case 0x501:
    case 0x502:
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
        exit(1);
    case 0x500:
    case 0x503:
#ifdef DEBUG_BIOS
        fprintf(stderr, "%c", val);
#endif
        break;
    }
}

void bochs_bios_init(void)
{
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);

    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
}


int load_kernel(const char *filename, uint8_t *addr, 
                uint8_t *real_addr)
{
    int fd, size;
    int setup_sects;

    fd = open(filename, O_RDONLY);
    if (fd < 0)
        return -1;

    /* load 16 bit code */
    if (read(fd, real_addr, 512) != 512)
        goto fail;
    setup_sects = real_addr[0x1F1];
    if (!setup_sects)
        setup_sects = 4;
    if (read(fd, real_addr + 512, setup_sects * 512) != 
        setup_sects * 512)
        goto fail;
    
    /* load 32 bit code */
    size = read(fd, addr, 16 * 1024 * 1024);
    if (size < 0)
        goto fail;
    close(fd);
    return size;
 fail:
    close(fd);
    return -1;
}

static const int ide_iobase[2] = { 0x1f0, 0x170 };
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
static const int ide_irq[2] = { 14, 15 };

#define NE2000_NB_MAX 6

static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };

/* PC hardware initialisation */
void pc_init(int ram_size, int vga_ram_size, int boot_device,
             DisplayState *ds, const char **fd_filename, int snapshot,
             const char *kernel_filename, const char *kernel_cmdline,
             const char *initrd_filename)
{
    char buf[1024];
    int ret, linux_boot, initrd_size, i, nb_nics1, fd;

    linux_boot = (kernel_filename != NULL);

    /* allocate RAM */
    cpu_register_physical_memory(0, ram_size, 0);

    /* BIOS load */
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
    ret = load_image(buf, phys_ram_base + 0x000f0000);
    if (ret != 0x10000) {
        fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
        exit(1);
    }
    
    /* VGA BIOS load */
    snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
    ret = load_image(buf, phys_ram_base + 0x000c0000);
    
    /* setup basic memory access */
    cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 | IO_MEM_ROM);
    cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
    cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 | IO_MEM_ROM);
    
    bochs_bios_init();

    if (linux_boot) {
        uint8_t bootsect[512];
        uint8_t old_bootsect[512];

        if (bs_table[0] == NULL) {
            fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
            exit(1);
        }
        snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
        ret = load_image(buf, bootsect);
        if (ret != sizeof(bootsect)) {
            fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
                    buf);
            exit(1);
        }

        if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
            /* copy the MSDOS partition table */
            memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
        }

        bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));

        /* now we can load the kernel */
        ret = load_kernel(kernel_filename, 
                          phys_ram_base + KERNEL_LOAD_ADDR,
                          phys_ram_base + KERNEL_PARAMS_ADDR);
        if (ret < 0) {
            fprintf(stderr, "qemu: could not load kernel '%s'\n", 
                    kernel_filename);
            exit(1);
        }
        
        /* load initrd */
        initrd_size = 0;
        if (initrd_filename) {
            initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
            if (initrd_size < 0) {
                fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", 
                        initrd_filename);
                exit(1);
            }
        }
        if (initrd_size > 0) {
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
            stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
        }
        pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
                kernel_cmdline);
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
                KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
        /* loader type */
        stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
    }

    /* init basic PC hardware */
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);

    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);

    vga_initialize(ds, phys_ram_base + ram_size, ram_size, 
                   vga_ram_size);

    rtc_state = rtc_init(0x70, 8);
    register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
    register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);

    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);

    pic_init();
    pit = pit_init(0x40, 0);

    fd = serial_open_device();
    serial_init(0x3f8, 4, fd);

    nb_nics1 = nb_nics;
    if (nb_nics1 > NE2000_NB_MAX)
        nb_nics1 = NE2000_NB_MAX;
    for(i = 0; i < nb_nics1; i++) {
        ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
    }

    for(i = 0; i < 2; i++) {
        ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
                 bs_table[2 * i], bs_table[2 * i + 1]);
    }
    kbd_init();
    DMA_init();

#ifndef _WIN32
    if (audio_enabled) {
        /* no audio supported yet for win32 */
        AUD_init();
        SB16_init();
    }
#endif

    floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);

    cmos_init(ram_size, boot_device);
}
Commit	Line	Data
80cabfad FB	1	/*
	2	* QEMU PC System Emulator
	3	*
	4	* Copyright (c) 2003-2004 Fabrice Bellard
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
80cabfad FB	24	#include "vl.h"
80cabfad FB	25
b41a2cd1 FB	26	/* output Bochs bios info messages */
	27	//#define DEBUG_BIOS
	28
80cabfad FB	29	#define BIOS_FILENAME "bios.bin"
	30	#define VGABIOS_FILENAME "vgabios.bin"
	31	#define LINUX_BOOT_FILENAME "linux_boot.bin"
	32
	33	#define KERNEL_LOAD_ADDR 0x00100000
	34	#define INITRD_LOAD_ADDR 0x00400000
	35	#define KERNEL_PARAMS_ADDR 0x00090000
	36	#define KERNEL_CMDLINE_ADDR 0x00099000
	37
	38	int speaker_data_on;
	39	int dummy_refresh_clock;
baca51fa	40	static fdctrl_t *floppy_controller;
b0a21b53	41	static RTCState *rtc_state;
ec844b96	42	static PITState *pit;
80cabfad	43
b41a2cd1	44	static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
80cabfad FB	45	{
	46	}
	47
f929aad6 FB	48	/* MSDOS compatibility mode FPU exception support */
	49	/* XXX: add IGNNE support */
	50	void cpu_set_ferr(CPUX86State *s)
	51	{
	52	pic_set_irq(13, 1);
	53	}
	54
	55	static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
	56	{
	57	pic_set_irq(13, 0);
	58	}
	59
b0a21b53 FB	60	/* PC cmos mappings */
b0a21b53 FB	61
80cabfad	62	#define REG_EQUIPMENT_BYTE 0x14
b0a21b53 FB	63	#define REG_IBM_CENTURY_BYTE 0x32
	64	#define REG_IBM_PS2_CENTURY_BYTE 0x37
	65
	66
	67	static inline int to_bcd(RTCState *s, int a)
	68	{
	69	return ((a / 10) << 4) \| (a % 10);
	70	}
80cabfad FB	71
	72	static void cmos_init(int ram_size, int boot_device)
	73	{
b0a21b53	74	RTCState *s = rtc_state;
80cabfad	75	int val;
b41a2cd1	76	int fd0, fd1, nb;
b0a21b53 FB	77	time_t ti;
	78	struct tm *tm;
	79
	80	/* set the CMOS date */
	81	time(&ti);
	82	tm = gmtime(&ti);
	83	rtc_set_date(s, tm);
	84
	85	val = to_bcd(s, (tm->tm_year / 100) + 19);
	86	rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
	87	rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
80cabfad	88
b0a21b53	89	/* various important CMOS locations needed by PC/Bochs bios */
80cabfad FB	90
80cabfad FB	91	/* memory size */
333190eb FB	92	val = 640; /* base memory in K */
	93	rtc_set_memory(s, 0x15, val);
	94	rtc_set_memory(s, 0x16, val >> 8);
	95
80cabfad FB	96	val = (ram_size / 1024) - 1024;
	97	if (val > 65535)
	98	val = 65535;
b0a21b53 FB	99	rtc_set_memory(s, 0x17, val);
	100	rtc_set_memory(s, 0x18, val >> 8);
	101	rtc_set_memory(s, 0x30, val);
	102	rtc_set_memory(s, 0x31, val >> 8);
80cabfad FB	103
	104	val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
	105	if (val > 65535)
	106	val = 65535;
b0a21b53 FB	107	rtc_set_memory(s, 0x34, val);
b0a21b53 FB	108	rtc_set_memory(s, 0x35, val >> 8);
80cabfad FB	109
	110	switch(boot_device) {
	111	case 'a':
	112	case 'b':
b0a21b53	113	rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
80cabfad FB	114	break;
	115	default:
	116	case 'c':
b0a21b53	117	rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
80cabfad FB	118	break;
80cabfad FB	119	case 'd':
b0a21b53	120	rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
80cabfad FB	121	break;
80cabfad FB	122	}
80cabfad	123
b41a2cd1 FB	124	/* floppy type */
b41a2cd1 FB	125
baca51fa FB	126	fd0 = fdctrl_get_drive_type(floppy_controller, 0);
baca51fa FB	127	fd1 = fdctrl_get_drive_type(floppy_controller, 1);
80cabfad	128
b0a21b53	129	val = 0;
80cabfad FB	130	switch (fd0) {
	131	case 0:
	132	/* 1.44 Mb 3"5 drive */
b0a21b53	133	val \|= 0x40;
80cabfad FB	134	break;
	135	case 1:
	136	/* 2.88 Mb 3"5 drive */
b0a21b53	137	val \|= 0x60;
80cabfad FB	138	break;
	139	case 2:
	140	/* 1.2 Mb 5"5 drive */
b0a21b53	141	val \|= 0x20;
80cabfad FB	142	break;
	143	}
	144	switch (fd1) {
	145	case 0:
	146	/* 1.44 Mb 3"5 drive */
b0a21b53	147	val \|= 0x04;
80cabfad FB	148	break;
	149	case 1:
	150	/* 2.88 Mb 3"5 drive */
b0a21b53	151	val \|= 0x06;
80cabfad FB	152	break;
	153	case 2:
	154	/* 1.2 Mb 5"5 drive */
b0a21b53	155	val \|= 0x02;
80cabfad FB	156	break;
80cabfad FB	157	}
b0a21b53 FB	158	rtc_set_memory(s, 0x10, val);
	159
	160	val = 0;
b41a2cd1	161	nb = 0;
80cabfad FB	162	if (fd0 < 3)
	163	nb++;
	164	if (fd1 < 3)
	165	nb++;
	166	switch (nb) {
	167	case 0:
	168	break;
	169	case 1:
b0a21b53	170	val \|= 0x01; /* 1 drive, ready for boot */
80cabfad FB	171	break;
80cabfad FB	172	case 2:
b0a21b53	173	val \|= 0x41; /* 2 drives, ready for boot */
80cabfad FB	174	break;
80cabfad FB	175	}
b0a21b53 FB	176	val \|= 0x02; /* FPU is there */
	177	val \|= 0x04; /* PS/2 mouse installed */
	178	rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
	179
80cabfad FB	180	}
80cabfad FB	181
b41a2cd1	182	static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad FB	183	{
80cabfad FB	184	speaker_data_on = (val >> 1) & 1;
ec844b96	185	pit_set_gate(pit, 2, val & 1);
80cabfad FB	186	}
80cabfad FB	187
b41a2cd1	188	static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
80cabfad FB	189	{
80cabfad FB	190	int out;
ec844b96	191	out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
80cabfad	192	dummy_refresh_clock ^= 1;
ec844b96	193	return (speaker_data_on << 1) \| pit_get_gate(pit, 2) \| (out << 5) \|
80cabfad FB	194	(dummy_refresh_clock << 4);
	195	}
	196
e1a23744 FB	197	static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
	198	{
	199	cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
	200	/* XXX: bit 0 is fast reset */
	201	}
	202
	203	static uint32_t ioport92_read(void *opaque, uint32_t addr)
	204	{
	205	return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
	206	}
	207
80cabfad FB	208	/***********************************************************/
	209	/* Bochs BIOS debug ports */
	210
b41a2cd1	211	void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad FB	212	{
	213	switch(addr) {
	214	/* Bochs BIOS messages */
	215	case 0x400:
	216	case 0x401:
	217	fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
	218	exit(1);
	219	case 0x402:
	220	case 0x403:
	221	#ifdef DEBUG_BIOS
	222	fprintf(stderr, "%c", val);
	223	#endif
	224	break;
	225
	226	/* LGPL'ed VGA BIOS messages */
	227	case 0x501:
	228	case 0x502:
	229	fprintf(stderr, "VGA BIOS panic, line %d\n", val);
	230	exit(1);
	231	case 0x500:
	232	case 0x503:
	233	#ifdef DEBUG_BIOS
	234	fprintf(stderr, "%c", val);
	235	#endif
	236	break;
	237	}
	238	}
	239
	240	void bochs_bios_init(void)
	241	{
b41a2cd1 FB	242	register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
	243	register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
	244	register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
	245	register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
	246
	247	register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
	248	register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
	249	register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
	250	register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
80cabfad FB	251	}
	252
	253
	254	int load_kernel(const char filename, uint8_t addr,
	255	uint8_t *real_addr)
	256	{
	257	int fd, size;
	258	int setup_sects;
	259
	260	fd = open(filename, O_RDONLY);
	261	if (fd < 0)
	262	return -1;
	263
	264	/* load 16 bit code */
	265	if (read(fd, real_addr, 512) != 512)
	266	goto fail;
	267	setup_sects = real_addr[0x1F1];
	268	if (!setup_sects)
	269	setup_sects = 4;
	270	if (read(fd, real_addr + 512, setup_sects * 512) !=
	271	setup_sects * 512)
	272	goto fail;
	273
	274	/* load 32 bit code */
	275	size = read(fd, addr, 16 * 1024 * 1024);
	276	if (size < 0)
	277	goto fail;
	278	close(fd);
	279	return size;
	280	fail:
	281	close(fd);
	282	return -1;
	283	}
	284
b41a2cd1 FB	285	static const int ide_iobase[2] = { 0x1f0, 0x170 };
	286	static const int ide_iobase2[2] = { 0x3f6, 0x376 };
	287	static const int ide_irq[2] = { 14, 15 };
	288
	289	#define NE2000_NB_MAX 6
	290
	291	static uint32_t ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
	292	static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
	293
80cabfad FB	294	/* PC hardware initialisation */
	295	void pc_init(int ram_size, int vga_ram_size, int boot_device,
	296	DisplayState ds, const char *fd_filename, int snapshot,
	297	const char kernel_filename, const char kernel_cmdline,
	298	const char *initrd_filename)
	299	{
	300	char buf[1024];
b41a2cd1	301	int ret, linux_boot, initrd_size, i, nb_nics1, fd;
80cabfad FB	302
	303	linux_boot = (kernel_filename != NULL);
	304
	305	/* allocate RAM */
	306	cpu_register_physical_memory(0, ram_size, 0);
	307
	308	/* BIOS load */
	309	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
	310	ret = load_image(buf, phys_ram_base + 0x000f0000);
	311	if (ret != 0x10000) {
	312	fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
	313	exit(1);
	314	}
	315
	316	/* VGA BIOS load */
	317	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
	318	ret = load_image(buf, phys_ram_base + 0x000c0000);
	319
	320	/* setup basic memory access */
	321	cpu_register_physical_memory(0xc0000, 0x10000, 0xc0000 \| IO_MEM_ROM);
bb058620	322	cpu_register_physical_memory(0xd0000, 0x20000, IO_MEM_UNASSIGNED);
80cabfad FB	323	cpu_register_physical_memory(0xf0000, 0x10000, 0xf0000 \| IO_MEM_ROM);
	324
	325	bochs_bios_init();
	326
	327	if (linux_boot) {
	328	uint8_t bootsect[512];
41b9be47	329	uint8_t old_bootsect[512];
80cabfad FB	330
	331	if (bs_table[0] == NULL) {
	332	fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
	333	exit(1);
	334	}
	335	snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
	336	ret = load_image(buf, bootsect);
	337	if (ret != sizeof(bootsect)) {
	338	fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
	339	buf);
	340	exit(1);
	341	}
	342
41b9be47 FB	343	if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
	344	/* copy the MSDOS partition table */
	345	memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
	346	}
	347
80cabfad FB	348	bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
	349
	350	/* now we can load the kernel */
	351	ret = load_kernel(kernel_filename,
	352	phys_ram_base + KERNEL_LOAD_ADDR,
	353	phys_ram_base + KERNEL_PARAMS_ADDR);
	354	if (ret < 0) {
	355	fprintf(stderr, "qemu: could not load kernel '%s'\n",
	356	kernel_filename);
	357	exit(1);
	358	}
	359
	360	/* load initrd */
	361	initrd_size = 0;
	362	if (initrd_filename) {
	363	initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
	364	if (initrd_size < 0) {
	365	fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
	366	initrd_filename);
	367	exit(1);
	368	}
	369	}
	370	if (initrd_size > 0) {
	371	stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
	372	stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
	373	}
	374	pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
	375	kernel_cmdline);
	376	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
	377	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
	378	KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
	379	/* loader type */
	380	stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
	381	}
	382
	383	/* init basic PC hardware */
b41a2cd1	384	register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
80cabfad	385
f929aad6 FB	386	register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
f929aad6 FB	387
80cabfad FB	388	vga_initialize(ds, phys_ram_base + ram_size, ram_size,
	389	vga_ram_size);
	390
b0a21b53	391	rtc_state = rtc_init(0x70, 8);
b41a2cd1 FB	392	register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
b41a2cd1 FB	393	register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
80cabfad	394
e1a23744 FB	395	register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
	396	register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
	397
80cabfad	398	pic_init();
ec844b96	399	pit = pit_init(0x40, 0);
b41a2cd1 FB	400
	401	fd = serial_open_device();
	402	serial_init(0x3f8, 4, fd);
	403
	404	nb_nics1 = nb_nics;
	405	if (nb_nics1 > NE2000_NB_MAX)
	406	nb_nics1 = NE2000_NB_MAX;
	407	for(i = 0; i < nb_nics1; i++) {
	408	ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
	409	}
	410
	411	for(i = 0; i < 2; i++) {
	412	ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
	413	bs_table[2 * i], bs_table[2 * i + 1]);
	414	}
80cabfad	415	kbd_init();
80cabfad	416	DMA_init();
67b915a5 FB	417
67b915a5 FB	418	#ifndef _WIN32
aaaa7df6 FB	419	if (audio_enabled) {
	420	/* no audio supported yet for win32 */
	421	AUD_init();
	422	SB16_init();
	423	}
67b915a5	424	#endif
80cabfad	425
baca51fa	426	floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
b41a2cd1 FB	427
b41a2cd1 FB	428	cmos_init(ram_size, boot_device);
80cabfad	429	}