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80cabfad
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1/*
2 * QEMU PC System Emulator
3 *
4 * Copyright (c) 2003-2004 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
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24#include "vl.h"
25
b41a2cd1
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26/* output Bochs bios info messages */
27//#define DEBUG_BIOS
28
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29#define BIOS_FILENAME "bios.bin"
30#define VGABIOS_FILENAME "vgabios.bin"
de9258a8 31#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
80cabfad
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32#define LINUX_BOOT_FILENAME "linux_boot.bin"
33
34#define KERNEL_LOAD_ADDR 0x00100000
35#define INITRD_LOAD_ADDR 0x00400000
36#define KERNEL_PARAMS_ADDR 0x00090000
37#define KERNEL_CMDLINE_ADDR 0x00099000
38
39int speaker_data_on;
40int dummy_refresh_clock;
baca51fa 41static fdctrl_t *floppy_controller;
b0a21b53 42static RTCState *rtc_state;
ec844b96 43static PITState *pit;
80cabfad 44
b41a2cd1 45static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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46{
47}
48
f929aad6
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49/* MSDOS compatibility mode FPU exception support */
50/* XXX: add IGNNE support */
51void cpu_set_ferr(CPUX86State *s)
52{
53 pic_set_irq(13, 1);
54}
55
56static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
57{
58 pic_set_irq(13, 0);
59}
60
28ab0e2e
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61/* TSC handling */
62
63uint64_t cpu_get_tsc(CPUX86State *env)
64{
65 return qemu_get_clock(vm_clock);
66}
67
b0a21b53
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68/* PC cmos mappings */
69
80cabfad 70#define REG_EQUIPMENT_BYTE 0x14
b0a21b53
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71#define REG_IBM_CENTURY_BYTE 0x32
72#define REG_IBM_PS2_CENTURY_BYTE 0x37
73
74
75static inline int to_bcd(RTCState *s, int a)
76{
77 return ((a / 10) << 4) | (a % 10);
78}
80cabfad 79
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80static int cmos_get_fd_drive_type(int fd0)
81{
82 int val;
83
84 switch (fd0) {
85 case 0:
86 /* 1.44 Mb 3"5 drive */
87 val = 4;
88 break;
89 case 1:
90 /* 2.88 Mb 3"5 drive */
91 val = 5;
92 break;
93 case 2:
94 /* 1.2 Mb 5"5 drive */
95 val = 2;
96 break;
97 default:
98 val = 0;
99 break;
100 }
101 return val;
102}
103
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104static void cmos_init(int ram_size, int boot_device)
105{
b0a21b53 106 RTCState *s = rtc_state;
80cabfad 107 int val;
b41a2cd1 108 int fd0, fd1, nb;
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109 time_t ti;
110 struct tm *tm;
111
112 /* set the CMOS date */
113 time(&ti);
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114 if (rtc_utc)
115 tm = gmtime(&ti);
116 else
117 tm = localtime(&ti);
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118 rtc_set_date(s, tm);
119
120 val = to_bcd(s, (tm->tm_year / 100) + 19);
121 rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
122 rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
80cabfad 123
b0a21b53 124 /* various important CMOS locations needed by PC/Bochs bios */
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125
126 /* memory size */
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127 val = 640; /* base memory in K */
128 rtc_set_memory(s, 0x15, val);
129 rtc_set_memory(s, 0x16, val >> 8);
130
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131 val = (ram_size / 1024) - 1024;
132 if (val > 65535)
133 val = 65535;
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134 rtc_set_memory(s, 0x17, val);
135 rtc_set_memory(s, 0x18, val >> 8);
136 rtc_set_memory(s, 0x30, val);
137 rtc_set_memory(s, 0x31, val >> 8);
80cabfad 138
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139 if (ram_size > (16 * 1024 * 1024))
140 val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
141 else
142 val = 0;
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143 if (val > 65535)
144 val = 65535;
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145 rtc_set_memory(s, 0x34, val);
146 rtc_set_memory(s, 0x35, val >> 8);
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147
148 switch(boot_device) {
149 case 'a':
150 case 'b':
b0a21b53 151 rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
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152 break;
153 default:
154 case 'c':
b0a21b53 155 rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
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156 break;
157 case 'd':
b0a21b53 158 rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
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159 break;
160 }
80cabfad 161
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162 /* floppy type */
163
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164 fd0 = fdctrl_get_drive_type(floppy_controller, 0);
165 fd1 = fdctrl_get_drive_type(floppy_controller, 1);
80cabfad 166
777428f2 167 val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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168 rtc_set_memory(s, 0x10, val);
169
170 val = 0;
b41a2cd1 171 nb = 0;
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172 if (fd0 < 3)
173 nb++;
174 if (fd1 < 3)
175 nb++;
176 switch (nb) {
177 case 0:
178 break;
179 case 1:
b0a21b53 180 val |= 0x01; /* 1 drive, ready for boot */
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181 break;
182 case 2:
b0a21b53 183 val |= 0x41; /* 2 drives, ready for boot */
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184 break;
185 }
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186 val |= 0x02; /* FPU is there */
187 val |= 0x04; /* PS/2 mouse installed */
188 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
189
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190}
191
b41a2cd1 192static void speaker_ioport_write(void *opaque, uint32_t addr, uint32_t val)
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193{
194 speaker_data_on = (val >> 1) & 1;
ec844b96 195 pit_set_gate(pit, 2, val & 1);
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196}
197
b41a2cd1 198static uint32_t speaker_ioport_read(void *opaque, uint32_t addr)
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199{
200 int out;
ec844b96 201 out = pit_get_out(pit, 2, qemu_get_clock(vm_clock));
80cabfad 202 dummy_refresh_clock ^= 1;
ec844b96 203 return (speaker_data_on << 1) | pit_get_gate(pit, 2) | (out << 5) |
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204 (dummy_refresh_clock << 4);
205}
206
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207static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
208{
209 cpu_x86_set_a20(cpu_single_env, (val >> 1) & 1);
210 /* XXX: bit 0 is fast reset */
211}
212
213static uint32_t ioport92_read(void *opaque, uint32_t addr)
214{
215 return ((cpu_single_env->a20_mask >> 20) & 1) << 1;
216}
217
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218/***********************************************************/
219/* Bochs BIOS debug ports */
220
b41a2cd1 221void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
80cabfad 222{
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223 static const char shutdown_str[8] = "Shutdown";
224 static int shutdown_index = 0;
225
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226 switch(addr) {
227 /* Bochs BIOS messages */
228 case 0x400:
229 case 0x401:
230 fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
231 exit(1);
232 case 0x402:
233 case 0x403:
234#ifdef DEBUG_BIOS
235 fprintf(stderr, "%c", val);
236#endif
237 break;
a2f659ee
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238 case 0x8900:
239 /* same as Bochs power off */
240 if (val == shutdown_str[shutdown_index]) {
241 shutdown_index++;
242 if (shutdown_index == 8) {
243 shutdown_index = 0;
244 qemu_system_shutdown_request();
245 }
246 } else {
247 shutdown_index = 0;
248 }
249 break;
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250
251 /* LGPL'ed VGA BIOS messages */
252 case 0x501:
253 case 0x502:
254 fprintf(stderr, "VGA BIOS panic, line %d\n", val);
255 exit(1);
256 case 0x500:
257 case 0x503:
258#ifdef DEBUG_BIOS
259 fprintf(stderr, "%c", val);
260#endif
261 break;
262 }
263}
264
265void bochs_bios_init(void)
266{
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267 register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
268 register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
269 register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
270 register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
a2f659ee 271 register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
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272
273 register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
274 register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
275 register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
276 register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
80cabfad
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277}
278
279
280int load_kernel(const char *filename, uint8_t *addr,
281 uint8_t *real_addr)
282{
283 int fd, size;
284 int setup_sects;
285
096b7ea4 286 fd = open(filename, O_RDONLY | O_BINARY);
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287 if (fd < 0)
288 return -1;
289
290 /* load 16 bit code */
291 if (read(fd, real_addr, 512) != 512)
292 goto fail;
293 setup_sects = real_addr[0x1F1];
294 if (!setup_sects)
295 setup_sects = 4;
296 if (read(fd, real_addr + 512, setup_sects * 512) !=
297 setup_sects * 512)
298 goto fail;
299
300 /* load 32 bit code */
301 size = read(fd, addr, 16 * 1024 * 1024);
302 if (size < 0)
303 goto fail;
304 close(fd);
305 return size;
306 fail:
307 close(fd);
308 return -1;
309}
310
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311static const int ide_iobase[2] = { 0x1f0, 0x170 };
312static const int ide_iobase2[2] = { 0x3f6, 0x376 };
313static const int ide_irq[2] = { 14, 15 };
314
315#define NE2000_NB_MAX 6
316
8d11df9e 317static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
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318static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
319
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320static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
321static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
322
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323/* PC hardware initialisation */
324void pc_init(int ram_size, int vga_ram_size, int boot_device,
325 DisplayState *ds, const char **fd_filename, int snapshot,
326 const char *kernel_filename, const char *kernel_cmdline,
327 const char *initrd_filename)
328{
329 char buf[1024];
82c643ff 330 int ret, linux_boot, initrd_size, i, nb_nics1;
7587cf44
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331 unsigned long bios_offset, vga_bios_offset;
332 int bios_size, isa_bios_size;
46e50e9d
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333 PCIBus *pci_bus;
334
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335 linux_boot = (kernel_filename != NULL);
336
337 /* allocate RAM */
338 cpu_register_physical_memory(0, ram_size, 0);
339
340 /* BIOS load */
7587cf44
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341 bios_offset = ram_size + vga_ram_size;
342 vga_bios_offset = bios_offset + 256 * 1024;
343
80cabfad 344 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
7587cf44
FB
345 bios_size = get_image_size(buf);
346 if (bios_size <= 0 ||
347 (bios_size % 65536) != 0 ||
348 bios_size > (256 * 1024)) {
349 goto bios_error;
350 }
351 ret = load_image(buf, phys_ram_base + bios_offset);
352 if (ret != bios_size) {
353 bios_error:
80cabfad
FB
354 fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
355 exit(1);
356 }
7587cf44 357
80cabfad 358 /* VGA BIOS load */
de9258a8
FB
359 if (cirrus_vga_enabled) {
360 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
361 } else {
362 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
363 }
7587cf44 364 ret = load_image(buf, phys_ram_base + vga_bios_offset);
80cabfad
FB
365
366 /* setup basic memory access */
7587cf44
FB
367 cpu_register_physical_memory(0xc0000, 0x10000,
368 vga_bios_offset | IO_MEM_ROM);
369
370 /* map the last 128KB of the BIOS in ISA space */
371 isa_bios_size = bios_size;
372 if (isa_bios_size > (128 * 1024))
373 isa_bios_size = 128 * 1024;
374 cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
375 IO_MEM_UNASSIGNED);
376 cpu_register_physical_memory(0x100000 - isa_bios_size,
377 isa_bios_size,
378 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
379 /* map all the bios at the top of memory */
380 cpu_register_physical_memory((uint32_t)(-bios_size),
381 bios_size, bios_offset | IO_MEM_ROM);
80cabfad
FB
382
383 bochs_bios_init();
384
385 if (linux_boot) {
386 uint8_t bootsect[512];
41b9be47 387 uint8_t old_bootsect[512];
80cabfad
FB
388
389 if (bs_table[0] == NULL) {
390 fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
391 exit(1);
392 }
393 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
394 ret = load_image(buf, bootsect);
395 if (ret != sizeof(bootsect)) {
396 fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
397 buf);
398 exit(1);
399 }
400
41b9be47
FB
401 if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
402 /* copy the MSDOS partition table */
403 memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
404 }
405
80cabfad
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406 bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
407
408 /* now we can load the kernel */
409 ret = load_kernel(kernel_filename,
410 phys_ram_base + KERNEL_LOAD_ADDR,
411 phys_ram_base + KERNEL_PARAMS_ADDR);
412 if (ret < 0) {
413 fprintf(stderr, "qemu: could not load kernel '%s'\n",
414 kernel_filename);
415 exit(1);
416 }
417
418 /* load initrd */
419 initrd_size = 0;
420 if (initrd_filename) {
421 initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
422 if (initrd_size < 0) {
423 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
424 initrd_filename);
425 exit(1);
426 }
427 }
428 if (initrd_size > 0) {
429 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
430 stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
431 }
432 pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
433 kernel_cmdline);
434 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
435 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
436 KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
437 /* loader type */
438 stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
439 }
440
69b91039 441 if (pci_enabled) {
46e50e9d
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442 pci_bus = i440fx_init();
443 piix3_init(pci_bus);
444 } else {
445 pci_bus = NULL;
69b91039
FB
446 }
447
80cabfad 448 /* init basic PC hardware */
b41a2cd1 449 register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
80cabfad 450
f929aad6
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451 register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
452
1f04275e
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453 if (cirrus_vga_enabled) {
454 if (pci_enabled) {
46e50e9d
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455 pci_cirrus_vga_init(pci_bus,
456 ds, phys_ram_base + ram_size, ram_size,
1f04275e
FB
457 vga_ram_size);
458 } else {
459 isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
460 vga_ram_size);
461 }
462 } else {
46e50e9d
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463 vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
464 vga_ram_size);
1f04275e 465 }
80cabfad 466
b0a21b53 467 rtc_state = rtc_init(0x70, 8);
b41a2cd1
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468 register_ioport_read(0x61, 1, 1, speaker_ioport_read, NULL);
469 register_ioport_write(0x61, 1, 1, speaker_ioport_write, NULL);
80cabfad 470
e1a23744
FB
471 register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
472 register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
473
80cabfad 474 pic_init();
ec844b96 475 pit = pit_init(0x40, 0);
b41a2cd1 476
8d11df9e
FB
477 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
478 if (serial_hds[i]) {
479 serial_init(serial_io[i], serial_irq[i], serial_hds[i]);
480 }
481 }
b41a2cd1 482
69b91039
FB
483 if (pci_enabled) {
484 for(i = 0; i < nb_nics; i++) {
46e50e9d 485 pci_ne2000_init(pci_bus, &nd_table[i]);
69b91039 486 }
46e50e9d 487 pci_piix3_ide_init(pci_bus, bs_table);
69b91039
FB
488 } else {
489 nb_nics1 = nb_nics;
490 if (nb_nics1 > NE2000_NB_MAX)
491 nb_nics1 = NE2000_NB_MAX;
492 for(i = 0; i < nb_nics1; i++) {
493 isa_ne2000_init(ne2000_io[i], ne2000_irq[i], &nd_table[i]);
494 }
b41a2cd1 495
69b91039
FB
496 for(i = 0; i < 2; i++) {
497 isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
498 bs_table[2 * i], bs_table[2 * i + 1]);
499 }
b41a2cd1 500 }
69b91039 501
80cabfad 502 kbd_init();
7c29d0c0 503 DMA_init(0);
67b915a5
FB
504
505#ifndef _WIN32
aaaa7df6
FB
506 if (audio_enabled) {
507 /* no audio supported yet for win32 */
508 AUD_init();
509 SB16_init();
510 }
67b915a5 511#endif
80cabfad 512
baca51fa 513 floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
b41a2cd1
FB
514
515 cmos_init(ram_size, boot_device);
69b91039
FB
516
517 /* must be done after all PCI devices are instanciated */
518 /* XXX: should be done in the Bochs BIOS */
519 if (pci_enabled) {
520 pci_bios_init();
521 }
80cabfad 522}