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Commit | Line | Data |
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80cabfad FB |
1 | /* |
2 | * QEMU PC System Emulator | |
5fafdf24 | 3 | * |
80cabfad | 4 | * Copyright (c) 2003-2004 Fabrice Bellard |
5fafdf24 | 5 | * |
80cabfad FB |
6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
7 | * of this software and associated documentation files (the "Software"), to deal | |
8 | * in the Software without restriction, including without limitation the rights | |
9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
10 | * copies of the Software, and to permit persons to whom the Software is | |
11 | * furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
22 | * THE SOFTWARE. | |
23 | */ | |
87ecb68b PB |
24 | #include "hw.h" |
25 | #include "pc.h" | |
26 | #include "fdc.h" | |
27 | #include "pci.h" | |
28 | #include "block.h" | |
29 | #include "sysemu.h" | |
30 | #include "audio/audio.h" | |
31 | #include "net.h" | |
32 | #include "smbus.h" | |
33 | #include "boards.h" | |
cfa2af1f | 34 | #include "console.h" |
80cabfad | 35 | |
b41a2cd1 FB |
36 | /* output Bochs bios info messages */ |
37 | //#define DEBUG_BIOS | |
38 | ||
80cabfad FB |
39 | #define BIOS_FILENAME "bios.bin" |
40 | #define VGABIOS_FILENAME "vgabios.bin" | |
de9258a8 | 41 | #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
80cabfad | 42 | |
7fb4fdcf AZ |
43 | #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) |
44 | ||
a80274c3 PB |
45 | /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */ |
46 | #define ACPI_DATA_SIZE 0x10000 | |
80cabfad | 47 | |
e4bcb14c TS |
48 | #define MAX_IDE_BUS 2 |
49 | ||
baca51fa | 50 | static fdctrl_t *floppy_controller; |
b0a21b53 | 51 | static RTCState *rtc_state; |
ec844b96 | 52 | static PITState *pit; |
d592d303 | 53 | static IOAPICState *ioapic; |
a5954d5c | 54 | static PCIDevice *i440fx_state; |
80cabfad | 55 | |
b41a2cd1 | 56 | static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
80cabfad FB |
57 | { |
58 | } | |
59 | ||
f929aad6 | 60 | /* MSDOS compatibility mode FPU exception support */ |
d537cf6c | 61 | static qemu_irq ferr_irq; |
f929aad6 FB |
62 | /* XXX: add IGNNE support */ |
63 | void cpu_set_ferr(CPUX86State *s) | |
64 | { | |
d537cf6c | 65 | qemu_irq_raise(ferr_irq); |
f929aad6 FB |
66 | } |
67 | ||
68 | static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) | |
69 | { | |
d537cf6c | 70 | qemu_irq_lower(ferr_irq); |
f929aad6 FB |
71 | } |
72 | ||
28ab0e2e | 73 | /* TSC handling */ |
28ab0e2e FB |
74 | uint64_t cpu_get_tsc(CPUX86State *env) |
75 | { | |
1dce7c3c FB |
76 | /* Note: when using kqemu, it is more logical to return the host TSC |
77 | because kqemu does not trap the RDTSC instruction for | |
78 | performance reasons */ | |
79 | #if USE_KQEMU | |
80 | if (env->kqemu_enabled) { | |
81 | return cpu_get_real_ticks(); | |
5fafdf24 | 82 | } else |
1dce7c3c FB |
83 | #endif |
84 | { | |
85 | return cpu_get_ticks(); | |
86 | } | |
28ab0e2e FB |
87 | } |
88 | ||
a5954d5c FB |
89 | /* SMM support */ |
90 | void cpu_smm_update(CPUState *env) | |
91 | { | |
92 | if (i440fx_state && env == first_cpu) | |
93 | i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1); | |
94 | } | |
95 | ||
96 | ||
3de388f6 FB |
97 | /* IRQ handling */ |
98 | int cpu_get_pic_interrupt(CPUState *env) | |
99 | { | |
100 | int intno; | |
101 | ||
3de388f6 FB |
102 | intno = apic_get_interrupt(env); |
103 | if (intno >= 0) { | |
104 | /* set irq request if a PIC irq is still pending */ | |
105 | /* XXX: improve that */ | |
5fafdf24 | 106 | pic_update_irq(isa_pic); |
3de388f6 FB |
107 | return intno; |
108 | } | |
3de388f6 | 109 | /* read the irq from the PIC */ |
0e21e12b TS |
110 | if (!apic_accept_pic_intr(env)) |
111 | return -1; | |
112 | ||
3de388f6 FB |
113 | intno = pic_read_irq(isa_pic); |
114 | return intno; | |
115 | } | |
116 | ||
d537cf6c | 117 | static void pic_irq_request(void *opaque, int irq, int level) |
3de388f6 | 118 | { |
a5b38b51 AJ |
119 | CPUState *env = first_cpu; |
120 | ||
d5529471 AJ |
121 | if (env->apic_state) { |
122 | while (env) { | |
123 | if (apic_accept_pic_intr(env)) | |
1a7de94a | 124 | apic_deliver_pic_intr(env, level); |
d5529471 AJ |
125 | env = env->next_cpu; |
126 | } | |
127 | } else { | |
b614106a AJ |
128 | if (level) |
129 | cpu_interrupt(env, CPU_INTERRUPT_HARD); | |
130 | else | |
131 | cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); | |
a5b38b51 | 132 | } |
3de388f6 FB |
133 | } |
134 | ||
b0a21b53 FB |
135 | /* PC cmos mappings */ |
136 | ||
80cabfad FB |
137 | #define REG_EQUIPMENT_BYTE 0x14 |
138 | ||
777428f2 FB |
139 | static int cmos_get_fd_drive_type(int fd0) |
140 | { | |
141 | int val; | |
142 | ||
143 | switch (fd0) { | |
144 | case 0: | |
145 | /* 1.44 Mb 3"5 drive */ | |
146 | val = 4; | |
147 | break; | |
148 | case 1: | |
149 | /* 2.88 Mb 3"5 drive */ | |
150 | val = 5; | |
151 | break; | |
152 | case 2: | |
153 | /* 1.2 Mb 5"5 drive */ | |
154 | val = 2; | |
155 | break; | |
156 | default: | |
157 | val = 0; | |
158 | break; | |
159 | } | |
160 | return val; | |
161 | } | |
162 | ||
5fafdf24 | 163 | static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
ba6c2377 FB |
164 | { |
165 | RTCState *s = rtc_state; | |
166 | int cylinders, heads, sectors; | |
167 | bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); | |
168 | rtc_set_memory(s, type_ofs, 47); | |
169 | rtc_set_memory(s, info_ofs, cylinders); | |
170 | rtc_set_memory(s, info_ofs + 1, cylinders >> 8); | |
171 | rtc_set_memory(s, info_ofs + 2, heads); | |
172 | rtc_set_memory(s, info_ofs + 3, 0xff); | |
173 | rtc_set_memory(s, info_ofs + 4, 0xff); | |
174 | rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); | |
175 | rtc_set_memory(s, info_ofs + 6, cylinders); | |
176 | rtc_set_memory(s, info_ofs + 7, cylinders >> 8); | |
177 | rtc_set_memory(s, info_ofs + 8, sectors); | |
178 | } | |
179 | ||
6ac0e82d AZ |
180 | /* convert boot_device letter to something recognizable by the bios */ |
181 | static int boot_device2nibble(char boot_device) | |
182 | { | |
183 | switch(boot_device) { | |
184 | case 'a': | |
185 | case 'b': | |
186 | return 0x01; /* floppy boot */ | |
187 | case 'c': | |
188 | return 0x02; /* hard drive boot */ | |
189 | case 'd': | |
190 | return 0x03; /* CD-ROM boot */ | |
191 | case 'n': | |
192 | return 0x04; /* Network boot */ | |
193 | } | |
194 | return 0; | |
195 | } | |
196 | ||
0ecdffbb AJ |
197 | /* copy/pasted from cmos_init, should be made a general function |
198 | and used there as well */ | |
3b4366de | 199 | static int pc_boot_set(void *opaque, const char *boot_device) |
0ecdffbb AJ |
200 | { |
201 | #define PC_MAX_BOOT_DEVICES 3 | |
3b4366de | 202 | RTCState *s = (RTCState *)opaque; |
0ecdffbb AJ |
203 | int nbds, bds[3] = { 0, }; |
204 | int i; | |
205 | ||
206 | nbds = strlen(boot_device); | |
207 | if (nbds > PC_MAX_BOOT_DEVICES) { | |
208 | term_printf("Too many boot devices for PC\n"); | |
209 | return(1); | |
210 | } | |
211 | for (i = 0; i < nbds; i++) { | |
212 | bds[i] = boot_device2nibble(boot_device[i]); | |
213 | if (bds[i] == 0) { | |
214 | term_printf("Invalid boot device for PC: '%c'\n", | |
215 | boot_device[i]); | |
216 | return(1); | |
217 | } | |
218 | } | |
219 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); | |
220 | rtc_set_memory(s, 0x38, (bds[2] << 4)); | |
221 | return(0); | |
222 | } | |
223 | ||
ba6c2377 | 224 | /* hd_table must contain 4 block drivers */ |
00f82b8a AJ |
225 | static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
226 | const char *boot_device, BlockDriverState **hd_table) | |
80cabfad | 227 | { |
b0a21b53 | 228 | RTCState *s = rtc_state; |
28c5af54 | 229 | int nbds, bds[3] = { 0, }; |
80cabfad | 230 | int val; |
b41a2cd1 | 231 | int fd0, fd1, nb; |
ba6c2377 | 232 | int i; |
b0a21b53 | 233 | |
b0a21b53 | 234 | /* various important CMOS locations needed by PC/Bochs bios */ |
80cabfad FB |
235 | |
236 | /* memory size */ | |
333190eb FB |
237 | val = 640; /* base memory in K */ |
238 | rtc_set_memory(s, 0x15, val); | |
239 | rtc_set_memory(s, 0x16, val >> 8); | |
240 | ||
80cabfad FB |
241 | val = (ram_size / 1024) - 1024; |
242 | if (val > 65535) | |
243 | val = 65535; | |
b0a21b53 FB |
244 | rtc_set_memory(s, 0x17, val); |
245 | rtc_set_memory(s, 0x18, val >> 8); | |
246 | rtc_set_memory(s, 0x30, val); | |
247 | rtc_set_memory(s, 0x31, val >> 8); | |
80cabfad | 248 | |
00f82b8a AJ |
249 | if (above_4g_mem_size) { |
250 | rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); | |
251 | rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); | |
252 | rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); | |
253 | } | |
254 | ||
9da98861 FB |
255 | if (ram_size > (16 * 1024 * 1024)) |
256 | val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); | |
257 | else | |
258 | val = 0; | |
80cabfad FB |
259 | if (val > 65535) |
260 | val = 65535; | |
b0a21b53 FB |
261 | rtc_set_memory(s, 0x34, val); |
262 | rtc_set_memory(s, 0x35, val >> 8); | |
3b46e624 | 263 | |
298e01b6 AJ |
264 | /* set the number of CPU */ |
265 | rtc_set_memory(s, 0x5f, smp_cpus - 1); | |
266 | ||
6ac0e82d | 267 | /* set boot devices, and disable floppy signature check if requested */ |
28c5af54 JM |
268 | #define PC_MAX_BOOT_DEVICES 3 |
269 | nbds = strlen(boot_device); | |
270 | if (nbds > PC_MAX_BOOT_DEVICES) { | |
271 | fprintf(stderr, "Too many boot devices for PC\n"); | |
272 | exit(1); | |
273 | } | |
274 | for (i = 0; i < nbds; i++) { | |
275 | bds[i] = boot_device2nibble(boot_device[i]); | |
276 | if (bds[i] == 0) { | |
277 | fprintf(stderr, "Invalid boot device for PC: '%c'\n", | |
278 | boot_device[i]); | |
279 | exit(1); | |
280 | } | |
281 | } | |
282 | rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); | |
283 | rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); | |
80cabfad | 284 | |
b41a2cd1 FB |
285 | /* floppy type */ |
286 | ||
baca51fa FB |
287 | fd0 = fdctrl_get_drive_type(floppy_controller, 0); |
288 | fd1 = fdctrl_get_drive_type(floppy_controller, 1); | |
80cabfad | 289 | |
777428f2 | 290 | val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1); |
b0a21b53 | 291 | rtc_set_memory(s, 0x10, val); |
3b46e624 | 292 | |
b0a21b53 | 293 | val = 0; |
b41a2cd1 | 294 | nb = 0; |
80cabfad FB |
295 | if (fd0 < 3) |
296 | nb++; | |
297 | if (fd1 < 3) | |
298 | nb++; | |
299 | switch (nb) { | |
300 | case 0: | |
301 | break; | |
302 | case 1: | |
b0a21b53 | 303 | val |= 0x01; /* 1 drive, ready for boot */ |
80cabfad FB |
304 | break; |
305 | case 2: | |
b0a21b53 | 306 | val |= 0x41; /* 2 drives, ready for boot */ |
80cabfad FB |
307 | break; |
308 | } | |
b0a21b53 FB |
309 | val |= 0x02; /* FPU is there */ |
310 | val |= 0x04; /* PS/2 mouse installed */ | |
311 | rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); | |
312 | ||
ba6c2377 FB |
313 | /* hard drives */ |
314 | ||
315 | rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); | |
316 | if (hd_table[0]) | |
317 | cmos_init_hd(0x19, 0x1b, hd_table[0]); | |
5fafdf24 | 318 | if (hd_table[1]) |
ba6c2377 FB |
319 | cmos_init_hd(0x1a, 0x24, hd_table[1]); |
320 | ||
321 | val = 0; | |
40b6ecc6 | 322 | for (i = 0; i < 4; i++) { |
ba6c2377 | 323 | if (hd_table[i]) { |
46d4767d FB |
324 | int cylinders, heads, sectors, translation; |
325 | /* NOTE: bdrv_get_geometry_hint() returns the physical | |
326 | geometry. It is always such that: 1 <= sects <= 63, 1 | |
327 | <= heads <= 16, 1 <= cylinders <= 16383. The BIOS | |
328 | geometry can be different if a translation is done. */ | |
329 | translation = bdrv_get_translation_hint(hd_table[i]); | |
330 | if (translation == BIOS_ATA_TRANSLATION_AUTO) { | |
331 | bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); | |
332 | if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { | |
333 | /* No translation. */ | |
334 | translation = 0; | |
335 | } else { | |
336 | /* LBA translation. */ | |
337 | translation = 1; | |
338 | } | |
40b6ecc6 | 339 | } else { |
46d4767d | 340 | translation--; |
ba6c2377 | 341 | } |
ba6c2377 FB |
342 | val |= translation << (i * 2); |
343 | } | |
40b6ecc6 | 344 | } |
ba6c2377 | 345 | rtc_set_memory(s, 0x39, val); |
80cabfad FB |
346 | } |
347 | ||
59b8ad81 FB |
348 | void ioport_set_a20(int enable) |
349 | { | |
350 | /* XXX: send to all CPUs ? */ | |
351 | cpu_x86_set_a20(first_cpu, enable); | |
352 | } | |
353 | ||
354 | int ioport_get_a20(void) | |
355 | { | |
356 | return ((first_cpu->a20_mask >> 20) & 1); | |
357 | } | |
358 | ||
e1a23744 FB |
359 | static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
360 | { | |
59b8ad81 | 361 | ioport_set_a20((val >> 1) & 1); |
e1a23744 FB |
362 | /* XXX: bit 0 is fast reset */ |
363 | } | |
364 | ||
365 | static uint32_t ioport92_read(void *opaque, uint32_t addr) | |
366 | { | |
59b8ad81 | 367 | return ioport_get_a20() << 1; |
e1a23744 FB |
368 | } |
369 | ||
80cabfad FB |
370 | /***********************************************************/ |
371 | /* Bochs BIOS debug ports */ | |
372 | ||
9596ebb7 | 373 | static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
80cabfad | 374 | { |
a2f659ee FB |
375 | static const char shutdown_str[8] = "Shutdown"; |
376 | static int shutdown_index = 0; | |
3b46e624 | 377 | |
80cabfad FB |
378 | switch(addr) { |
379 | /* Bochs BIOS messages */ | |
380 | case 0x400: | |
381 | case 0x401: | |
382 | fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val); | |
383 | exit(1); | |
384 | case 0x402: | |
385 | case 0x403: | |
386 | #ifdef DEBUG_BIOS | |
387 | fprintf(stderr, "%c", val); | |
388 | #endif | |
389 | break; | |
a2f659ee FB |
390 | case 0x8900: |
391 | /* same as Bochs power off */ | |
392 | if (val == shutdown_str[shutdown_index]) { | |
393 | shutdown_index++; | |
394 | if (shutdown_index == 8) { | |
395 | shutdown_index = 0; | |
396 | qemu_system_shutdown_request(); | |
397 | } | |
398 | } else { | |
399 | shutdown_index = 0; | |
400 | } | |
401 | break; | |
80cabfad FB |
402 | |
403 | /* LGPL'ed VGA BIOS messages */ | |
404 | case 0x501: | |
405 | case 0x502: | |
406 | fprintf(stderr, "VGA BIOS panic, line %d\n", val); | |
407 | exit(1); | |
408 | case 0x500: | |
409 | case 0x503: | |
410 | #ifdef DEBUG_BIOS | |
411 | fprintf(stderr, "%c", val); | |
412 | #endif | |
413 | break; | |
414 | } | |
415 | } | |
416 | ||
9596ebb7 | 417 | static void bochs_bios_init(void) |
80cabfad | 418 | { |
b41a2cd1 FB |
419 | register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
420 | register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); | |
421 | register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); | |
422 | register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); | |
a2f659ee | 423 | register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
b41a2cd1 FB |
424 | |
425 | register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); | |
426 | register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); | |
427 | register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); | |
428 | register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); | |
80cabfad FB |
429 | } |
430 | ||
642a4f96 TS |
431 | /* Generate an initial boot sector which sets state and jump to |
432 | a specified vector */ | |
3f6c925f | 433 | static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
642a4f96 TS |
434 | { |
435 | uint8_t bootsect[512], *p; | |
436 | int i; | |
e4bcb14c | 437 | int hda; |
642a4f96 | 438 | |
e4bcb14c TS |
439 | hda = drive_get_index(IF_IDE, 0, 0); |
440 | if (hda == -1) { | |
642a4f96 | 441 | fprintf(stderr, "A disk image must be given for 'hda' when booting " |
f97572e5 | 442 | "a Linux kernel\n(if you really don't want it, use /dev/zero)\n"); |
642a4f96 TS |
443 | exit(1); |
444 | } | |
445 | ||
446 | memset(bootsect, 0, sizeof(bootsect)); | |
447 | ||
448 | /* Copy the MSDOS partition table if possible */ | |
e4bcb14c | 449 | bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1); |
642a4f96 TS |
450 | |
451 | /* Make sure we have a partition signature */ | |
452 | bootsect[510] = 0x55; | |
453 | bootsect[511] = 0xaa; | |
454 | ||
455 | /* Actual code */ | |
456 | p = bootsect; | |
457 | *p++ = 0xfa; /* CLI */ | |
458 | *p++ = 0xfc; /* CLD */ | |
459 | ||
460 | for (i = 0; i < 6; i++) { | |
461 | if (i == 1) /* Skip CS */ | |
462 | continue; | |
463 | ||
464 | *p++ = 0xb8; /* MOV AX,imm16 */ | |
465 | *p++ = segs[i]; | |
466 | *p++ = segs[i] >> 8; | |
467 | *p++ = 0x8e; /* MOV <seg>,AX */ | |
468 | *p++ = 0xc0 + (i << 3); | |
469 | } | |
470 | ||
471 | for (i = 0; i < 8; i++) { | |
472 | *p++ = 0x66; /* 32-bit operand size */ | |
473 | *p++ = 0xb8 + i; /* MOV <reg>,imm32 */ | |
474 | *p++ = gpr[i]; | |
475 | *p++ = gpr[i] >> 8; | |
476 | *p++ = gpr[i] >> 16; | |
477 | *p++ = gpr[i] >> 24; | |
478 | } | |
479 | ||
480 | *p++ = 0xea; /* JMP FAR */ | |
481 | *p++ = ip; /* IP */ | |
482 | *p++ = ip >> 8; | |
483 | *p++ = segs[1]; /* CS */ | |
484 | *p++ = segs[1] >> 8; | |
485 | ||
e4bcb14c | 486 | bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect)); |
642a4f96 | 487 | } |
80cabfad | 488 | |
642a4f96 TS |
489 | static long get_file_size(FILE *f) |
490 | { | |
491 | long where, size; | |
492 | ||
493 | /* XXX: on Unix systems, using fstat() probably makes more sense */ | |
494 | ||
495 | where = ftell(f); | |
496 | fseek(f, 0, SEEK_END); | |
497 | size = ftell(f); | |
498 | fseek(f, where, SEEK_SET); | |
499 | ||
500 | return size; | |
501 | } | |
502 | ||
503 | static void load_linux(const char *kernel_filename, | |
504 | const char *initrd_filename, | |
505 | const char *kernel_cmdline) | |
506 | { | |
507 | uint16_t protocol; | |
508 | uint32_t gpr[8]; | |
509 | uint16_t seg[6]; | |
510 | uint16_t real_seg; | |
511 | int setup_size, kernel_size, initrd_size, cmdline_size; | |
512 | uint32_t initrd_max; | |
513 | uint8_t header[1024]; | |
a37af289 | 514 | target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr; |
642a4f96 TS |
515 | FILE *f, *fi; |
516 | ||
517 | /* Align to 16 bytes as a paranoia measure */ | |
518 | cmdline_size = (strlen(kernel_cmdline)+16) & ~15; | |
519 | ||
520 | /* load the kernel header */ | |
521 | f = fopen(kernel_filename, "rb"); | |
522 | if (!f || !(kernel_size = get_file_size(f)) || | |
523 | fread(header, 1, 1024, f) != 1024) { | |
524 | fprintf(stderr, "qemu: could not load kernel '%s'\n", | |
525 | kernel_filename); | |
526 | exit(1); | |
527 | } | |
528 | ||
529 | /* kernel protocol version */ | |
bc4edd79 | 530 | #if 0 |
642a4f96 | 531 | fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202)); |
bc4edd79 | 532 | #endif |
642a4f96 TS |
533 | if (ldl_p(header+0x202) == 0x53726448) |
534 | protocol = lduw_p(header+0x206); | |
535 | else | |
536 | protocol = 0; | |
537 | ||
538 | if (protocol < 0x200 || !(header[0x211] & 0x01)) { | |
539 | /* Low kernel */ | |
a37af289 BS |
540 | real_addr = 0x90000; |
541 | cmdline_addr = 0x9a000 - cmdline_size; | |
542 | prot_addr = 0x10000; | |
642a4f96 TS |
543 | } else if (protocol < 0x202) { |
544 | /* High but ancient kernel */ | |
a37af289 BS |
545 | real_addr = 0x90000; |
546 | cmdline_addr = 0x9a000 - cmdline_size; | |
547 | prot_addr = 0x100000; | |
642a4f96 TS |
548 | } else { |
549 | /* High and recent kernel */ | |
a37af289 BS |
550 | real_addr = 0x10000; |
551 | cmdline_addr = 0x20000; | |
552 | prot_addr = 0x100000; | |
642a4f96 TS |
553 | } |
554 | ||
bc4edd79 | 555 | #if 0 |
642a4f96 | 556 | fprintf(stderr, |
526ccb7a AZ |
557 | "qemu: real_addr = 0x" TARGET_FMT_plx "\n" |
558 | "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n" | |
559 | "qemu: prot_addr = 0x" TARGET_FMT_plx "\n", | |
a37af289 BS |
560 | real_addr, |
561 | cmdline_addr, | |
562 | prot_addr); | |
bc4edd79 | 563 | #endif |
642a4f96 TS |
564 | |
565 | /* highest address for loading the initrd */ | |
566 | if (protocol >= 0x203) | |
567 | initrd_max = ldl_p(header+0x22c); | |
568 | else | |
569 | initrd_max = 0x37ffffff; | |
570 | ||
571 | if (initrd_max >= ram_size-ACPI_DATA_SIZE) | |
572 | initrd_max = ram_size-ACPI_DATA_SIZE-1; | |
573 | ||
574 | /* kernel command line */ | |
a37af289 | 575 | pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline); |
642a4f96 TS |
576 | |
577 | if (protocol >= 0x202) { | |
a37af289 | 578 | stl_p(header+0x228, cmdline_addr); |
642a4f96 TS |
579 | } else { |
580 | stw_p(header+0x20, 0xA33F); | |
581 | stw_p(header+0x22, cmdline_addr-real_addr); | |
582 | } | |
583 | ||
584 | /* loader type */ | |
585 | /* High nybble = B reserved for Qemu; low nybble is revision number. | |
586 | If this code is substantially changed, you may want to consider | |
587 | incrementing the revision. */ | |
588 | if (protocol >= 0x200) | |
589 | header[0x210] = 0xB0; | |
590 | ||
591 | /* heap */ | |
592 | if (protocol >= 0x201) { | |
593 | header[0x211] |= 0x80; /* CAN_USE_HEAP */ | |
594 | stw_p(header+0x224, cmdline_addr-real_addr-0x200); | |
595 | } | |
596 | ||
597 | /* load initrd */ | |
598 | if (initrd_filename) { | |
599 | if (protocol < 0x200) { | |
600 | fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n"); | |
601 | exit(1); | |
602 | } | |
603 | ||
604 | fi = fopen(initrd_filename, "rb"); | |
605 | if (!fi) { | |
606 | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n", | |
607 | initrd_filename); | |
608 | exit(1); | |
609 | } | |
610 | ||
611 | initrd_size = get_file_size(fi); | |
a37af289 | 612 | initrd_addr = (initrd_max-initrd_size) & ~4095; |
642a4f96 | 613 | |
526ccb7a AZ |
614 | fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx |
615 | "\n", initrd_size, initrd_addr); | |
642a4f96 | 616 | |
a37af289 | 617 | if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) { |
642a4f96 TS |
618 | fprintf(stderr, "qemu: read error on initial ram disk '%s'\n", |
619 | initrd_filename); | |
620 | exit(1); | |
621 | } | |
622 | fclose(fi); | |
623 | ||
a37af289 | 624 | stl_p(header+0x218, initrd_addr); |
642a4f96 TS |
625 | stl_p(header+0x21c, initrd_size); |
626 | } | |
627 | ||
628 | /* store the finalized header and load the rest of the kernel */ | |
a37af289 | 629 | cpu_physical_memory_write(real_addr, header, 1024); |
642a4f96 TS |
630 | |
631 | setup_size = header[0x1f1]; | |
632 | if (setup_size == 0) | |
633 | setup_size = 4; | |
634 | ||
635 | setup_size = (setup_size+1)*512; | |
636 | kernel_size -= setup_size; /* Size of protected-mode code */ | |
637 | ||
a37af289 BS |
638 | if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) || |
639 | !fread_targphys_ok(prot_addr, kernel_size, f)) { | |
642a4f96 TS |
640 | fprintf(stderr, "qemu: read error on kernel '%s'\n", |
641 | kernel_filename); | |
642 | exit(1); | |
643 | } | |
644 | fclose(f); | |
645 | ||
646 | /* generate bootsector to set up the initial register state */ | |
a37af289 | 647 | real_seg = real_addr >> 4; |
642a4f96 TS |
648 | seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
649 | seg[1] = real_seg+0x20; /* CS */ | |
650 | memset(gpr, 0, sizeof gpr); | |
651 | gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ | |
652 | ||
653 | generate_bootsect(gpr, seg, 0); | |
654 | } | |
655 | ||
59b8ad81 FB |
656 | static void main_cpu_reset(void *opaque) |
657 | { | |
658 | CPUState *env = opaque; | |
659 | cpu_reset(env); | |
660 | } | |
661 | ||
b41a2cd1 FB |
662 | static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
663 | static const int ide_iobase2[2] = { 0x3f6, 0x376 }; | |
664 | static const int ide_irq[2] = { 14, 15 }; | |
665 | ||
666 | #define NE2000_NB_MAX 6 | |
667 | ||
8d11df9e | 668 | static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
b41a2cd1 FB |
669 | static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
670 | ||
8d11df9e FB |
671 | static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
672 | static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; | |
673 | ||
6508fe59 FB |
674 | static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
675 | static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; | |
676 | ||
6a36d84e | 677 | #ifdef HAS_AUDIO |
d537cf6c | 678 | static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
6a36d84e FB |
679 | { |
680 | struct soundhw *c; | |
681 | int audio_enabled = 0; | |
682 | ||
683 | for (c = soundhw; !audio_enabled && c->name; ++c) { | |
684 | audio_enabled = c->enabled; | |
685 | } | |
686 | ||
687 | if (audio_enabled) { | |
688 | AudioState *s; | |
689 | ||
690 | s = AUD_init (); | |
691 | if (s) { | |
692 | for (c = soundhw; c->name; ++c) { | |
693 | if (c->enabled) { | |
694 | if (c->isa) { | |
d537cf6c | 695 | c->init.init_isa (s, pic); |
6a36d84e FB |
696 | } |
697 | else { | |
698 | if (pci_bus) { | |
699 | c->init.init_pci (pci_bus, s); | |
700 | } | |
701 | } | |
702 | } | |
703 | } | |
704 | } | |
705 | } | |
706 | } | |
707 | #endif | |
708 | ||
d537cf6c | 709 | static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
a41b2ff2 PB |
710 | { |
711 | static int nb_ne2k = 0; | |
712 | ||
713 | if (nb_ne2k == NE2000_NB_MAX) | |
714 | return; | |
d537cf6c | 715 | isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
a41b2ff2 PB |
716 | nb_ne2k++; |
717 | } | |
718 | ||
80cabfad | 719 | /* PC hardware initialisation */ |
00f82b8a | 720 | static void pc_init1(ram_addr_t ram_size, int vga_ram_size, |
b881c2c6 | 721 | const char *boot_device, DisplayState *ds, |
b5ff2d6e | 722 | const char *kernel_filename, const char *kernel_cmdline, |
3dbbdc25 | 723 | const char *initrd_filename, |
a049de61 | 724 | int pci_enabled, const char *cpu_model) |
80cabfad FB |
725 | { |
726 | char buf[1024]; | |
642a4f96 | 727 | int ret, linux_boot, i; |
970ac5a3 | 728 | ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
00f82b8a | 729 | ram_addr_t below_4g_mem_size, above_4g_mem_size = 0; |
970ac5a3 | 730 | int bios_size, isa_bios_size, vga_bios_size; |
46e50e9d | 731 | PCIBus *pci_bus; |
5c3ff3a7 | 732 | int piix3_devfn = -1; |
59b8ad81 | 733 | CPUState *env; |
a41b2ff2 | 734 | NICInfo *nd; |
d537cf6c PB |
735 | qemu_irq *cpu_irq; |
736 | qemu_irq *i8259; | |
e4bcb14c TS |
737 | int index; |
738 | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; | |
739 | BlockDriverState *fd[MAX_FD]; | |
d592d303 | 740 | |
00f82b8a AJ |
741 | if (ram_size >= 0xe0000000 ) { |
742 | above_4g_mem_size = ram_size - 0xe0000000; | |
743 | below_4g_mem_size = 0xe0000000; | |
744 | } else { | |
745 | below_4g_mem_size = ram_size; | |
746 | } | |
747 | ||
80cabfad FB |
748 | linux_boot = (kernel_filename != NULL); |
749 | ||
59b8ad81 | 750 | /* init CPUs */ |
a049de61 FB |
751 | if (cpu_model == NULL) { |
752 | #ifdef TARGET_X86_64 | |
753 | cpu_model = "qemu64"; | |
754 | #else | |
755 | cpu_model = "qemu32"; | |
756 | #endif | |
757 | } | |
758 | ||
59b8ad81 | 759 | for(i = 0; i < smp_cpus; i++) { |
aaed909a FB |
760 | env = cpu_init(cpu_model); |
761 | if (!env) { | |
762 | fprintf(stderr, "Unable to find x86 CPU definition\n"); | |
763 | exit(1); | |
764 | } | |
59b8ad81 | 765 | if (i != 0) |
ce5232c5 | 766 | env->halted = 1; |
59b8ad81 FB |
767 | if (smp_cpus > 1) { |
768 | /* XXX: enable it in all cases */ | |
769 | env->cpuid_features |= CPUID_APIC; | |
770 | } | |
59b8ad81 FB |
771 | qemu_register_reset(main_cpu_reset, env); |
772 | if (pci_enabled) { | |
773 | apic_init(env); | |
774 | } | |
775 | } | |
776 | ||
26fb5e48 AJ |
777 | vmport_init(); |
778 | ||
80cabfad | 779 | /* allocate RAM */ |
970ac5a3 | 780 | ram_addr = qemu_ram_alloc(ram_size); |
00f82b8a AJ |
781 | cpu_register_physical_memory(0, below_4g_mem_size, ram_addr); |
782 | ||
783 | /* above 4giga memory allocation */ | |
784 | if (above_4g_mem_size > 0) { | |
526ccb7a AZ |
785 | cpu_register_physical_memory((target_phys_addr_t) 0x100000000ULL, |
786 | above_4g_mem_size, | |
00f82b8a AJ |
787 | ram_addr + below_4g_mem_size); |
788 | } | |
80cabfad | 789 | |
970ac5a3 FB |
790 | /* allocate VGA RAM */ |
791 | vga_ram_addr = qemu_ram_alloc(vga_ram_size); | |
7587cf44 | 792 | |
970ac5a3 | 793 | /* BIOS load */ |
1192dad8 JM |
794 | if (bios_name == NULL) |
795 | bios_name = BIOS_FILENAME; | |
796 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); | |
7587cf44 | 797 | bios_size = get_image_size(buf); |
5fafdf24 | 798 | if (bios_size <= 0 || |
970ac5a3 | 799 | (bios_size % 65536) != 0) { |
7587cf44 FB |
800 | goto bios_error; |
801 | } | |
970ac5a3 | 802 | bios_offset = qemu_ram_alloc(bios_size); |
7587cf44 FB |
803 | ret = load_image(buf, phys_ram_base + bios_offset); |
804 | if (ret != bios_size) { | |
805 | bios_error: | |
970ac5a3 | 806 | fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf); |
80cabfad FB |
807 | exit(1); |
808 | } | |
7587cf44 | 809 | |
80cabfad | 810 | /* VGA BIOS load */ |
de9258a8 FB |
811 | if (cirrus_vga_enabled) { |
812 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); | |
813 | } else { | |
814 | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); | |
815 | } | |
970ac5a3 | 816 | vga_bios_size = get_image_size(buf); |
5fafdf24 | 817 | if (vga_bios_size <= 0 || vga_bios_size > 65536) |
970ac5a3 FB |
818 | goto vga_bios_error; |
819 | vga_bios_offset = qemu_ram_alloc(65536); | |
820 | ||
7587cf44 | 821 | ret = load_image(buf, phys_ram_base + vga_bios_offset); |
970ac5a3 FB |
822 | if (ret != vga_bios_size) { |
823 | vga_bios_error: | |
824 | fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf); | |
825 | exit(1); | |
826 | } | |
827 | ||
80cabfad | 828 | /* setup basic memory access */ |
5fafdf24 | 829 | cpu_register_physical_memory(0xc0000, 0x10000, |
7587cf44 FB |
830 | vga_bios_offset | IO_MEM_ROM); |
831 | ||
832 | /* map the last 128KB of the BIOS in ISA space */ | |
833 | isa_bios_size = bios_size; | |
834 | if (isa_bios_size > (128 * 1024)) | |
835 | isa_bios_size = 128 * 1024; | |
5fafdf24 | 836 | cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
7587cf44 | 837 | IO_MEM_UNASSIGNED); |
5fafdf24 TS |
838 | cpu_register_physical_memory(0x100000 - isa_bios_size, |
839 | isa_bios_size, | |
7587cf44 | 840 | (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
9ae02555 | 841 | |
970ac5a3 FB |
842 | { |
843 | ram_addr_t option_rom_offset; | |
844 | int size, offset; | |
845 | ||
846 | offset = 0; | |
847 | for (i = 0; i < nb_option_roms; i++) { | |
848 | size = get_image_size(option_rom[i]); | |
849 | if (size < 0) { | |
5fafdf24 | 850 | fprintf(stderr, "Could not load option rom '%s'\n", |
970ac5a3 FB |
851 | option_rom[i]); |
852 | exit(1); | |
853 | } | |
854 | if (size > (0x10000 - offset)) | |
855 | goto option_rom_error; | |
856 | option_rom_offset = qemu_ram_alloc(size); | |
857 | ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); | |
858 | if (ret != size) { | |
859 | option_rom_error: | |
860 | fprintf(stderr, "Too many option ROMS\n"); | |
861 | exit(1); | |
862 | } | |
863 | size = (size + 4095) & ~4095; | |
864 | cpu_register_physical_memory(0xd0000 + offset, | |
865 | size, option_rom_offset | IO_MEM_ROM); | |
866 | offset += size; | |
867 | } | |
9ae02555 TS |
868 | } |
869 | ||
7587cf44 | 870 | /* map all the bios at the top of memory */ |
5fafdf24 | 871 | cpu_register_physical_memory((uint32_t)(-bios_size), |
7587cf44 | 872 | bios_size, bios_offset | IO_MEM_ROM); |
3b46e624 | 873 | |
80cabfad FB |
874 | bochs_bios_init(); |
875 | ||
642a4f96 TS |
876 | if (linux_boot) |
877 | load_linux(kernel_filename, initrd_filename, kernel_cmdline); | |
80cabfad | 878 | |
a5b38b51 | 879 | cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1); |
d537cf6c PB |
880 | i8259 = i8259_init(cpu_irq[0]); |
881 | ferr_irq = i8259[13]; | |
882 | ||
69b91039 | 883 | if (pci_enabled) { |
d537cf6c | 884 | pci_bus = i440fx_init(&i440fx_state, i8259); |
8f1c91d8 | 885 | piix3_devfn = piix3_init(pci_bus, -1); |
46e50e9d FB |
886 | } else { |
887 | pci_bus = NULL; | |
69b91039 FB |
888 | } |
889 | ||
80cabfad | 890 | /* init basic PC hardware */ |
b41a2cd1 | 891 | register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
80cabfad | 892 | |
f929aad6 FB |
893 | register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
894 | ||
1f04275e FB |
895 | if (cirrus_vga_enabled) { |
896 | if (pci_enabled) { | |
5fafdf24 TS |
897 | pci_cirrus_vga_init(pci_bus, |
898 | ds, phys_ram_base + vga_ram_addr, | |
970ac5a3 | 899 | vga_ram_addr, vga_ram_size); |
1f04275e | 900 | } else { |
5fafdf24 | 901 | isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
970ac5a3 | 902 | vga_ram_addr, vga_ram_size); |
1f04275e | 903 | } |
d34cab9f TS |
904 | } else if (vmsvga_enabled) { |
905 | if (pci_enabled) | |
45e4522e AZ |
906 | pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
907 | vga_ram_addr, vga_ram_size); | |
d34cab9f TS |
908 | else |
909 | fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__); | |
1f04275e | 910 | } else { |
89b6b508 | 911 | if (pci_enabled) { |
5fafdf24 | 912 | pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
970ac5a3 | 913 | vga_ram_addr, vga_ram_size, 0, 0); |
89b6b508 | 914 | } else { |
5fafdf24 | 915 | isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
970ac5a3 | 916 | vga_ram_addr, vga_ram_size); |
89b6b508 | 917 | } |
1f04275e | 918 | } |
80cabfad | 919 | |
d537cf6c | 920 | rtc_state = rtc_init(0x70, i8259[8]); |
80cabfad | 921 | |
3b4366de BS |
922 | qemu_register_boot_set(pc_boot_set, rtc_state); |
923 | ||
e1a23744 FB |
924 | register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
925 | register_ioport_write(0x92, 1, 1, ioport92_write, NULL); | |
926 | ||
d592d303 | 927 | if (pci_enabled) { |
d592d303 FB |
928 | ioapic = ioapic_init(); |
929 | } | |
d537cf6c | 930 | pit = pit_init(0x40, i8259[0]); |
fd06c375 | 931 | pcspk_init(pit); |
d592d303 FB |
932 | if (pci_enabled) { |
933 | pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); | |
934 | } | |
b41a2cd1 | 935 | |
8d11df9e FB |
936 | for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
937 | if (serial_hds[i]) { | |
b6cd0ea1 AJ |
938 | serial_init(serial_io[i], i8259[serial_irq[i]], 115200, |
939 | serial_hds[i]); | |
8d11df9e FB |
940 | } |
941 | } | |
b41a2cd1 | 942 | |
6508fe59 FB |
943 | for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
944 | if (parallel_hds[i]) { | |
d537cf6c PB |
945 | parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
946 | parallel_hds[i]); | |
6508fe59 FB |
947 | } |
948 | } | |
949 | ||
a41b2ff2 PB |
950 | for(i = 0; i < nb_nics; i++) { |
951 | nd = &nd_table[i]; | |
952 | if (!nd->model) { | |
953 | if (pci_enabled) { | |
954 | nd->model = "ne2k_pci"; | |
955 | } else { | |
956 | nd->model = "ne2k_isa"; | |
957 | } | |
69b91039 | 958 | } |
a41b2ff2 | 959 | if (strcmp(nd->model, "ne2k_isa") == 0) { |
d537cf6c | 960 | pc_init_ne2k_isa(nd, i8259); |
a41b2ff2 | 961 | } else if (pci_enabled) { |
c4a7060c BS |
962 | if (strcmp(nd->model, "?") == 0) |
963 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n"); | |
abcebc7e | 964 | pci_nic_init(pci_bus, nd, -1); |
c4a7060c BS |
965 | } else if (strcmp(nd->model, "?") == 0) { |
966 | fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n"); | |
967 | exit(1); | |
a41b2ff2 PB |
968 | } else { |
969 | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model); | |
970 | exit(1); | |
69b91039 | 971 | } |
a41b2ff2 | 972 | } |
b41a2cd1 | 973 | |
e4bcb14c TS |
974 | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) { |
975 | fprintf(stderr, "qemu: too many IDE bus\n"); | |
976 | exit(1); | |
977 | } | |
978 | ||
979 | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { | |
980 | index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); | |
981 | if (index != -1) | |
982 | hd[i] = drives_table[index].bdrv; | |
983 | else | |
984 | hd[i] = NULL; | |
985 | } | |
986 | ||
a41b2ff2 | 987 | if (pci_enabled) { |
e4bcb14c | 988 | pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259); |
a41b2ff2 | 989 | } else { |
e4bcb14c | 990 | for(i = 0; i < MAX_IDE_BUS; i++) { |
d537cf6c | 991 | isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
e4bcb14c | 992 | hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]); |
69b91039 | 993 | } |
b41a2cd1 | 994 | } |
69b91039 | 995 | |
d537cf6c | 996 | i8042_init(i8259[1], i8259[12], 0x60); |
7c29d0c0 | 997 | DMA_init(0); |
6a36d84e | 998 | #ifdef HAS_AUDIO |
d537cf6c | 999 | audio_init(pci_enabled ? pci_bus : NULL, i8259); |
fb065187 | 1000 | #endif |
80cabfad | 1001 | |
e4bcb14c TS |
1002 | for(i = 0; i < MAX_FD; i++) { |
1003 | index = drive_get_index(IF_FLOPPY, 0, i); | |
1004 | if (index != -1) | |
1005 | fd[i] = drives_table[index].bdrv; | |
1006 | else | |
1007 | fd[i] = NULL; | |
1008 | } | |
1009 | floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); | |
b41a2cd1 | 1010 | |
00f82b8a | 1011 | cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd); |
69b91039 | 1012 | |
bb36d470 | 1013 | if (pci_enabled && usb_enabled) { |
afcc3cdf | 1014 | usb_uhci_piix3_init(pci_bus, piix3_devfn + 2); |
bb36d470 FB |
1015 | } |
1016 | ||
6515b203 | 1017 | if (pci_enabled && acpi_enabled) { |
3fffc223 | 1018 | uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
0ff596d0 PB |
1019 | i2c_bus *smbus; |
1020 | ||
1021 | /* TODO: Populate SPD eeprom data. */ | |
cf7a2fe2 | 1022 | smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]); |
3fffc223 | 1023 | for (i = 0; i < 8; i++) { |
0ff596d0 | 1024 | smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
3fffc223 | 1025 | } |
6515b203 | 1026 | } |
3b46e624 | 1027 | |
a5954d5c FB |
1028 | if (i440fx_state) { |
1029 | i440fx_init_memory_mappings(i440fx_state); | |
1030 | } | |
e4bcb14c | 1031 | |
7d8406be | 1032 | if (pci_enabled) { |
e4bcb14c TS |
1033 | int max_bus; |
1034 | int bus, unit; | |
7d8406be | 1035 | void *scsi; |
96d30e48 | 1036 | |
e4bcb14c TS |
1037 | max_bus = drive_get_max_bus(IF_SCSI); |
1038 | ||
1039 | for (bus = 0; bus <= max_bus; bus++) { | |
1040 | scsi = lsi_scsi_init(pci_bus, -1); | |
1041 | for (unit = 0; unit < LSI_MAX_DEVS; unit++) { | |
1042 | index = drive_get_index(IF_SCSI, bus, unit); | |
1043 | if (index == -1) | |
1044 | continue; | |
1045 | lsi_scsi_attach(scsi, drives_table[index].bdrv, unit); | |
1046 | } | |
1047 | } | |
7d8406be | 1048 | } |
80cabfad | 1049 | } |
b5ff2d6e | 1050 | |
00f82b8a | 1051 | static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size, |
b881c2c6 | 1052 | const char *boot_device, DisplayState *ds, |
5fafdf24 | 1053 | const char *kernel_filename, |
3dbbdc25 | 1054 | const char *kernel_cmdline, |
94fc95cd JM |
1055 | const char *initrd_filename, |
1056 | const char *cpu_model) | |
3dbbdc25 | 1057 | { |
b881c2c6 | 1058 | pc_init1(ram_size, vga_ram_size, boot_device, ds, |
3dbbdc25 | 1059 | kernel_filename, kernel_cmdline, |
a049de61 | 1060 | initrd_filename, 1, cpu_model); |
3dbbdc25 FB |
1061 | } |
1062 | ||
00f82b8a | 1063 | static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size, |
b881c2c6 | 1064 | const char *boot_device, DisplayState *ds, |
5fafdf24 | 1065 | const char *kernel_filename, |
3dbbdc25 | 1066 | const char *kernel_cmdline, |
94fc95cd JM |
1067 | const char *initrd_filename, |
1068 | const char *cpu_model) | |
3dbbdc25 | 1069 | { |
b881c2c6 | 1070 | pc_init1(ram_size, vga_ram_size, boot_device, ds, |
3dbbdc25 | 1071 | kernel_filename, kernel_cmdline, |
a049de61 | 1072 | initrd_filename, 0, cpu_model); |
3dbbdc25 FB |
1073 | } |
1074 | ||
b5ff2d6e | 1075 | QEMUMachine pc_machine = { |
a245f2e7 AJ |
1076 | .name = "pc", |
1077 | .desc = "Standard PC", | |
1078 | .init = pc_init_pci, | |
1079 | .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, | |
3dbbdc25 FB |
1080 | }; |
1081 | ||
1082 | QEMUMachine isapc_machine = { | |
a245f2e7 AJ |
1083 | .name = "isapc", |
1084 | .desc = "ISA-only PC", | |
1085 | .init = pc_init_isa, | |
1086 | .ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, | |
b5ff2d6e | 1087 | }; |