[mirror_qemu.git] / hw / pc_piix.c

/*
 * QEMU PC System Emulator
 *
 * Copyright (c) 2003-2004 Fabrice Bellard
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */

#include "hw.h"
#include "pc.h"
#include "apic.h"
#include "pci.h"
#include "usb-uhci.h"
#include "usb-ohci.h"
#include "net.h"
#include "boards.h"
#include "ide.h"
#include "kvm.h"
#include "sysemu.h"
#include "sysbus.h"
#include "blockdev.h"

#define MAX_IDE_BUS 2

static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };

static void ioapic_init(IsaIrqState *isa_irq_state)
{
    DeviceState *dev;
    SysBusDevice *d;
    unsigned int i;

    dev = qdev_create(NULL, "ioapic");
    qdev_init_nofail(dev);
    d = sysbus_from_qdev(dev);
    sysbus_mmio_map(d, 0, 0xfec00000);

    for (i = 0; i < IOAPIC_NUM_PINS; i++) {
        isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
    }
}

/* PC hardware initialisation */
static void pc_init1(ram_addr_t ram_size,
                     const char *boot_device,
                     const char *kernel_filename,
                     const char *kernel_cmdline,
                     const char *initrd_filename,
                     const char *cpu_model,
                     int pci_enabled)
{
    int i;
    ram_addr_t below_4g_mem_size, above_4g_mem_size;
    PCIBus *pci_bus;
    PCII440FXState *i440fx_state;
    int piix3_devfn = -1;
    qemu_irq *cpu_irq;
    qemu_irq *isa_irq;
    qemu_irq *i8259;
    qemu_irq *cmos_s3;
    qemu_irq *smi_irq;
    IsaIrqState *isa_irq_state;
    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
    FDCtrl *floppy_controller;
    BusState *idebus[MAX_IDE_BUS];
    ISADevice *rtc_state;

    pc_cpus_init(cpu_model);

    vmport_init();

    /* allocate ram and load rom/bios */
    pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
                   &below_4g_mem_size, &above_4g_mem_size);

    cpu_irq = pc_allocate_cpu_irq();
    i8259 = i8259_init(cpu_irq[0]);
    isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
    isa_irq_state->i8259 = i8259;
    if (pci_enabled) {
        ioapic_init(isa_irq_state);
    }
    isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);

    if (pci_enabled) {
        pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
    } else {
        pci_bus = NULL;
        i440fx_state = NULL;
        isa_bus_new(NULL);
    }
    isa_bus_irqs(isa_irq);

    pc_register_ferr_irq(isa_reserve_irq(13));

    pc_vga_init(pci_enabled? pci_bus: NULL);

    /* init basic PC hardware */
    pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);

    for(i = 0; i < nb_nics; i++) {
        NICInfo *nd = &nd_table[i];

        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
            pc_init_ne2k_isa(nd);
        else
            pci_nic_init_nofail(nd, "e1000", NULL);
    }

    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
        fprintf(stderr, "qemu: too many IDE bus\n");
        exit(1);
    }

    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
        hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
    }

    if (pci_enabled) {
        PCIDevice *dev;
        dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
        idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
        idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
    } else {
        for(i = 0; i < MAX_IDE_BUS; i++) {
            ISADevice *dev;
            dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
                               hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
            idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
        }
    }

    pc_audio_init(pci_enabled ? pci_bus : NULL, isa_irq);

    pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
                 idebus[0], idebus[1], floppy_controller, rtc_state);

    if (pci_enabled && usb_enabled) {
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
    }

    if (pci_enabled && acpi_enabled) {
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
        i2c_bus *smbus;

        cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
        smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
        /* TODO: Populate SPD eeprom data.  */
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
                              isa_reserve_irq(9), *cmos_s3, *smi_irq,
                              kvm_enabled());
        for (i = 0; i < 8; i++) {
            DeviceState *eeprom;
            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
            qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
            qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
            qdev_init_nofail(eeprom);
        }
    }

    if (i440fx_state) {
        i440fx_init_memory_mappings(i440fx_state);
    }

    if (pci_enabled) {
        pc_pci_device_init(pci_bus);
    }
}

static void pc_init_pci(ram_addr_t ram_size,
                        const char *boot_device,
                        const char *kernel_filename,
                        const char *kernel_cmdline,
                        const char *initrd_filename,
                        const char *cpu_model)
{
    pc_init1(ram_size, boot_device,
             kernel_filename, kernel_cmdline,
             initrd_filename, cpu_model, 1);
}

static void pc_init_isa(ram_addr_t ram_size,
                        const char *boot_device,
                        const char *kernel_filename,
                        const char *kernel_cmdline,
                        const char *initrd_filename,
                        const char *cpu_model)
{
    if (cpu_model == NULL)
        cpu_model = "486";
    pc_init1(ram_size, boot_device,
             kernel_filename, kernel_cmdline,
             initrd_filename, cpu_model, 0);
}

static QEMUMachine pc_machine = {
    .name = "pc-0.14",
    .alias = "pc",
    .desc = "Standard PC",
    .init = pc_init_pci,
    .max_cpus = 255,
    .is_default = 1,
};

static QEMUMachine pc_machine_v0_13 = {
    .name = "pc-0.13",
    .desc = "Standard PC",
    .init = pc_init_pci,
    .max_cpus = 255,
};

static QEMUMachine pc_machine_v0_12 = {
    .name = "pc-0.12",
    .desc = "Standard PC",
    .init = pc_init_pci,
    .max_cpus = 255,
    .compat_props = (GlobalProperty[]) {
        {
            .driver   = "virtio-serial-pci",
            .property = "max_ports",
            .value    = stringify(1),
        },{
            .driver   = "virtio-serial-pci",
            .property = "vectors",
            .value    = stringify(0),
        },
        { /* end of list */ }
    }
};

static QEMUMachine pc_machine_v0_11 = {
    .name = "pc-0.11",
    .desc = "Standard PC, qemu 0.11",
    .init = pc_init_pci,
    .max_cpus = 255,
    .compat_props = (GlobalProperty[]) {
        {
            .driver   = "virtio-blk-pci",
            .property = "vectors",
            .value    = stringify(0),
        },{
            .driver   = "virtio-serial-pci",
            .property = "max_ports",
            .value    = stringify(1),
        },{
            .driver   = "virtio-serial-pci",
            .property = "vectors",
            .value    = stringify(0),
        },{
            .driver   = "ide-drive",
            .property = "ver",
            .value    = "0.11",
        },{
            .driver   = "scsi-disk",
            .property = "ver",
            .value    = "0.11",
        },{
            .driver   = "PCI",
            .property = "rombar",
            .value    = stringify(0),
        },
        { /* end of list */ }
    }
};

static QEMUMachine pc_machine_v0_10 = {
    .name = "pc-0.10",
    .desc = "Standard PC, qemu 0.10",
    .init = pc_init_pci,
    .max_cpus = 255,
    .compat_props = (GlobalProperty[]) {
        {
            .driver   = "virtio-blk-pci",
            .property = "class",
            .value    = stringify(PCI_CLASS_STORAGE_OTHER),
        },{
            .driver   = "virtio-serial-pci",
            .property = "class",
            .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
        },{
            .driver   = "virtio-serial-pci",
            .property = "max_ports",
            .value    = stringify(1),
        },{
            .driver   = "virtio-serial-pci",
            .property = "vectors",
            .value    = stringify(0),
        },{
            .driver   = "virtio-net-pci",
            .property = "vectors",
            .value    = stringify(0),
        },{
            .driver   = "virtio-blk-pci",
            .property = "vectors",
            .value    = stringify(0),
        },{
            .driver   = "ide-drive",
            .property = "ver",
            .value    = "0.10",
        },{
            .driver   = "scsi-disk",
            .property = "ver",
            .value    = "0.10",
        },{
            .driver   = "PCI",
            .property = "rombar",
            .value    = stringify(0),
        },
        { /* end of list */ }
    },
};

static QEMUMachine isapc_machine = {
    .name = "isapc",
    .desc = "ISA-only PC",
    .init = pc_init_isa,
    .max_cpus = 1,
};

static void pc_machine_init(void)
{
    qemu_register_machine(&pc_machine);
    qemu_register_machine(&pc_machine_v0_13);
    qemu_register_machine(&pc_machine_v0_12);
    qemu_register_machine(&pc_machine_v0_11);
    qemu_register_machine(&pc_machine_v0_10);
    qemu_register_machine(&isapc_machine);
}

machine_init(pc_machine_init);
Commit	Line	Data
845773ab IY	1	/*
	2	* QEMU PC System Emulator
	3	*
	4	* Copyright (c) 2003-2004 Fabrice Bellard
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
	24
	25	#include "hw.h"
	26	#include "pc.h"
	27	#include "apic.h"
	28	#include "pci.h"
	29	#include "usb-uhci.h"
	30	#include "usb-ohci.h"
	31	#include "net.h"
	32	#include "boards.h"
	33	#include "ide.h"
	34	#include "kvm.h"
666daa68	35	#include "sysemu.h"
96051119	36	#include "sysbus.h"
2446333c	37	#include "blockdev.h"
845773ab IY	38
	39	#define MAX_IDE_BUS 2
	40
	41	static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
	42	static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
	43	static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
	44
96051119 BS	45	static void ioapic_init(IsaIrqState *isa_irq_state)
	46	{
	47	DeviceState *dev;
	48	SysBusDevice *d;
	49	unsigned int i;
	50
	51	dev = qdev_create(NULL, "ioapic");
	52	qdev_init_nofail(dev);
	53	d = sysbus_from_qdev(dev);
	54	sysbus_mmio_map(d, 0, 0xfec00000);
	55
	56	for (i = 0; i < IOAPIC_NUM_PINS; i++) {
	57	isa_irq_state->ioapic[i] = qdev_get_gpio_in(dev, i);
	58	}
	59	}
	60
845773ab IY	61	/* PC hardware initialisation */
	62	static void pc_init1(ram_addr_t ram_size,
	63	const char *boot_device,
	64	const char *kernel_filename,
	65	const char *kernel_cmdline,
	66	const char *initrd_filename,
	67	const char *cpu_model,
	68	int pci_enabled)
	69	{
	70	int i;
	71	ram_addr_t below_4g_mem_size, above_4g_mem_size;
	72	PCIBus *pci_bus;
	73	PCII440FXState *i440fx_state;
	74	int piix3_devfn = -1;
	75	qemu_irq *cpu_irq;
	76	qemu_irq *isa_irq;
	77	qemu_irq *i8259;
	78	qemu_irq *cmos_s3;
	79	qemu_irq *smi_irq;
	80	IsaIrqState *isa_irq_state;
	81	DriveInfo hd[MAX_IDE_BUS MAX_IDE_DEVS];
	82	FDCtrl *floppy_controller;
c0897e0c	83	BusState *idebus[MAX_IDE_BUS];
1d914fa0	84	ISADevice *rtc_state;
845773ab IY	85
	86	pc_cpus_init(cpu_model);
	87
	88	vmport_init();
	89
	90	/* allocate ram and load rom/bios */
	91	pc_memory_init(ram_size, kernel_filename, kernel_cmdline, initrd_filename,
	92	&below_4g_mem_size, &above_4g_mem_size);
	93
	94	cpu_irq = pc_allocate_cpu_irq();
	95	i8259 = i8259_init(cpu_irq[0]);
	96	isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
	97	isa_irq_state->i8259 = i8259;
	98	if (pci_enabled) {
96051119	99	ioapic_init(isa_irq_state);
845773ab IY	100	}
	101	isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
	102
	103	if (pci_enabled) {
	104	pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq, ram_size);
	105	} else {
	106	pci_bus = NULL;
02a89b21	107	i440fx_state = NULL;
845773ab IY	108	isa_bus_new(NULL);
	109	}
	110	isa_bus_irqs(isa_irq);
	111
	112	pc_register_ferr_irq(isa_reserve_irq(13));
	113
	114	pc_vga_init(pci_enabled? pci_bus: NULL);
	115
	116	/* init basic PC hardware */
	117	pc_basic_device_init(isa_irq, &floppy_controller, &rtc_state);
	118
	119	for(i = 0; i < nb_nics; i++) {
	120	NICInfo *nd = &nd_table[i];
	121
	122	if (!pci_enabled \|\| (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
	123	pc_init_ne2k_isa(nd);
	124	else
	125	pci_nic_init_nofail(nd, "e1000", NULL);
	126	}
	127
	128	if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
	129	fprintf(stderr, "qemu: too many IDE bus\n");
	130	exit(1);
	131	}
	132
	133	for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
	134	hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
	135	}
	136
	137	if (pci_enabled) {
c0897e0c MA	138	PCIDevice *dev;
	139	dev = pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
	140	idebus[0] = qdev_get_child_bus(&dev->qdev, "ide.0");
	141	idebus[1] = qdev_get_child_bus(&dev->qdev, "ide.1");
845773ab IY	142	} else {
845773ab IY	143	for(i = 0; i < MAX_IDE_BUS; i++) {
c0897e0c MA	144	ISADevice *dev;
	145	dev = isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
	146	hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
	147	idebus[i] = qdev_get_child_bus(&dev->qdev, "ide.0");
845773ab IY	148	}
	149	}
	150
845773ab	151	pc_audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
845773ab	152
c0897e0c MA	153	pc_cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device,
c0897e0c MA	154	idebus[0], idebus[1], floppy_controller, rtc_state);
845773ab IY	155
	156	if (pci_enabled && usb_enabled) {
	157	usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
	158	}
	159
	160	if (pci_enabled && acpi_enabled) {
	161	uint8_t eeprom_buf = qemu_mallocz(8 256); /* XXX: make this persistent */
	162	i2c_bus *smbus;
	163
	164	cmos_s3 = qemu_allocate_irqs(pc_cmos_set_s3_resume, rtc_state, 1);
	165	smi_irq = qemu_allocate_irqs(pc_acpi_smi_interrupt, first_cpu, 1);
	166	/* TODO: Populate SPD eeprom data. */
	167	smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
	168	isa_reserve_irq(9), cmos_s3, smi_irq,
	169	kvm_enabled());
	170	for (i = 0; i < 8; i++) {
	171	DeviceState *eeprom;
	172	eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
	173	qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
	174	qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
	175	qdev_init_nofail(eeprom);
	176	}
845773ab IY	177	}
	178
	179	if (i440fx_state) {
	180	i440fx_init_memory_mappings(i440fx_state);
	181	}
	182
	183	if (pci_enabled) {
	184	pc_pci_device_init(pci_bus);
	185	}
	186	}
	187
	188	static void pc_init_pci(ram_addr_t ram_size,
	189	const char *boot_device,
	190	const char *kernel_filename,
	191	const char *kernel_cmdline,
	192	const char *initrd_filename,
	193	const char *cpu_model)
	194	{
	195	pc_init1(ram_size, boot_device,
	196	kernel_filename, kernel_cmdline,
	197	initrd_filename, cpu_model, 1);
	198	}
	199
	200	static void pc_init_isa(ram_addr_t ram_size,
	201	const char *boot_device,
	202	const char *kernel_filename,
	203	const char *kernel_cmdline,
	204	const char *initrd_filename,
	205	const char *cpu_model)
	206	{
	207	if (cpu_model == NULL)
	208	cpu_model = "486";
	209	pc_init1(ram_size, boot_device,
	210	kernel_filename, kernel_cmdline,
	211	initrd_filename, cpu_model, 0);
	212	}
	213
	214	static QEMUMachine pc_machine = {
b903a0f7	215	.name = "pc-0.14",
845773ab IY	216	.alias = "pc",
	217	.desc = "Standard PC",
	218	.init = pc_init_pci,
	219	.max_cpus = 255,
	220	.is_default = 1,
	221	};
	222
b903a0f7 GH	223	static QEMUMachine pc_machine_v0_13 = {
	224	.name = "pc-0.13",
	225	.desc = "Standard PC",
	226	.init = pc_init_pci,
	227	.max_cpus = 255,
	228	};
	229
845773ab IY	230	static QEMUMachine pc_machine_v0_12 = {
	231	.name = "pc-0.12",
	232	.desc = "Standard PC",
	233	.init = pc_init_pci,
	234	.max_cpus = 255,
	235	.compat_props = (GlobalProperty[]) {
	236	{
	237	.driver = "virtio-serial-pci",
1e29a009	238	.property = "max_ports",
845773ab IY	239	.value = stringify(1),
	240	},{
	241	.driver = "virtio-serial-pci",
	242	.property = "vectors",
	243	.value = stringify(0),
	244	},
	245	{ /* end of list */ }
	246	}
	247	};
	248
	249	static QEMUMachine pc_machine_v0_11 = {
	250	.name = "pc-0.11",
	251	.desc = "Standard PC, qemu 0.11",
	252	.init = pc_init_pci,
	253	.max_cpus = 255,
	254	.compat_props = (GlobalProperty[]) {
	255	{
	256	.driver = "virtio-blk-pci",
	257	.property = "vectors",
	258	.value = stringify(0),
	259	},{
	260	.driver = "virtio-serial-pci",
1e29a009	261	.property = "max_ports",
845773ab IY	262	.value = stringify(1),
	263	},{
	264	.driver = "virtio-serial-pci",
	265	.property = "vectors",
	266	.value = stringify(0),
	267	},{
	268	.driver = "ide-drive",
	269	.property = "ver",
	270	.value = "0.11",
	271	},{
	272	.driver = "scsi-disk",
	273	.property = "ver",
	274	.value = "0.11",
	275	},{
	276	.driver = "PCI",
	277	.property = "rombar",
	278	.value = stringify(0),
	279	},
	280	{ /* end of list */ }
	281	}
	282	};
	283
	284	static QEMUMachine pc_machine_v0_10 = {
	285	.name = "pc-0.10",
	286	.desc = "Standard PC, qemu 0.10",
	287	.init = pc_init_pci,
	288	.max_cpus = 255,
	289	.compat_props = (GlobalProperty[]) {
	290	{
	291	.driver = "virtio-blk-pci",
	292	.property = "class",
	293	.value = stringify(PCI_CLASS_STORAGE_OTHER),
	294	},{
	295	.driver = "virtio-serial-pci",
	296	.property = "class",
	297	.value = stringify(PCI_CLASS_DISPLAY_OTHER),
	298	},{
	299	.driver = "virtio-serial-pci",
1e29a009	300	.property = "max_ports",
845773ab IY	301	.value = stringify(1),
	302	},{
	303	.driver = "virtio-serial-pci",
	304	.property = "vectors",
	305	.value = stringify(0),
	306	},{
	307	.driver = "virtio-net-pci",
	308	.property = "vectors",
	309	.value = stringify(0),
	310	},{
	311	.driver = "virtio-blk-pci",
	312	.property = "vectors",
	313	.value = stringify(0),
	314	},{
	315	.driver = "ide-drive",
	316	.property = "ver",
	317	.value = "0.10",
	318	},{
	319	.driver = "scsi-disk",
	320	.property = "ver",
	321	.value = "0.10",
	322	},{
	323	.driver = "PCI",
	324	.property = "rombar",
	325	.value = stringify(0),
	326	},
	327	{ /* end of list */ }
	328	},
	329	};
	330
	331	static QEMUMachine isapc_machine = {
	332	.name = "isapc",
	333	.desc = "ISA-only PC",
	334	.init = pc_init_isa,
	335	.max_cpus = 1,
	336	};
	337
	338	static void pc_machine_init(void)
	339	{
	340	qemu_register_machine(&pc_machine);
b903a0f7	341	qemu_register_machine(&pc_machine_v0_13);
845773ab IY	342	qemu_register_machine(&pc_machine_v0_12);
	343	qemu_register_machine(&pc_machine_v0_11);
	344	qemu_register_machine(&pc_machine_v0_10);
	345	qemu_register_machine(&isapc_machine);
	346	}
	347
	348	machine_init(pc_machine_init);