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Commit | Line | Data |
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e1c6bbab BS |
1 | /* |
2 | * QEMU DEC 21154 PCI bridge | |
3 | * | |
4 | * Copyright (c) 2006-2007 Fabrice Bellard | |
5 | * Copyright (c) 2007 Jocelyn Mayer | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
0d75590d | 26 | #include "qemu/osdep.h" |
47b43a1f | 27 | #include "dec.h" |
83c9f4ca | 28 | #include "hw/sysbus.h" |
9307d06d | 29 | #include "qapi/error.h" |
0b8fa32f | 30 | #include "qemu/module.h" |
83c9f4ca PB |
31 | #include "hw/pci/pci.h" |
32 | #include "hw/pci/pci_host.h" | |
33 | #include "hw/pci/pci_bridge.h" | |
34 | #include "hw/pci/pci_bus.h" | |
db1015e9 | 35 | #include "qom/object.h" |
e1c6bbab | 36 | |
8063396b | 37 | OBJECT_DECLARE_SIMPLE_TYPE(DECState, DEC_21154) |
ab615367 | 38 | |
db1015e9 | 39 | struct DECState { |
67c332fd | 40 | PCIHostState parent_obj; |
db1015e9 | 41 | }; |
e1c6bbab | 42 | |
d55380bb BS |
43 | static int dec_map_irq(PCIDevice *pci_dev, int irq_num) |
44 | { | |
45 | return irq_num; | |
46 | } | |
47 | ||
33c28f3b | 48 | static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp) |
60a0e443 | 49 | { |
33c28f3b | 50 | pci_bridge_initfn(pci_dev, TYPE_PCI_BUS); |
60a0e443 AW |
51 | } |
52 | ||
40021f08 AL |
53 | static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data) |
54 | { | |
39bffca2 | 55 | DeviceClass *dc = DEVICE_CLASS(klass); |
40021f08 AL |
56 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
57 | ||
ba949713 | 58 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
33c28f3b | 59 | k->realize = dec_pci_bridge_realize; |
40021f08 AL |
60 | k->exit = pci_bridge_exitfn; |
61 | k->vendor_id = PCI_VENDOR_ID_DEC; | |
62 | k->device_id = PCI_DEVICE_ID_DEC_21154; | |
63 | k->config_write = pci_bridge_write_config; | |
91f4c995 | 64 | k->is_bridge = true; |
39bffca2 AL |
65 | dc->desc = "DEC 21154 PCI-PCI bridge"; |
66 | dc->reset = pci_bridge_reset; | |
67 | dc->vmsd = &vmstate_pci_device; | |
40021f08 AL |
68 | } |
69 | ||
4240abff | 70 | static const TypeInfo dec_21154_pci_bridge_info = { |
39bffca2 | 71 | .name = "dec-21154-p2p-bridge", |
f055e96b | 72 | .parent = TYPE_PCI_BRIDGE, |
39bffca2 AL |
73 | .instance_size = sizeof(PCIBridge), |
74 | .class_init = dec_21154_pci_bridge_class_init, | |
fd3b02c8 EH |
75 | .interfaces = (InterfaceInfo[]) { |
76 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
77 | { }, | |
78 | }, | |
68f79994 IY |
79 | }; |
80 | ||
81 | PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn) | |
82 | { | |
83 | PCIDevice *dev; | |
84 | PCIBridge *br; | |
d55380bb | 85 | |
9307d06d | 86 | dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge"); |
f055e96b | 87 | br = PCI_BRIDGE(dev); |
68f79994 | 88 | pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq); |
9307d06d | 89 | pci_realize_and_unref(dev, parent_bus, &error_fatal); |
68f79994 | 90 | return pci_bridge_get_sec_bus(br); |
d55380bb BS |
91 | } |
92 | ||
9b27555a | 93 | static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp) |
e1c6bbab | 94 | { |
ab615367 | 95 | PCIHostState *phb; |
9b27555a | 96 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); |
e1c6bbab | 97 | |
8558d942 | 98 | phb = PCI_HOST_BRIDGE(dev); |
e1c6bbab | 99 | |
40c5dce9 | 100 | memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops, |
ab615367 | 101 | dev, "pci-conf-idx", 0x1000); |
40c5dce9 | 102 | memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops, |
ab615367 | 103 | dev, "pci-data-idx", 0x1000); |
9b27555a MZ |
104 | sysbus_init_mmio(sbd, &phb->conf_mem); |
105 | sysbus_init_mmio(sbd, &phb->data_mem); | |
e1c6bbab BS |
106 | } |
107 | ||
9af21dbe | 108 | static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp) |
e1c6bbab BS |
109 | { |
110 | /* PCI2PCI bridge same values as PearPC - check this */ | |
e1c6bbab BS |
111 | } |
112 | ||
40021f08 AL |
113 | static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data) |
114 | { | |
115 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
08c58f92 | 116 | DeviceClass *dc = DEVICE_CLASS(klass); |
40021f08 | 117 | |
ba949713 | 118 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
9af21dbe | 119 | k->realize = dec_21154_pci_host_realize; |
40021f08 AL |
120 | k->vendor_id = PCI_VENDOR_ID_DEC; |
121 | k->device_id = PCI_DEVICE_ID_DEC_21154; | |
122 | k->revision = 0x02; | |
123 | k->class_id = PCI_CLASS_BRIDGE_PCI; | |
91f4c995 | 124 | k->is_bridge = true; |
08c58f92 MA |
125 | /* |
126 | * PCI-facing part of the host bridge, not usable without the | |
127 | * host-facing part, which can't be device_add'ed, yet. | |
128 | */ | |
e90f2a8c | 129 | dc->user_creatable = false; |
40021f08 AL |
130 | } |
131 | ||
4240abff | 132 | static const TypeInfo dec_21154_pci_host_info = { |
39bffca2 AL |
133 | .name = "dec-21154", |
134 | .parent = TYPE_PCI_DEVICE, | |
135 | .instance_size = sizeof(PCIDevice), | |
136 | .class_init = dec_21154_pci_host_class_init, | |
fd3b02c8 EH |
137 | .interfaces = (InterfaceInfo[]) { |
138 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
139 | { }, | |
140 | }, | |
e1c6bbab BS |
141 | }; |
142 | ||
999e12bb | 143 | static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data) |
e1c6bbab | 144 | { |
9b27555a | 145 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 146 | |
9b27555a | 147 | dc->realize = pci_dec_21154_device_realize; |
999e12bb AL |
148 | } |
149 | ||
4240abff | 150 | static const TypeInfo pci_dec_21154_device_info = { |
ab615367 | 151 | .name = TYPE_DEC_21154, |
8558d942 | 152 | .parent = TYPE_PCI_HOST_BRIDGE, |
39bffca2 AL |
153 | .instance_size = sizeof(DECState), |
154 | .class_init = pci_dec_21154_device_class_init, | |
999e12bb | 155 | }; |
40021f08 | 156 | |
83f7d43a | 157 | static void dec_register_types(void) |
999e12bb | 158 | { |
39bffca2 AL |
159 | type_register_static(&pci_dec_21154_device_info); |
160 | type_register_static(&dec_21154_pci_host_info); | |
161 | type_register_static(&dec_21154_pci_bridge_info); | |
e1c6bbab BS |
162 | } |
163 | ||
83f7d43a | 164 | type_init(dec_register_types) |