]>
Commit | Line | Data |
---|---|---|
e1c6bbab BS |
1 | /* |
2 | * QEMU DEC 21154 PCI bridge | |
3 | * | |
4 | * Copyright (c) 2006-2007 Fabrice Bellard | |
5 | * Copyright (c) 2007 Jocelyn Mayer | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
0d75590d | 26 | #include "qemu/osdep.h" |
47b43a1f | 27 | #include "dec.h" |
83c9f4ca PB |
28 | #include "hw/sysbus.h" |
29 | #include "hw/pci/pci.h" | |
30 | #include "hw/pci/pci_host.h" | |
31 | #include "hw/pci/pci_bridge.h" | |
32 | #include "hw/pci/pci_bus.h" | |
e1c6bbab BS |
33 | |
34 | /* debug DEC */ | |
35 | //#define DEBUG_DEC | |
36 | ||
37 | #ifdef DEBUG_DEC | |
38 | #define DEC_DPRINTF(fmt, ...) \ | |
39 | do { printf("DEC: " fmt , ## __VA_ARGS__); } while (0) | |
40 | #else | |
41 | #define DEC_DPRINTF(fmt, ...) | |
42 | #endif | |
43 | ||
ab615367 AF |
44 | #define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154) |
45 | ||
e1c6bbab | 46 | typedef struct DECState { |
67c332fd | 47 | PCIHostState parent_obj; |
e1c6bbab BS |
48 | } DECState; |
49 | ||
d55380bb BS |
50 | static int dec_map_irq(PCIDevice *pci_dev, int irq_num) |
51 | { | |
52 | return irq_num; | |
53 | } | |
54 | ||
33c28f3b | 55 | static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp) |
60a0e443 | 56 | { |
33c28f3b | 57 | pci_bridge_initfn(pci_dev, TYPE_PCI_BUS); |
60a0e443 AW |
58 | } |
59 | ||
40021f08 AL |
60 | static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data) |
61 | { | |
39bffca2 | 62 | DeviceClass *dc = DEVICE_CLASS(klass); |
40021f08 AL |
63 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
64 | ||
ba949713 | 65 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
33c28f3b | 66 | k->realize = dec_pci_bridge_realize; |
40021f08 AL |
67 | k->exit = pci_bridge_exitfn; |
68 | k->vendor_id = PCI_VENDOR_ID_DEC; | |
69 | k->device_id = PCI_DEVICE_ID_DEC_21154; | |
70 | k->config_write = pci_bridge_write_config; | |
71 | k->is_bridge = 1; | |
39bffca2 AL |
72 | dc->desc = "DEC 21154 PCI-PCI bridge"; |
73 | dc->reset = pci_bridge_reset; | |
74 | dc->vmsd = &vmstate_pci_device; | |
40021f08 AL |
75 | } |
76 | ||
4240abff | 77 | static const TypeInfo dec_21154_pci_bridge_info = { |
39bffca2 | 78 | .name = "dec-21154-p2p-bridge", |
f055e96b | 79 | .parent = TYPE_PCI_BRIDGE, |
39bffca2 AL |
80 | .instance_size = sizeof(PCIBridge), |
81 | .class_init = dec_21154_pci_bridge_class_init, | |
fd3b02c8 EH |
82 | .interfaces = (InterfaceInfo[]) { |
83 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
84 | { }, | |
85 | }, | |
68f79994 IY |
86 | }; |
87 | ||
88 | PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn) | |
89 | { | |
90 | PCIDevice *dev; | |
91 | PCIBridge *br; | |
d55380bb | 92 | |
68f79994 IY |
93 | dev = pci_create_multifunction(parent_bus, devfn, false, |
94 | "dec-21154-p2p-bridge"); | |
f055e96b | 95 | br = PCI_BRIDGE(dev); |
68f79994 IY |
96 | pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq); |
97 | qdev_init_nofail(&dev->qdev); | |
98 | return pci_bridge_get_sec_bus(br); | |
d55380bb BS |
99 | } |
100 | ||
9b27555a | 101 | static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp) |
e1c6bbab | 102 | { |
ab615367 | 103 | PCIHostState *phb; |
9b27555a | 104 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); |
e1c6bbab | 105 | |
8558d942 | 106 | phb = PCI_HOST_BRIDGE(dev); |
e1c6bbab | 107 | |
40c5dce9 | 108 | memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops, |
ab615367 | 109 | dev, "pci-conf-idx", 0x1000); |
40c5dce9 | 110 | memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops, |
ab615367 | 111 | dev, "pci-data-idx", 0x1000); |
9b27555a MZ |
112 | sysbus_init_mmio(sbd, &phb->conf_mem); |
113 | sysbus_init_mmio(sbd, &phb->data_mem); | |
e1c6bbab BS |
114 | } |
115 | ||
9af21dbe | 116 | static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp) |
e1c6bbab BS |
117 | { |
118 | /* PCI2PCI bridge same values as PearPC - check this */ | |
e1c6bbab BS |
119 | } |
120 | ||
40021f08 AL |
121 | static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data) |
122 | { | |
123 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
08c58f92 | 124 | DeviceClass *dc = DEVICE_CLASS(klass); |
40021f08 | 125 | |
ba949713 | 126 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
9af21dbe | 127 | k->realize = dec_21154_pci_host_realize; |
40021f08 AL |
128 | k->vendor_id = PCI_VENDOR_ID_DEC; |
129 | k->device_id = PCI_DEVICE_ID_DEC_21154; | |
130 | k->revision = 0x02; | |
131 | k->class_id = PCI_CLASS_BRIDGE_PCI; | |
132 | k->is_bridge = 1; | |
08c58f92 MA |
133 | /* |
134 | * PCI-facing part of the host bridge, not usable without the | |
135 | * host-facing part, which can't be device_add'ed, yet. | |
136 | */ | |
e90f2a8c | 137 | dc->user_creatable = false; |
40021f08 AL |
138 | } |
139 | ||
4240abff | 140 | static const TypeInfo dec_21154_pci_host_info = { |
39bffca2 AL |
141 | .name = "dec-21154", |
142 | .parent = TYPE_PCI_DEVICE, | |
143 | .instance_size = sizeof(PCIDevice), | |
144 | .class_init = dec_21154_pci_host_class_init, | |
fd3b02c8 EH |
145 | .interfaces = (InterfaceInfo[]) { |
146 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
147 | { }, | |
148 | }, | |
e1c6bbab BS |
149 | }; |
150 | ||
999e12bb | 151 | static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data) |
e1c6bbab | 152 | { |
9b27555a | 153 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 154 | |
9b27555a | 155 | dc->realize = pci_dec_21154_device_realize; |
999e12bb AL |
156 | } |
157 | ||
4240abff | 158 | static const TypeInfo pci_dec_21154_device_info = { |
ab615367 | 159 | .name = TYPE_DEC_21154, |
8558d942 | 160 | .parent = TYPE_PCI_HOST_BRIDGE, |
39bffca2 AL |
161 | .instance_size = sizeof(DECState), |
162 | .class_init = pci_dec_21154_device_class_init, | |
999e12bb | 163 | }; |
40021f08 | 164 | |
83f7d43a | 165 | static void dec_register_types(void) |
999e12bb | 166 | { |
39bffca2 AL |
167 | type_register_static(&pci_dec_21154_device_info); |
168 | type_register_static(&dec_21154_pci_host_info); | |
169 | type_register_static(&dec_21154_pci_bridge_info); | |
e1c6bbab BS |
170 | } |
171 | ||
83f7d43a | 172 | type_init(dec_register_types) |