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qdev: Replace cannot_instantiate_with_device_add_yet with !user_creatable
[mirror_qemu.git] / hw / pci-bridge / dec.c
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e1c6bbab
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1/*
2 * QEMU DEC 21154 PCI bridge
3 *
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
0d75590d 26#include "qemu/osdep.h"
47b43a1f 27#include "dec.h"
83c9f4ca
PB
28#include "hw/sysbus.h"
29#include "hw/pci/pci.h"
30#include "hw/pci/pci_host.h"
31#include "hw/pci/pci_bridge.h"
32#include "hw/pci/pci_bus.h"
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33
34/* debug DEC */
35//#define DEBUG_DEC
36
37#ifdef DEBUG_DEC
38#define DEC_DPRINTF(fmt, ...) \
39 do { printf("DEC: " fmt , ## __VA_ARGS__); } while (0)
40#else
41#define DEC_DPRINTF(fmt, ...)
42#endif
43
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AF
44#define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154)
45
e1c6bbab 46typedef struct DECState {
67c332fd 47 PCIHostState parent_obj;
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48} DECState;
49
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50static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
51{
52 return irq_num;
53}
54
33c28f3b 55static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
60a0e443 56{
33c28f3b 57 pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
60a0e443
AW
58}
59
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60static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
61{
39bffca2 62 DeviceClass *dc = DEVICE_CLASS(klass);
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63 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
64
33c28f3b 65 k->realize = dec_pci_bridge_realize;
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66 k->exit = pci_bridge_exitfn;
67 k->vendor_id = PCI_VENDOR_ID_DEC;
68 k->device_id = PCI_DEVICE_ID_DEC_21154;
69 k->config_write = pci_bridge_write_config;
70 k->is_bridge = 1;
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71 dc->desc = "DEC 21154 PCI-PCI bridge";
72 dc->reset = pci_bridge_reset;
73 dc->vmsd = &vmstate_pci_device;
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74}
75
4240abff 76static const TypeInfo dec_21154_pci_bridge_info = {
39bffca2 77 .name = "dec-21154-p2p-bridge",
f055e96b 78 .parent = TYPE_PCI_BRIDGE,
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79 .instance_size = sizeof(PCIBridge),
80 .class_init = dec_21154_pci_bridge_class_init,
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81};
82
83PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
84{
85 PCIDevice *dev;
86 PCIBridge *br;
d55380bb 87
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88 dev = pci_create_multifunction(parent_bus, devfn, false,
89 "dec-21154-p2p-bridge");
f055e96b 90 br = PCI_BRIDGE(dev);
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91 pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
92 qdev_init_nofail(&dev->qdev);
93 return pci_bridge_get_sec_bus(br);
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94}
95
999e12bb 96static int pci_dec_21154_device_init(SysBusDevice *dev)
e1c6bbab 97{
ab615367 98 PCIHostState *phb;
e1c6bbab 99
8558d942 100 phb = PCI_HOST_BRIDGE(dev);
e1c6bbab 101
40c5dce9 102 memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
ab615367 103 dev, "pci-conf-idx", 0x1000);
40c5dce9 104 memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
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AF
105 dev, "pci-data-idx", 0x1000);
106 sysbus_init_mmio(dev, &phb->conf_mem);
107 sysbus_init_mmio(dev, &phb->data_mem);
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108 return 0;
109}
110
9af21dbe 111static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
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112{
113 /* PCI2PCI bridge same values as PearPC - check this */
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114}
115
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116static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
117{
118 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
08c58f92 119 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08 120
9af21dbe 121 k->realize = dec_21154_pci_host_realize;
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122 k->vendor_id = PCI_VENDOR_ID_DEC;
123 k->device_id = PCI_DEVICE_ID_DEC_21154;
124 k->revision = 0x02;
125 k->class_id = PCI_CLASS_BRIDGE_PCI;
126 k->is_bridge = 1;
08c58f92
MA
127 /*
128 * PCI-facing part of the host bridge, not usable without the
129 * host-facing part, which can't be device_add'ed, yet.
130 */
e90f2a8c 131 dc->user_creatable = false;
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132}
133
4240abff 134static const TypeInfo dec_21154_pci_host_info = {
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135 .name = "dec-21154",
136 .parent = TYPE_PCI_DEVICE,
137 .instance_size = sizeof(PCIDevice),
138 .class_init = dec_21154_pci_host_class_init,
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139};
140
999e12bb 141static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
e1c6bbab 142{
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143 SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
144
145 sdc->init = pci_dec_21154_device_init;
146}
147
4240abff 148static const TypeInfo pci_dec_21154_device_info = {
ab615367 149 .name = TYPE_DEC_21154,
8558d942 150 .parent = TYPE_PCI_HOST_BRIDGE,
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151 .instance_size = sizeof(DECState),
152 .class_init = pci_dec_21154_device_class_init,
999e12bb 153};
40021f08 154
83f7d43a 155static void dec_register_types(void)
999e12bb 156{
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157 type_register_static(&pci_dec_21154_device_info);
158 type_register_static(&dec_21154_pci_host_info);
159 type_register_static(&dec_21154_pci_bridge_info);
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160}
161
83f7d43a 162type_init(dec_register_types)