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Commit | Line | Data |
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40d14bef MA |
1 | /* |
2 | * PCI Expander Bridge Device Emulation | |
3 | * | |
4 | * Copyright (C) 2015 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
97d5408f | 13 | #include "qemu/osdep.h" |
86395eb3 | 14 | #include "qapi/error.h" |
40d14bef MA |
15 | #include "hw/pci/pci.h" |
16 | #include "hw/pci/pci_bus.h" | |
17 | #include "hw/pci/pci_host.h" | |
a27bd6c7 | 18 | #include "hw/qdev-properties.h" |
3cf0ecb3 | 19 | #include "hw/pci/pci_bridge.h" |
40d14bef MA |
20 | #include "qemu/range.h" |
21 | #include "qemu/error-report.h" | |
0b8fa32f | 22 | #include "qemu/module.h" |
0e79e51a | 23 | #include "sysemu/numa.h" |
aa570207 | 24 | #include "hw/boards.h" |
40d14bef MA |
25 | |
26 | #define TYPE_PXB_BUS "pxb-bus" | |
27 | #define PXB_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_BUS) | |
28 | ||
02b07434 MA |
29 | #define TYPE_PXB_PCIE_BUS "pxb-pcie-bus" |
30 | #define PXB_PCIE_BUS(obj) OBJECT_CHECK(PXBBus, (obj), TYPE_PXB_PCIE_BUS) | |
31 | ||
40d14bef MA |
32 | typedef struct PXBBus { |
33 | /*< private >*/ | |
34 | PCIBus parent_obj; | |
35 | /*< public >*/ | |
36 | ||
37 | char bus_path[8]; | |
38 | } PXBBus; | |
39 | ||
40 | #define TYPE_PXB_DEVICE "pxb" | |
41 | #define PXB_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_DEVICE) | |
42 | ||
02b07434 MA |
43 | #define TYPE_PXB_PCIE_DEVICE "pxb-pcie" |
44 | #define PXB_PCIE_DEV(obj) OBJECT_CHECK(PXBDev, (obj), TYPE_PXB_PCIE_DEVICE) | |
45 | ||
40d14bef MA |
46 | typedef struct PXBDev { |
47 | /*< private >*/ | |
48 | PCIDevice parent_obj; | |
49 | /*< public >*/ | |
50 | ||
51 | uint8_t bus_nr; | |
0e79e51a | 52 | uint16_t numa_node; |
40d14bef MA |
53 | } PXBDev; |
54 | ||
02b07434 MA |
55 | static PXBDev *convert_to_pxb(PCIDevice *dev) |
56 | { | |
fd56e061 DG |
57 | return pci_bus_is_express(pci_get_bus(dev)) |
58 | ? PXB_PCIE_DEV(dev) : PXB_DEV(dev); | |
02b07434 MA |
59 | } |
60 | ||
48ea3ded LE |
61 | static GList *pxb_dev_list; |
62 | ||
40d14bef MA |
63 | #define TYPE_PXB_HOST "pxb-host" |
64 | ||
65 | static int pxb_bus_num(PCIBus *bus) | |
66 | { | |
02b07434 | 67 | PXBDev *pxb = convert_to_pxb(bus->parent_dev); |
40d14bef MA |
68 | |
69 | return pxb->bus_nr; | |
70 | } | |
71 | ||
0e79e51a MA |
72 | static uint16_t pxb_bus_numa_node(PCIBus *bus) |
73 | { | |
02b07434 | 74 | PXBDev *pxb = convert_to_pxb(bus->parent_dev); |
0e79e51a MA |
75 | |
76 | return pxb->numa_node; | |
77 | } | |
78 | ||
40d14bef MA |
79 | static void pxb_bus_class_init(ObjectClass *class, void *data) |
80 | { | |
81 | PCIBusClass *pbc = PCI_BUS_CLASS(class); | |
82 | ||
83 | pbc->bus_num = pxb_bus_num; | |
0e79e51a | 84 | pbc->numa_node = pxb_bus_numa_node; |
40d14bef MA |
85 | } |
86 | ||
87 | static const TypeInfo pxb_bus_info = { | |
88 | .name = TYPE_PXB_BUS, | |
89 | .parent = TYPE_PCI_BUS, | |
90 | .instance_size = sizeof(PXBBus), | |
91 | .class_init = pxb_bus_class_init, | |
92 | }; | |
93 | ||
02b07434 MA |
94 | static const TypeInfo pxb_pcie_bus_info = { |
95 | .name = TYPE_PXB_PCIE_BUS, | |
96 | .parent = TYPE_PCIE_BUS, | |
97 | .instance_size = sizeof(PXBBus), | |
98 | .class_init = pxb_bus_class_init, | |
99 | }; | |
100 | ||
40d14bef MA |
101 | static const char *pxb_host_root_bus_path(PCIHostState *host_bridge, |
102 | PCIBus *rootbus) | |
103 | { | |
02b07434 MA |
104 | PXBBus *bus = pci_bus_is_express(rootbus) ? |
105 | PXB_PCIE_BUS(rootbus) : PXB_BUS(rootbus); | |
40d14bef MA |
106 | |
107 | snprintf(bus->bus_path, 8, "0000:%02x", pxb_bus_num(rootbus)); | |
108 | return bus->bus_path; | |
109 | } | |
110 | ||
48ea3ded LE |
111 | static char *pxb_host_ofw_unit_address(const SysBusDevice *dev) |
112 | { | |
113 | const PCIHostState *pxb_host; | |
114 | const PCIBus *pxb_bus; | |
115 | const PXBDev *pxb_dev; | |
116 | int position; | |
117 | const DeviceState *pxb_dev_base; | |
118 | const PCIHostState *main_host; | |
119 | const SysBusDevice *main_host_sbd; | |
120 | ||
121 | pxb_host = PCI_HOST_BRIDGE(dev); | |
122 | pxb_bus = pxb_host->bus; | |
02b07434 | 123 | pxb_dev = convert_to_pxb(pxb_bus->parent_dev); |
48ea3ded LE |
124 | position = g_list_index(pxb_dev_list, pxb_dev); |
125 | assert(position >= 0); | |
126 | ||
127 | pxb_dev_base = DEVICE(pxb_dev); | |
128 | main_host = PCI_HOST_BRIDGE(pxb_dev_base->parent_bus->parent); | |
129 | main_host_sbd = SYS_BUS_DEVICE(main_host); | |
130 | ||
131 | if (main_host_sbd->num_mmio > 0) { | |
132 | return g_strdup_printf(TARGET_FMT_plx ",%x", | |
133 | main_host_sbd->mmio[0].addr, position + 1); | |
134 | } | |
135 | if (main_host_sbd->num_pio > 0) { | |
136 | return g_strdup_printf("i%04x,%x", | |
137 | main_host_sbd->pio[0], position + 1); | |
138 | } | |
139 | return NULL; | |
140 | } | |
141 | ||
40d14bef MA |
142 | static void pxb_host_class_init(ObjectClass *class, void *data) |
143 | { | |
144 | DeviceClass *dc = DEVICE_CLASS(class); | |
48ea3ded | 145 | SysBusDeviceClass *sbc = SYS_BUS_DEVICE_CLASS(class); |
40d14bef MA |
146 | PCIHostBridgeClass *hc = PCI_HOST_BRIDGE_CLASS(class); |
147 | ||
148 | dc->fw_name = "pci"; | |
bf8d4924 | 149 | /* Reason: Internal part of the pxb/pxb-pcie device, not usable by itself */ |
e90f2a8c | 150 | dc->user_creatable = false; |
48ea3ded | 151 | sbc->explicit_ofw_unit_address = pxb_host_ofw_unit_address; |
40d14bef MA |
152 | hc->root_bus_path = pxb_host_root_bus_path; |
153 | } | |
154 | ||
155 | static const TypeInfo pxb_host_info = { | |
156 | .name = TYPE_PXB_HOST, | |
157 | .parent = TYPE_PCI_HOST_BRIDGE, | |
158 | .class_init = pxb_host_class_init, | |
159 | }; | |
160 | ||
161 | /* | |
86395eb3 | 162 | * Registers the PXB bus as a child of pci host root bus. |
40d14bef | 163 | */ |
86395eb3 | 164 | static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp) |
40d14bef | 165 | { |
fd56e061 | 166 | PCIBus *bus = pci_get_bus(dev); |
40d14bef MA |
167 | int pxb_bus_num = pci_bus_num(pxb_bus); |
168 | ||
169 | if (bus->parent_dev) { | |
86395eb3 WJ |
170 | error_setg(errp, "PXB devices can be attached only to root bus"); |
171 | return; | |
40d14bef MA |
172 | } |
173 | ||
174 | QLIST_FOREACH(bus, &bus->child, sibling) { | |
175 | if (pci_bus_num(bus) == pxb_bus_num) { | |
86395eb3 WJ |
176 | error_setg(errp, "Bus %d is already in use", pxb_bus_num); |
177 | return; | |
40d14bef MA |
178 | } |
179 | } | |
fd56e061 | 180 | QLIST_INSERT_HEAD(&pci_get_bus(dev)->child, pxb_bus, sibling); |
40d14bef MA |
181 | } |
182 | ||
0639b00d MA |
183 | static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) |
184 | { | |
fd56e061 | 185 | PCIDevice *pxb = pci_get_bus(pci_dev)->parent_dev; |
0639b00d MA |
186 | |
187 | /* | |
188 | * The bios does not index the pxb slot number when | |
189 | * it computes the IRQ because it resides on bus 0 | |
190 | * and not on the current bus. | |
191 | * However QEMU routes the irq through bus 0 and adds | |
192 | * the pxb slot to the IRQ computation of the PXB | |
193 | * device. | |
194 | * | |
195 | * Synchronize between bios and QEMU by canceling | |
196 | * pxb's effect. | |
197 | */ | |
198 | return pin - PCI_SLOT(pxb->devfn); | |
199 | } | |
200 | ||
48ea3ded LE |
201 | static gint pxb_compare(gconstpointer a, gconstpointer b) |
202 | { | |
203 | const PXBDev *pxb_a = a, *pxb_b = b; | |
204 | ||
205 | return pxb_a->bus_nr < pxb_b->bus_nr ? -1 : | |
206 | pxb_a->bus_nr > pxb_b->bus_nr ? 1 : | |
207 | 0; | |
208 | } | |
209 | ||
86395eb3 | 210 | static void pxb_dev_realize_common(PCIDevice *dev, bool pcie, Error **errp) |
40d14bef | 211 | { |
02b07434 MA |
212 | PXBDev *pxb = convert_to_pxb(dev); |
213 | DeviceState *ds, *bds = NULL; | |
40d14bef MA |
214 | PCIBus *bus; |
215 | const char *dev_name = NULL; | |
86395eb3 | 216 | Error *local_err = NULL; |
aa570207 TX |
217 | MachineState *ms = MACHINE(qdev_get_machine()); |
218 | ||
219 | if (ms->numa_state == NULL) { | |
220 | error_setg(errp, "NUMA is not supported by this machine-type"); | |
221 | return; | |
222 | } | |
40d14bef | 223 | |
0e79e51a | 224 | if (pxb->numa_node != NUMA_NODE_UNASSIGNED && |
aa570207 | 225 | pxb->numa_node >= ms->numa_state->num_nodes) { |
86395eb3 WJ |
226 | error_setg(errp, "Illegal numa node %d", pxb->numa_node); |
227 | return; | |
0e79e51a MA |
228 | } |
229 | ||
40d14bef MA |
230 | if (dev->qdev.id && *dev->qdev.id) { |
231 | dev_name = dev->qdev.id; | |
232 | } | |
233 | ||
3e80f690 | 234 | ds = qdev_new(TYPE_PXB_HOST); |
02b07434 | 235 | if (pcie) { |
1115ff6d | 236 | bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS); |
02b07434 | 237 | } else { |
1115ff6d | 238 | bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS); |
02b07434 MA |
239 | bds = qdev_create(BUS(bus), "pci-bridge"); |
240 | bds->id = dev_name; | |
241 | qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_nr); | |
242 | qdev_prop_set_bit(bds, PCI_BRIDGE_DEV_PROP_SHPC, false); | |
243 | } | |
40d14bef MA |
244 | |
245 | bus->parent_dev = dev; | |
fd56e061 DG |
246 | bus->address_space_mem = pci_get_bus(dev)->address_space_mem; |
247 | bus->address_space_io = pci_get_bus(dev)->address_space_io; | |
0639b00d | 248 | bus->map_irq = pxb_map_irq_fn; |
40d14bef | 249 | |
40d14bef MA |
250 | PCI_HOST_BRIDGE(ds)->bus = bus; |
251 | ||
86395eb3 WJ |
252 | pxb_register_bus(dev, bus, &local_err); |
253 | if (local_err) { | |
254 | error_propagate(errp, local_err); | |
2e4278b5 | 255 | goto err_register_bus; |
40d14bef MA |
256 | } |
257 | ||
3e80f690 | 258 | qdev_realize_and_unref(ds, NULL, &error_fatal); |
02b07434 MA |
259 | if (bds) { |
260 | qdev_init_nofail(bds); | |
261 | } | |
40d14bef MA |
262 | |
263 | pci_word_test_and_set_mask(dev->config + PCI_STATUS, | |
264 | PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK); | |
265 | pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST); | |
266 | ||
48ea3ded | 267 | pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare); |
86395eb3 | 268 | return; |
2e4278b5 WJ |
269 | |
270 | err_register_bus: | |
271 | object_unref(OBJECT(bds)); | |
272 | object_unparent(OBJECT(bus)); | |
273 | object_unref(OBJECT(ds)); | |
40d14bef MA |
274 | } |
275 | ||
86395eb3 | 276 | static void pxb_dev_realize(PCIDevice *dev, Error **errp) |
02b07434 | 277 | { |
fd56e061 | 278 | if (pci_bus_is_express(pci_get_bus(dev))) { |
86395eb3 WJ |
279 | error_setg(errp, "pxb devices cannot reside on a PCIe bus"); |
280 | return; | |
02b07434 MA |
281 | } |
282 | ||
86395eb3 | 283 | pxb_dev_realize_common(dev, false, errp); |
02b07434 MA |
284 | } |
285 | ||
48ea3ded LE |
286 | static void pxb_dev_exitfn(PCIDevice *pci_dev) |
287 | { | |
02b07434 | 288 | PXBDev *pxb = convert_to_pxb(pci_dev); |
48ea3ded LE |
289 | |
290 | pxb_dev_list = g_list_remove(pxb_dev_list, pxb); | |
291 | } | |
292 | ||
40d14bef | 293 | static Property pxb_dev_properties[] = { |
f9735fd5 | 294 | /* Note: 0 is not a legal PXB bus number. */ |
40d14bef | 295 | DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0), |
0e79e51a | 296 | DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED), |
40d14bef MA |
297 | DEFINE_PROP_END_OF_LIST(), |
298 | }; | |
299 | ||
300 | static void pxb_dev_class_init(ObjectClass *klass, void *data) | |
301 | { | |
302 | DeviceClass *dc = DEVICE_CLASS(klass); | |
303 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
304 | ||
86395eb3 | 305 | k->realize = pxb_dev_realize; |
48ea3ded | 306 | k->exit = pxb_dev_exitfn; |
40d14bef MA |
307 | k->vendor_id = PCI_VENDOR_ID_REDHAT; |
308 | k->device_id = PCI_DEVICE_ID_REDHAT_PXB; | |
309 | k->class_id = PCI_CLASS_BRIDGE_HOST; | |
310 | ||
311 | dc->desc = "PCI Expander Bridge"; | |
4f67d30b | 312 | device_class_set_props(dc, pxb_dev_properties); |
7b346c74 | 313 | dc->hotpluggable = false; |
13d11b0b | 314 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
40d14bef MA |
315 | } |
316 | ||
317 | static const TypeInfo pxb_dev_info = { | |
318 | .name = TYPE_PXB_DEVICE, | |
319 | .parent = TYPE_PCI_DEVICE, | |
320 | .instance_size = sizeof(PXBDev), | |
321 | .class_init = pxb_dev_class_init, | |
fd3b02c8 EH |
322 | .interfaces = (InterfaceInfo[]) { |
323 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
324 | { }, | |
325 | }, | |
40d14bef MA |
326 | }; |
327 | ||
86395eb3 | 328 | static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) |
02b07434 | 329 | { |
fd56e061 | 330 | if (!pci_bus_is_express(pci_get_bus(dev))) { |
86395eb3 WJ |
331 | error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus"); |
332 | return; | |
02b07434 MA |
333 | } |
334 | ||
86395eb3 | 335 | pxb_dev_realize_common(dev, true, errp); |
02b07434 MA |
336 | } |
337 | ||
338 | static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data) | |
339 | { | |
340 | DeviceClass *dc = DEVICE_CLASS(klass); | |
341 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
342 | ||
86395eb3 | 343 | k->realize = pxb_pcie_dev_realize; |
02b07434 MA |
344 | k->exit = pxb_dev_exitfn; |
345 | k->vendor_id = PCI_VENDOR_ID_REDHAT; | |
346 | k->device_id = PCI_DEVICE_ID_REDHAT_PXB_PCIE; | |
347 | k->class_id = PCI_CLASS_BRIDGE_HOST; | |
348 | ||
349 | dc->desc = "PCI Express Expander Bridge"; | |
4f67d30b | 350 | device_class_set_props(dc, pxb_dev_properties); |
7b346c74 | 351 | dc->hotpluggable = false; |
13d11b0b | 352 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
02b07434 MA |
353 | } |
354 | ||
355 | static const TypeInfo pxb_pcie_dev_info = { | |
356 | .name = TYPE_PXB_PCIE_DEVICE, | |
357 | .parent = TYPE_PCI_DEVICE, | |
358 | .instance_size = sizeof(PXBDev), | |
359 | .class_init = pxb_pcie_dev_class_init, | |
fd3b02c8 EH |
360 | .interfaces = (InterfaceInfo[]) { |
361 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
362 | { }, | |
363 | }, | |
02b07434 MA |
364 | }; |
365 | ||
40d14bef MA |
366 | static void pxb_register_types(void) |
367 | { | |
368 | type_register_static(&pxb_bus_info); | |
02b07434 | 369 | type_register_static(&pxb_pcie_bus_info); |
40d14bef MA |
370 | type_register_static(&pxb_host_info); |
371 | type_register_static(&pxb_dev_info); | |
02b07434 | 372 | type_register_static(&pxb_pcie_dev_info); |
40d14bef MA |
373 | } |
374 | ||
375 | type_init(pxb_register_types) |