[mirror_qemu.git] / hw / pckbd.c

/*
 * QEMU PC keyboard emulation
 * 
 * Copyright (c) 2003 Fabrice Bellard
 * 
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "vl.h"

/* debug PC keyboard */
//#define DEBUG_KBD

/* debug PC keyboard : only mouse */
//#define DEBUG_MOUSE

/*	Keyboard Controller Commands */
#define KBD_CCMD_READ_MODE	0x20	/* Read mode bits */
#define KBD_CCMD_WRITE_MODE	0x60	/* Write mode bits */
#define KBD_CCMD_GET_VERSION	0xA1	/* Get controller version */
#define KBD_CCMD_MOUSE_DISABLE	0xA7	/* Disable mouse interface */
#define KBD_CCMD_MOUSE_ENABLE	0xA8	/* Enable mouse interface */
#define KBD_CCMD_TEST_MOUSE	0xA9	/* Mouse interface test */
#define KBD_CCMD_SELF_TEST	0xAA	/* Controller self test */
#define KBD_CCMD_KBD_TEST	0xAB	/* Keyboard interface test */
#define KBD_CCMD_KBD_DISABLE	0xAD	/* Keyboard interface disable */
#define KBD_CCMD_KBD_ENABLE	0xAE	/* Keyboard interface enable */
#define KBD_CCMD_READ_INPORT    0xC0    /* read input port */
#define KBD_CCMD_READ_OUTPORT	0xD0    /* read output port */
#define KBD_CCMD_WRITE_OUTPORT	0xD1    /* write output port */
#define KBD_CCMD_WRITE_OBUF	0xD2
#define KBD_CCMD_WRITE_AUX_OBUF	0xD3    /* Write to output buffer as if
					   initiated by the auxiliary device */
#define KBD_CCMD_WRITE_MOUSE	0xD4	/* Write the following byte to the mouse */
#define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
#define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */
#define KBD_CCMD_RESET	        0xFE

/* Keyboard Commands */
#define KBD_CMD_SET_LEDS	0xED	/* Set keyboard leds */
#define KBD_CMD_ECHO     	0xEE
#define KBD_CMD_GET_ID 	        0xF2	/* get keyboard ID */
#define KBD_CMD_SET_RATE	0xF3	/* Set typematic rate */
#define KBD_CMD_ENABLE		0xF4	/* Enable scanning */
#define KBD_CMD_RESET_DISABLE	0xF5	/* reset and disable scanning */
#define KBD_CMD_RESET_ENABLE   	0xF6    /* reset and enable scanning */
#define KBD_CMD_RESET		0xFF	/* Reset */

/* Keyboard Replies */
#define KBD_REPLY_POR		0xAA	/* Power on reset */
#define KBD_REPLY_ACK		0xFA	/* Command ACK */
#define KBD_REPLY_RESEND	0xFE	/* Command NACK, send the cmd again */

/* Status Register Bits */
#define KBD_STAT_OBF 		0x01	/* Keyboard output buffer full */
#define KBD_STAT_IBF 		0x02	/* Keyboard input buffer full */
#define KBD_STAT_SELFTEST	0x04	/* Self test successful */
#define KBD_STAT_CMD		0x08	/* Last write was a command write (0=data) */
#define KBD_STAT_UNLOCKED	0x10	/* Zero if keyboard locked */
#define KBD_STAT_MOUSE_OBF	0x20	/* Mouse output buffer full */
#define KBD_STAT_GTO 		0x40	/* General receive/xmit timeout */
#define KBD_STAT_PERR 		0x80	/* Parity error */

/* Controller Mode Register Bits */
#define KBD_MODE_KBD_INT	0x01	/* Keyboard data generate IRQ1 */
#define KBD_MODE_MOUSE_INT	0x02	/* Mouse data generate IRQ12 */
#define KBD_MODE_SYS 		0x04	/* The system flag (?) */
#define KBD_MODE_NO_KEYLOCK	0x08	/* The keylock doesn't affect the keyboard if set */
#define KBD_MODE_DISABLE_KBD	0x10	/* Disable keyboard interface */
#define KBD_MODE_DISABLE_MOUSE	0x20	/* Disable mouse interface */
#define KBD_MODE_KCC 		0x40	/* Scan code conversion to PC format */
#define KBD_MODE_RFU		0x80

/* Mouse Commands */
#define AUX_SET_SCALE11		0xE6	/* Set 1:1 scaling */
#define AUX_SET_SCALE21		0xE7	/* Set 2:1 scaling */
#define AUX_SET_RES		0xE8	/* Set resolution */
#define AUX_GET_SCALE		0xE9	/* Get scaling factor */
#define AUX_SET_STREAM		0xEA	/* Set stream mode */
#define AUX_POLL		0xEB	/* Poll */
#define AUX_RESET_WRAP		0xEC	/* Reset wrap mode */
#define AUX_SET_WRAP		0xEE	/* Set wrap mode */
#define AUX_SET_REMOTE		0xF0	/* Set remote mode */
#define AUX_GET_TYPE		0xF2	/* Get type */
#define AUX_SET_SAMPLE		0xF3	/* Set sample rate */
#define AUX_ENABLE_DEV		0xF4	/* Enable aux device */
#define AUX_DISABLE_DEV		0xF5	/* Disable aux device */
#define AUX_SET_DEFAULT		0xF6
#define AUX_RESET		0xFF	/* Reset aux device */
#define AUX_ACK			0xFA	/* Command byte ACK. */

#define MOUSE_STATUS_REMOTE     0x40
#define MOUSE_STATUS_ENABLED    0x20
#define MOUSE_STATUS_SCALE21    0x10

#define KBD_QUEUE_SIZE 256

#define KBD_PENDING_KBD         1
#define KBD_PENDING_AUX         2

typedef struct KBDState {
    uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
    uint8_t status;
    uint8_t mode;
    /* Bitmask of devices with data available.  */
    uint8_t pending;
    void *kbd;
    void *mouse;

    qemu_irq irq_kbd;
    qemu_irq irq_mouse;
    target_phys_addr_t base;
} KBDState;

KBDState kbd_state;

/* update irq and KBD_STAT_[MOUSE_]OBF */
/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
   incorrect, but it avoids having to simulate exact delays */
static void kbd_update_irq(KBDState *s)
{
    int irq_kbd_level, irq_mouse_level;

    irq_kbd_level = 0;
    irq_mouse_level = 0;
    s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
    if (s->pending) {
        s->status |= KBD_STAT_OBF;
        /* kbd data takes priority over aux data.  */
        if (s->pending == KBD_PENDING_AUX) {
            s->status |= KBD_STAT_MOUSE_OBF;
            if (s->mode & KBD_MODE_MOUSE_INT)
                irq_mouse_level = 1;
        } else {
            if ((s->mode & KBD_MODE_KBD_INT) && 
                !(s->mode & KBD_MODE_DISABLE_KBD))
                irq_kbd_level = 1;
        }
    }
    qemu_set_irq(s->irq_kbd, irq_kbd_level);
    qemu_set_irq(s->irq_mouse, irq_mouse_level);
}

static void kbd_update_kbd_irq(void *opaque, int level)
{
    KBDState *s = (KBDState *)opaque;

    if (level)
        s->pending |= KBD_PENDING_KBD;
    else
        s->pending &= ~KBD_PENDING_KBD;
    kbd_update_irq(s);
}

static void kbd_update_aux_irq(void *opaque, int level)
{
    KBDState *s = (KBDState *)opaque;

    if (level)
        s->pending |= KBD_PENDING_AUX;
    else
        s->pending &= ~KBD_PENDING_AUX;
    kbd_update_irq(s);
}

static uint32_t kbd_read_status(void *opaque, uint32_t addr)
{
    KBDState *s = opaque;
    int val;
    val = s->status;
#if defined(DEBUG_KBD)
    printf("kbd: read status=0x%02x\n", val);
#endif
    return val;
}

static void kbd_queue(KBDState *s, int b, int aux)
{
    if (aux)
        ps2_queue(s->mouse, b);
    else
        ps2_queue(s->kbd, b);
}

static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
{
    KBDState *s = opaque;

#ifdef DEBUG_KBD
    printf("kbd: write cmd=0x%02x\n", val);
#endif
    switch(val) {
    case KBD_CCMD_READ_MODE:
        kbd_queue(s, s->mode, 0);
        break;
    case KBD_CCMD_WRITE_MODE:
    case KBD_CCMD_WRITE_OBUF:
    case KBD_CCMD_WRITE_AUX_OBUF:
    case KBD_CCMD_WRITE_MOUSE:
    case KBD_CCMD_WRITE_OUTPORT:
        s->write_cmd = val;
        break;
    case KBD_CCMD_MOUSE_DISABLE:
        s->mode |= KBD_MODE_DISABLE_MOUSE;
        break;
    case KBD_CCMD_MOUSE_ENABLE:
        s->mode &= ~KBD_MODE_DISABLE_MOUSE;
        break;
    case KBD_CCMD_TEST_MOUSE:
        kbd_queue(s, 0x00, 0);
        break;
    case KBD_CCMD_SELF_TEST:
        s->status |= KBD_STAT_SELFTEST;
        kbd_queue(s, 0x55, 0);
        break;
    case KBD_CCMD_KBD_TEST:
        kbd_queue(s, 0x00, 0);
        break;
    case KBD_CCMD_KBD_DISABLE:
        s->mode |= KBD_MODE_DISABLE_KBD;
        kbd_update_irq(s);
        break;
    case KBD_CCMD_KBD_ENABLE:
        s->mode &= ~KBD_MODE_DISABLE_KBD;
        kbd_update_irq(s);
        break;
    case KBD_CCMD_READ_INPORT:
        kbd_queue(s, 0x00, 0);
        break;
    case KBD_CCMD_READ_OUTPORT:
        /* XXX: check that */
#ifdef TARGET_I386
        val = 0x01 | (ioport_get_a20() << 1);
#else
        val = 0x01;
#endif
        if (s->status & KBD_STAT_OBF)
            val |= 0x10;
        if (s->status & KBD_STAT_MOUSE_OBF)
            val |= 0x20;
        kbd_queue(s, val, 0);
        break;
#ifdef TARGET_I386
    case KBD_CCMD_ENABLE_A20:
        ioport_set_a20(1);
        break;
    case KBD_CCMD_DISABLE_A20:
        ioport_set_a20(0);
        break;
#endif
    case KBD_CCMD_RESET:
        qemu_system_reset_request();
        break;
    case 0xff:
        /* ignore that - I don't know what is its use */
        break;
    default:
        fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
        break;
    }
}

static uint32_t kbd_read_data(void *opaque, uint32_t addr)
{
    KBDState *s = opaque;

    if (s->pending == KBD_PENDING_AUX)
        return ps2_read_data(s->mouse);

    return ps2_read_data(s->kbd);
}

void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
{
    KBDState *s = opaque;

#ifdef DEBUG_KBD
    printf("kbd: write data=0x%02x\n", val);
#endif

    switch(s->write_cmd) {
    case 0:
        ps2_write_keyboard(s->kbd, val);
        break;
    case KBD_CCMD_WRITE_MODE:
        s->mode = val;
        ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
        /* ??? */
        kbd_update_irq(s);
        break;
    case KBD_CCMD_WRITE_OBUF:
        kbd_queue(s, val, 0);
        break;
    case KBD_CCMD_WRITE_AUX_OBUF:
        kbd_queue(s, val, 1);
        break;
    case KBD_CCMD_WRITE_OUTPORT:
#ifdef TARGET_I386
        ioport_set_a20((val >> 1) & 1);
#endif
        if (!(val & 1)) {
            qemu_system_reset_request();
        }
        break;
    case KBD_CCMD_WRITE_MOUSE:
        ps2_write_mouse(s->mouse, val);
        break;
    default:
        break;
    }
    s->write_cmd = 0;
}

static void kbd_reset(void *opaque)
{
    KBDState *s = opaque;

    s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
    s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
}

static void kbd_save(QEMUFile* f, void* opaque)
{
    KBDState *s = (KBDState*)opaque;
    
    qemu_put_8s(f, &s->write_cmd);
    qemu_put_8s(f, &s->status);
    qemu_put_8s(f, &s->mode);
    qemu_put_8s(f, &s->pending);
}

static int kbd_load(QEMUFile* f, void* opaque, int version_id)
{
    KBDState *s = (KBDState*)opaque;
    
    if (version_id != 3)
        return -EINVAL;
    qemu_get_8s(f, &s->write_cmd);
    qemu_get_8s(f, &s->status);
    qemu_get_8s(f, &s->mode);
    qemu_get_8s(f, &s->pending);
    return 0;
}

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
{
    KBDState *s = &kbd_state;

    s->irq_kbd = kbd_irq;
    s->irq_mouse = mouse_irq;

    kbd_reset(s);
    register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
    register_ioport_read(io_base, 1, 1, kbd_read_data, s);
    register_ioport_write(io_base, 1, 1, kbd_write_data, s);
    register_ioport_read(io_base + 4, 1, 1, kbd_read_status, s);
    register_ioport_write(io_base + 4, 1, 1, kbd_write_command, s);

    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
#ifdef TARGET_I386
    vmmouse_init(s->mouse);
#endif
    qemu_register_reset(kbd_reset, s);
}

/* Memory mapped interface */
uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
{
    KBDState *s = opaque;

    if (addr == s->base)
        return kbd_read_data(s, 0);
    else
        return kbd_read_status(s, 0);
}

void kbd_mm_writeb (void *opaque,
                       target_phys_addr_t addr, uint32_t value)
{
    KBDState *s = opaque;

    if (addr == s->base)
        kbd_write_data(s, 0, value);
    else
        kbd_write_command(s, 0, value);
}

static CPUReadMemoryFunc *kbd_mm_read[] = {
    &kbd_mm_readb,
    &kbd_mm_readb,
    &kbd_mm_readb,
};

static CPUWriteMemoryFunc *kbd_mm_write[] = {
    &kbd_mm_writeb,
    &kbd_mm_writeb,
    &kbd_mm_writeb,
};

void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, target_ulong base, int it_shift)
{
    KBDState *s = &kbd_state;
    int s_io_memory;

    s->irq_kbd = kbd_irq;
    s->irq_mouse = mouse_irq;
    s->base = base;

    kbd_reset(s);
    register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
    s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
    cpu_register_physical_memory(base & ~(TARGET_PAGE_SIZE - 1), TARGET_PAGE_SIZE, s_io_memory);

    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
#ifdef TARGET_I386
    vmmouse_init(s->mouse);
#endif
    qemu_register_reset(kbd_reset, s);
}
Commit	Line	Data
80cabfad FB	1	/*
	2	* QEMU PC keyboard emulation
	3	*
	4	* Copyright (c) 2003 Fabrice Bellard
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
80cabfad FB	24	#include "vl.h"
	25
	26	/* debug PC keyboard */
	27	//#define DEBUG_KBD
	28
	29	/* debug PC keyboard : only mouse */
	30	//#define DEBUG_MOUSE
	31
	32	/* Keyboard Controller Commands */
	33	#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
	34	#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
	35	#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
	36	#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
	37	#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
	38	#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
	39	#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
	40	#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
	41	#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
	42	#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
	43	#define KBD_CCMD_READ_INPORT 0xC0 /* read input port */
	44	#define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */
	45	#define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */
	46	#define KBD_CCMD_WRITE_OBUF 0xD2
	47	#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
	48	initiated by the auxiliary device */
	49	#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
	50	#define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */
	51	#define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */
	52	#define KBD_CCMD_RESET 0xFE
	53
	54	/* Keyboard Commands */
	55	#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
	56	#define KBD_CMD_ECHO 0xEE
	57	#define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */
	58	#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
	59	#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
	60	#define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */
	61	#define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */
	62	#define KBD_CMD_RESET 0xFF /* Reset */
	63
	64	/* Keyboard Replies */
	65	#define KBD_REPLY_POR 0xAA /* Power on reset */
	66	#define KBD_REPLY_ACK 0xFA /* Command ACK */
	67	#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
	68
	69	/* Status Register Bits */
	70	#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
	71	#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
	72	#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
	73	#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
	74	#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
	75	#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
	76	#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
	77	#define KBD_STAT_PERR 0x80 /* Parity error */
	78
	79	/* Controller Mode Register Bits */
	80	#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
	81	#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
	82	#define KBD_MODE_SYS 0x04 /* The system flag (?) */
	83	#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
	84	#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
	85	#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
	86	#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
	87	#define KBD_MODE_RFU 0x80
88
89	/* Mouse Commands */
90	#define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */
91	#define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */
92	#define AUX_SET_RES 0xE8 /* Set resolution */
93	#define AUX_GET_SCALE 0xE9 /* Get scaling factor */
94	#define AUX_SET_STREAM 0xEA /* Set stream mode */
95	#define AUX_POLL 0xEB /* Poll */
96	#define AUX_RESET_WRAP 0xEC /* Reset wrap mode */
97	#define AUX_SET_WRAP 0xEE /* Set wrap mode */
98	#define AUX_SET_REMOTE 0xF0 /* Set remote mode */
99	#define AUX_GET_TYPE 0xF2 /* Get type */
100	#define AUX_SET_SAMPLE 0xF3 /* Set sample rate */
101	#define AUX_ENABLE_DEV 0xF4 /* Enable aux device */
102	#define AUX_DISABLE_DEV 0xF5 /* Disable aux device */
103	#define AUX_SET_DEFAULT 0xF6
104	#define AUX_RESET 0xFF /* Reset aux device */
105	#define AUX_ACK 0xFA /* Command byte ACK. */
106
107	#define MOUSE_STATUS_REMOTE 0x40
108	#define MOUSE_STATUS_ENABLED 0x20
109	#define MOUSE_STATUS_SCALE21 0x10
110
111	#define KBD_QUEUE_SIZE 256
112
daa57963 FB	113	#define KBD_PENDING_KBD 1
daa57963 FB	114	#define KBD_PENDING_AUX 2
80cabfad FB	115
80cabfad FB	116	typedef struct KBDState {
80cabfad FB	117	uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
	118	uint8_t status;
	119	uint8_t mode;
daa57963	120	/* Bitmask of devices with data available. */
7783e9f0	121	uint8_t pending;
daa57963 FB	122	void *kbd;
daa57963 FB	123	void *mouse;
b7678d96	124
d537cf6c PB	125	qemu_irq irq_kbd;
d537cf6c PB	126	qemu_irq irq_mouse;
b92bb99b	127	target_phys_addr_t base;
80cabfad FB	128	} KBDState;
	129
	130	KBDState kbd_state;
80cabfad FB	131
	132	/* update irq and KBD_STAT_[MOUSE_]OBF */
	133	/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
	134	incorrect, but it avoids having to simulate exact delays */
	135	static void kbd_update_irq(KBDState *s)
	136	{
b7678d96	137	int irq_kbd_level, irq_mouse_level;
80cabfad	138
b7678d96 TS	139	irq_kbd_level = 0;
b7678d96 TS	140	irq_mouse_level = 0;
80cabfad	141	s->status &= ~(KBD_STAT_OBF \| KBD_STAT_MOUSE_OBF);
daa57963	142	if (s->pending) {
80cabfad	143	s->status \|= KBD_STAT_OBF;
b92bb99b	144	/* kbd data takes priority over aux data. */
daa57963	145	if (s->pending == KBD_PENDING_AUX) {
80cabfad FB	146	s->status \|= KBD_STAT_MOUSE_OBF;
80cabfad FB	147	if (s->mode & KBD_MODE_MOUSE_INT)
b7678d96	148	irq_mouse_level = 1;
80cabfad FB	149	} else {
	150	if ((s->mode & KBD_MODE_KBD_INT) &&
	151	!(s->mode & KBD_MODE_DISABLE_KBD))
b7678d96	152	irq_kbd_level = 1;
80cabfad FB	153	}
80cabfad FB	154	}
d537cf6c PB	155	qemu_set_irq(s->irq_kbd, irq_kbd_level);
d537cf6c PB	156	qemu_set_irq(s->irq_mouse, irq_mouse_level);
80cabfad FB	157	}
80cabfad FB	158
daa57963	159	static void kbd_update_kbd_irq(void *opaque, int level)
80cabfad	160	{
daa57963	161	KBDState s = (KBDState )opaque;
80cabfad	162
daa57963 FB	163	if (level)
daa57963 FB	164	s->pending \|= KBD_PENDING_KBD;
80cabfad	165	else
daa57963	166	s->pending &= ~KBD_PENDING_KBD;
80cabfad FB	167	kbd_update_irq(s);
	168	}
	169
daa57963	170	static void kbd_update_aux_irq(void *opaque, int level)
80cabfad	171	{
daa57963 FB	172	KBDState s = (KBDState )opaque;
	173
	174	if (level)
	175	s->pending \|= KBD_PENDING_AUX;
	176	else
	177	s->pending &= ~KBD_PENDING_AUX;
	178	kbd_update_irq(s);
80cabfad FB	179	}
80cabfad FB	180
b41a2cd1	181	static uint32_t kbd_read_status(void *opaque, uint32_t addr)
80cabfad	182	{
b41a2cd1	183	KBDState *s = opaque;
80cabfad FB	184	int val;
	185	val = s->status;
	186	#if defined(DEBUG_KBD)
	187	printf("kbd: read status=0x%02x\n", val);
	188	#endif
	189	return val;
	190	}
	191
daa57963 FB	192	static void kbd_queue(KBDState *s, int b, int aux)
	193	{
	194	if (aux)
	195	ps2_queue(s->mouse, b);
	196	else
	197	ps2_queue(s->kbd, b);
	198	}
	199
b41a2cd1	200	static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
80cabfad	201	{
b41a2cd1	202	KBDState *s = opaque;
80cabfad FB	203
	204	#ifdef DEBUG_KBD
	205	printf("kbd: write cmd=0x%02x\n", val);
	206	#endif
	207	switch(val) {
	208	case KBD_CCMD_READ_MODE:
	209	kbd_queue(s, s->mode, 0);
	210	break;
	211	case KBD_CCMD_WRITE_MODE:
	212	case KBD_CCMD_WRITE_OBUF:
	213	case KBD_CCMD_WRITE_AUX_OBUF:
	214	case KBD_CCMD_WRITE_MOUSE:
	215	case KBD_CCMD_WRITE_OUTPORT:
	216	s->write_cmd = val;
	217	break;
	218	case KBD_CCMD_MOUSE_DISABLE:
	219	s->mode \|= KBD_MODE_DISABLE_MOUSE;
	220	break;
	221	case KBD_CCMD_MOUSE_ENABLE:
	222	s->mode &= ~KBD_MODE_DISABLE_MOUSE;
	223	break;
	224	case KBD_CCMD_TEST_MOUSE:
	225	kbd_queue(s, 0x00, 0);
	226	break;
	227	case KBD_CCMD_SELF_TEST:
	228	s->status \|= KBD_STAT_SELFTEST;
	229	kbd_queue(s, 0x55, 0);
	230	break;
	231	case KBD_CCMD_KBD_TEST:
	232	kbd_queue(s, 0x00, 0);
	233	break;
	234	case KBD_CCMD_KBD_DISABLE:
	235	s->mode \|= KBD_MODE_DISABLE_KBD;
	236	kbd_update_irq(s);
	237	break;
	238	case KBD_CCMD_KBD_ENABLE:
	239	s->mode &= ~KBD_MODE_DISABLE_KBD;
	240	kbd_update_irq(s);
	241	break;
	242	case KBD_CCMD_READ_INPORT:
	243	kbd_queue(s, 0x00, 0);
	244	break;
	245	case KBD_CCMD_READ_OUTPORT:
	246	/* XXX: check that */
	247	#ifdef TARGET_I386
c68ea704	248	val = 0x01 \| (ioport_get_a20() << 1);
80cabfad FB	249	#else
	250	val = 0x01;
	251	#endif
	252	if (s->status & KBD_STAT_OBF)
	253	val \|= 0x10;
	254	if (s->status & KBD_STAT_MOUSE_OBF)
	255	val \|= 0x20;
	256	kbd_queue(s, val, 0);
	257	break;
	258	#ifdef TARGET_I386
	259	case KBD_CCMD_ENABLE_A20:
c68ea704	260	ioport_set_a20(1);
80cabfad FB	261	break;
80cabfad FB	262	case KBD_CCMD_DISABLE_A20:
c68ea704	263	ioport_set_a20(0);
80cabfad FB	264	break;
	265	#endif
	266	case KBD_CCMD_RESET:
d7d02e3c	267	qemu_system_reset_request();
80cabfad FB	268	break;
	269	case 0xff:
	270	/* ignore that - I don't know what is its use */
	271	break;
	272	default:
	273	fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
	274	break;
	275	}
	276	}
	277
b41a2cd1	278	static uint32_t kbd_read_data(void *opaque, uint32_t addr)
80cabfad	279	{
63066f4f	280	KBDState *s = opaque;
80cabfad	281
daa57963 FB	282	if (s->pending == KBD_PENDING_AUX)
daa57963 FB	283	return ps2_read_data(s->mouse);
80cabfad	284
daa57963	285	return ps2_read_data(s->kbd);
80cabfad FB	286	}
80cabfad FB	287
b41a2cd1	288	void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
80cabfad	289	{
b41a2cd1	290	KBDState *s = opaque;
80cabfad FB	291
	292	#ifdef DEBUG_KBD
	293	printf("kbd: write data=0x%02x\n", val);
	294	#endif
	295
	296	switch(s->write_cmd) {
	297	case 0:
daa57963	298	ps2_write_keyboard(s->kbd, val);
80cabfad FB	299	break;
	300	case KBD_CCMD_WRITE_MODE:
	301	s->mode = val;
f94f5d71	302	ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
daa57963	303	/* ??? */
80cabfad FB	304	kbd_update_irq(s);
	305	break;
	306	case KBD_CCMD_WRITE_OBUF:
	307	kbd_queue(s, val, 0);
	308	break;
	309	case KBD_CCMD_WRITE_AUX_OBUF:
	310	kbd_queue(s, val, 1);
	311	break;
	312	case KBD_CCMD_WRITE_OUTPORT:
	313	#ifdef TARGET_I386
c68ea704	314	ioport_set_a20((val >> 1) & 1);
80cabfad FB	315	#endif
80cabfad FB	316	if (!(val & 1)) {
d7d02e3c	317	qemu_system_reset_request();
80cabfad FB	318	}
	319	break;
	320	case KBD_CCMD_WRITE_MOUSE:
daa57963	321	ps2_write_mouse(s->mouse, val);
80cabfad FB	322	break;
	323	default:
	324	break;
	325	}
	326	s->write_cmd = 0;
	327	}
	328
d7d02e3c	329	static void kbd_reset(void *opaque)
80cabfad	330	{
d7d02e3c	331	KBDState *s = opaque;
80cabfad	332
80cabfad FB	333	s->mode = KBD_MODE_KBD_INT \| KBD_MODE_MOUSE_INT;
80cabfad FB	334	s->status = KBD_STAT_CMD \| KBD_STAT_UNLOCKED;
80cabfad FB	335	}
80cabfad FB	336
675376f2 FB	337	static void kbd_save(QEMUFile* f, void* opaque)
	338	{
	339	KBDState s = (KBDState)opaque;
	340
	341	qemu_put_8s(f, &s->write_cmd);
	342	qemu_put_8s(f, &s->status);
	343	qemu_put_8s(f, &s->mode);
7783e9f0	344	qemu_put_8s(f, &s->pending);
675376f2 FB	345	}
	346
	347	static int kbd_load(QEMUFile* f, void* opaque, int version_id)
	348	{
	349	KBDState s = (KBDState)opaque;
	350
7783e9f0	351	if (version_id != 3)
675376f2 FB	352	return -EINVAL;
	353	qemu_get_8s(f, &s->write_cmd);
	354	qemu_get_8s(f, &s->status);
	355	qemu_get_8s(f, &s->mode);
7783e9f0	356	qemu_get_8s(f, &s->pending);
675376f2 FB	357	return 0;
	358	}
	359
d537cf6c	360	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
80cabfad	361	{
b41a2cd1	362	KBDState *s = &kbd_state;
b7678d96	363
d537cf6c PB	364	s->irq_kbd = kbd_irq;
d537cf6c PB	365	s->irq_mouse = mouse_irq;
b92bb99b	366
b41a2cd1	367	kbd_reset(s);
7783e9f0	368	register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
b7678d96 TS	369	register_ioport_read(io_base, 1, 1, kbd_read_data, s);
	370	register_ioport_write(io_base, 1, 1, kbd_write_data, s);
	371	register_ioport_read(io_base + 4, 1, 1, kbd_read_status, s);
	372	register_ioport_write(io_base + 4, 1, 1, kbd_write_command, s);
63066f4f	373
daa57963 FB	374	s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
daa57963 FB	375	s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
548df2ac TS	376	#ifdef TARGET_I386
	377	vmmouse_init(s->mouse);
	378	#endif
d7d02e3c	379	qemu_register_reset(kbd_reset, s);
80cabfad	380	}
b92bb99b TS	381
	382	/* Memory mapped interface */
	383	uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
	384	{
	385	KBDState *s = opaque;
	386
	387	if (addr == s->base)
	388	return kbd_read_data(s, 0);
	389	else
	390	return kbd_read_status(s, 0);
	391	}
	392
	393	void kbd_mm_writeb (void *opaque,
	394	target_phys_addr_t addr, uint32_t value)
	395	{
	396	KBDState *s = opaque;
	397
	398	if (addr == s->base)
	399	kbd_write_data(s, 0, value);
	400	else
	401	kbd_write_command(s, 0, value);
	402	}
	403
	404	static CPUReadMemoryFunc *kbd_mm_read[] = {
	405	&kbd_mm_readb,
	406	&kbd_mm_readb,
	407	&kbd_mm_readb,
	408	};
	409
	410	static CPUWriteMemoryFunc *kbd_mm_write[] = {
	411	&kbd_mm_writeb,
	412	&kbd_mm_writeb,
	413	&kbd_mm_writeb,
	414	};
	415
	416	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq, target_ulong base, int it_shift)
	417	{
	418	KBDState *s = &kbd_state;
	419	int s_io_memory;
	420
	421	s->irq_kbd = kbd_irq;
	422	s->irq_mouse = mouse_irq;
	423	s->base = base;
	424
	425	kbd_reset(s);
	426	register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
	427	s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
	428	cpu_register_physical_memory(base & ~(TARGET_PAGE_SIZE - 1), TARGET_PAGE_SIZE, s_io_memory);
	429
	430	s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
	431	s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
	432	#ifdef TARGET_I386
	433	vmmouse_init(s->mouse);
	434	#endif
	435	qemu_register_reset(kbd_reset, s);
	436	}