]> git.proxmox.com Git - mirror_qemu.git/blame - hw/pl050.c
qom: Unify type registration
[mirror_qemu.git] / hw / pl050.c
CommitLineData
5fafdf24 1/*
69db0ac7 2 * Arm PrimeCell PL050 Keyboard / Mouse Interface
cdbdb648 3 *
9e61ec31 4 * Copyright (c) 2006-2007 CodeSourcery.
cdbdb648
PB
5 * Written by Paul Brook
6 *
8e31bf38 7 * This code is licensed under the GPL.
cdbdb648
PB
8 */
9
86394e96 10#include "sysbus.h"
87ecb68b 11#include "ps2.h"
cdbdb648
PB
12
13typedef struct {
86394e96 14 SysBusDevice busdev;
b8f7a738 15 MemoryRegion iomem;
cdbdb648 16 void *dev;
cdbdb648
PB
17 uint32_t cr;
18 uint32_t clk;
19 uint32_t last;
cdbdb648 20 int pending;
d537cf6c 21 qemu_irq irq;
cdbdb648
PB
22 int is_mouse;
23} pl050_state;
24
d6ac172a
PM
25static const VMStateDescription vmstate_pl050 = {
26 .name = "pl050",
27 .version_id = 1,
28 .minimum_version_id = 1,
29 .fields = (VMStateField[]) {
30 VMSTATE_UINT32(cr, pl050_state),
31 VMSTATE_UINT32(clk, pl050_state),
32 VMSTATE_UINT32(last, pl050_state),
33 VMSTATE_INT32(pending, pl050_state),
34 VMSTATE_INT32(is_mouse, pl050_state),
35 VMSTATE_END_OF_LIST()
36 }
37};
38
9e61ec31
PB
39#define PL050_TXEMPTY (1 << 6)
40#define PL050_TXBUSY (1 << 5)
41#define PL050_RXFULL (1 << 4)
42#define PL050_RXBUSY (1 << 3)
43#define PL050_RXPARITY (1 << 2)
44#define PL050_KMIC (1 << 1)
45#define PL050_KMID (1 << 0)
46
cdbdb648
PB
47static const unsigned char pl050_id[] =
48{ 0x50, 0x10, 0x04, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
49
50static void pl050_update(void *opaque, int level)
51{
52 pl050_state *s = (pl050_state *)opaque;
53 int raise;
54
55 s->pending = level;
56 raise = (s->pending && (s->cr & 0x10) != 0)
57 || (s->cr & 0x08) != 0;
d537cf6c 58 qemu_set_irq(s->irq, raise);
cdbdb648
PB
59}
60
b8f7a738
AK
61static uint64_t pl050_read(void *opaque, target_phys_addr_t offset,
62 unsigned size)
cdbdb648
PB
63{
64 pl050_state *s = (pl050_state *)opaque;
cdbdb648
PB
65 if (offset >= 0xfe0 && offset < 0x1000)
66 return pl050_id[(offset - 0xfe0) >> 2];
67
68 switch (offset >> 2) {
69 case 0: /* KMICR */
70 return s->cr;
71 case 1: /* KMISTAT */
9e61ec31
PB
72 {
73 uint8_t val;
74 uint32_t stat;
75
76 val = s->last;
77 val = val ^ (val >> 4);
78 val = val ^ (val >> 2);
79 val = (val ^ (val >> 1)) & 1;
80
81 stat = PL050_TXEMPTY;
82 if (val)
83 stat |= PL050_RXPARITY;
84 if (s->pending)
85 stat |= PL050_RXFULL;
86
87 return stat;
cdbdb648
PB
88 }
89 case 2: /* KMIDATA */
90 if (s->pending)
91 s->last = ps2_read_data(s->dev);
92 return s->last;
93 case 3: /* KMICLKDIV */
94 return s->clk;
95 case 4: /* KMIIR */
96 return s->pending | 2;
97 default:
2ac71179 98 hw_error("pl050_read: Bad offset %x\n", (int)offset);
cdbdb648
PB
99 return 0;
100 }
101}
102
c227f099 103static void pl050_write(void *opaque, target_phys_addr_t offset,
b8f7a738 104 uint64_t value, unsigned size)
cdbdb648
PB
105{
106 pl050_state *s = (pl050_state *)opaque;
cdbdb648
PB
107 switch (offset >> 2) {
108 case 0: /* KMICR */
109 s->cr = value;
110 pl050_update(s, s->pending);
111 /* ??? Need to implement the enable/disable bit. */
112 break;
113 case 2: /* KMIDATA */
114 /* ??? This should toggle the TX interrupt line. */
115 /* ??? This means kbd/mouse can block each other. */
116 if (s->is_mouse) {
117 ps2_write_mouse(s->dev, value);
118 } else {
119 ps2_write_keyboard(s->dev, value);
120 }
121 break;
122 case 3: /* KMICLKDIV */
123 s->clk = value;
124 return;
125 default:
2ac71179 126 hw_error("pl050_write: Bad offset %x\n", (int)offset);
cdbdb648
PB
127 }
128}
b8f7a738
AK
129static const MemoryRegionOps pl050_ops = {
130 .read = pl050_read,
131 .write = pl050_write,
132 .endianness = DEVICE_NATIVE_ENDIAN,
cdbdb648
PB
133};
134
81a322d4 135static int pl050_init(SysBusDevice *dev, int is_mouse)
cdbdb648 136{
86394e96 137 pl050_state *s = FROM_SYSBUS(pl050_state, dev);
cdbdb648 138
b8f7a738 139 memory_region_init_io(&s->iomem, &pl050_ops, s, "pl050", 0x1000);
750ecd44 140 sysbus_init_mmio(dev, &s->iomem);
86394e96 141 sysbus_init_irq(dev, &s->irq);
cdbdb648 142 s->is_mouse = is_mouse;
86394e96 143 if (s->is_mouse)
cdbdb648
PB
144 s->dev = ps2_mouse_init(pl050_update, s);
145 else
146 s->dev = ps2_kbd_init(pl050_update, s);
81a322d4 147 return 0;
cdbdb648 148}
86394e96 149
81a322d4 150static int pl050_init_keyboard(SysBusDevice *dev)
86394e96 151{
81a322d4 152 return pl050_init(dev, 0);
86394e96
PB
153}
154
81a322d4 155static int pl050_init_mouse(SysBusDevice *dev)
86394e96 156{
81a322d4 157 return pl050_init(dev, 1);
86394e96
PB
158}
159
999e12bb
AL
160static void pl050_kbd_class_init(ObjectClass *klass, void *data)
161{
39bffca2 162 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
163 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
164
165 k->init = pl050_init_keyboard;
39bffca2 166 dc->vmsd = &vmstate_pl050;
999e12bb
AL
167}
168
39bffca2
AL
169static TypeInfo pl050_kbd_info = {
170 .name = "pl050_keyboard",
171 .parent = TYPE_SYS_BUS_DEVICE,
172 .instance_size = sizeof(pl050_state),
173 .class_init = pl050_kbd_class_init,
d6ac172a
PM
174};
175
999e12bb
AL
176static void pl050_mouse_class_init(ObjectClass *klass, void *data)
177{
39bffca2 178 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb
AL
179 SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
180
181 k->init = pl050_init_mouse;
39bffca2 182 dc->vmsd = &vmstate_pl050;
999e12bb
AL
183}
184
39bffca2
AL
185static TypeInfo pl050_mouse_info = {
186 .name = "pl050_mouse",
187 .parent = TYPE_SYS_BUS_DEVICE,
188 .instance_size = sizeof(pl050_state),
189 .class_init = pl050_mouse_class_init,
d6ac172a
PM
190};
191
83f7d43a 192static void pl050_register_types(void)
86394e96 193{
39bffca2
AL
194 type_register_static(&pl050_kbd_info);
195 type_register_static(&pl050_mouse_info);
86394e96
PB
196}
197
83f7d43a 198type_init(pl050_register_types)