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Commit | Line | Data |
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e6eaabeb SW |
1 | #ifndef PPCE500_H |
2 | #define PPCE500_H | |
3 | ||
92238367 | 4 | #include "hw/boards.h" |
a3fc8396 | 5 | #include "hw/platform-bus.h" |
db1015e9 | 6 | #include "qom/object.h" |
92238367 | 7 | |
db1015e9 | 8 | struct PPCE500MachineState { |
03f04809 IM |
9 | /*< private >*/ |
10 | MachineState parent_obj; | |
11 | ||
a3fc8396 IM |
12 | /* points to instance of TYPE_PLATFORM_BUS_DEVICE if |
13 | * board supports dynamic sysbus devices | |
14 | */ | |
15 | PlatformBusDevice *pbus_dev; | |
db1015e9 EH |
16 | }; |
17 | typedef struct PPCE500MachineState PPCE500MachineState; | |
03f04809 | 18 | |
db1015e9 | 19 | struct PPCE500MachineClass { |
03f04809 IM |
20 | /*< private >*/ |
21 | MachineClass parent_class; | |
e6eaabeb | 22 | |
e6eaabeb | 23 | /* required -- must at least add toplevel board compatible */ |
03f04809 IM |
24 | void (*fixup_devtree)(void *fdt); |
25 | ||
26 | int pci_first_slot; | |
27 | int pci_nr_slots; | |
f5fba9d2 SW |
28 | |
29 | int mpic_version; | |
b88e77f4 | 30 | bool has_mpc8xxx_gpio; |
f7087343 AG |
31 | bool has_platform_bus; |
32 | hwaddr platform_bus_base; | |
33 | hwaddr platform_bus_size; | |
34 | int platform_bus_first_irq; | |
35 | int platform_bus_num_irqs; | |
2eaaac1f AG |
36 | hwaddr ccsrbar_base; |
37 | hwaddr pci_pio_base; | |
cb3778a0 AG |
38 | hwaddr pci_mmio_base; |
39 | hwaddr pci_mmio_bus_base; | |
2eaaac1f | 40 | hwaddr spin_base; |
db1015e9 EH |
41 | }; |
42 | typedef struct PPCE500MachineClass PPCE500MachineClass; | |
e6eaabeb | 43 | |
03f04809 | 44 | void ppce500_init(MachineState *machine); |
e6eaabeb | 45 | |
a36848ff AL |
46 | hwaddr booke206_page_size_to_tlb(uint64_t size); |
47 | ||
03f04809 | 48 | #define TYPE_PPCE500_MACHINE "ppce500-base-machine" |
8110fa1d EH |
49 | DECLARE_OBJ_CHECKERS(PPCE500MachineState, PPCE500MachineClass, |
50 | PPCE500_MACHINE, TYPE_PPCE500_MACHINE) | |
03f04809 | 51 | |
e6eaabeb | 52 | #endif |