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Commit | Line | Data |
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64201201 | 1 | /* |
3cbee15b | 2 | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator |
5fafdf24 | 3 | * |
47103572 | 4 | * Copyright (c) 2004-2007 Fabrice Bellard |
3cbee15b | 5 | * Copyright (c) 2007 Jocelyn Mayer |
5fafdf24 | 6 | * |
64201201 FB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
915cd3a9 AG |
24 | * |
25 | * PCI bus layout on a real G5 (U3 based): | |
26 | * | |
27 | * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b] | |
28 | * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150] | |
29 | * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a] | |
30 | * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) | |
31 | * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) | |
32 | * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045] | |
33 | * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046] | |
34 | * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047] | |
35 | * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048] | |
36 | * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049] | |
37 | * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20) | |
38 | * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] | |
39 | * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] | |
40 | * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) | |
41 | * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) | |
42 | * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04) | |
43 | * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043] | |
44 | * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042] | |
45 | * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c] | |
46 | * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240] | |
47 | * | |
64201201 | 48 | */ |
0d75590d | 49 | #include "qemu/osdep.h" |
da34e65c | 50 | #include "qapi/error.h" |
baec1910 | 51 | #include "hw/hw.h" |
0d09e41a | 52 | #include "hw/ppc/ppc.h" |
baec1910 | 53 | #include "hw/ppc/mac.h" |
0d09e41a PB |
54 | #include "hw/input/adb.h" |
55 | #include "hw/ppc/mac_dbdma.h" | |
56 | #include "hw/timer/m48t59.h" | |
baec1910 | 57 | #include "hw/pci/pci.h" |
1422e32d | 58 | #include "net/net.h" |
9c17d615 | 59 | #include "sysemu/sysemu.h" |
baec1910 | 60 | #include "hw/boards.h" |
0d09e41a PB |
61 | #include "hw/nvram/fw_cfg.h" |
62 | #include "hw/char/escc.h" | |
e1218e48 | 63 | #include "hw/misc/macio/macio.h" |
0d09e41a | 64 | #include "hw/ppc/openpic.h" |
baec1910 AF |
65 | #include "hw/ide.h" |
66 | #include "hw/loader.h" | |
5d19be6c | 67 | #include "hw/fw-path-provider.h" |
ca20cf32 | 68 | #include "elf.h" |
c525436e | 69 | #include "qemu/error-report.h" |
9c17d615 | 70 | #include "sysemu/kvm.h" |
dc333cd6 | 71 | #include "kvm_ppc.h" |
a2236d48 | 72 | #include "hw/usb.h" |
022c62cb | 73 | #include "exec/address-spaces.h" |
baec1910 | 74 | #include "hw/sysbus.h" |
5283c27f | 75 | #include "trace.h" |
267002cd | 76 | |
e4bcb14c | 77 | #define MAX_IDE_BUS 2 |
006f3a48 | 78 | #define CFG_ADDR 0xf0000510 |
536d8cda | 79 | #define TBFREQ (100UL * 1000UL * 1000UL) |
3c062289 | 80 | #define CLOCKFREQ (900UL * 1000UL * 1000UL) |
9d1c1283 | 81 | #define BUSFREQ (100UL * 1000UL * 1000UL) |
e4bcb14c | 82 | |
53ecf09d MCA |
83 | #define NDRV_VGA_FILENAME "qemu_vga.ndrv" |
84 | ||
0aa6a4a2 | 85 | |
ddcd5531 GA |
86 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
87 | Error **errp) | |
513f789f | 88 | { |
48779e50 | 89 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); |
513f789f BS |
90 | } |
91 | ||
409dbce5 AJ |
92 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
93 | { | |
94 | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; | |
95 | } | |
96 | ||
1bba0dc9 AF |
97 | static void ppc_core99_reset(void *opaque) |
98 | { | |
6680988c | 99 | PowerPCCPU *cpu = opaque; |
1bba0dc9 | 100 | |
6680988c | 101 | cpu_reset(CPU(cpu)); |
20f649dd AG |
102 | /* 970 CPUs want to get their initial IP as part of their boot protocol */ |
103 | cpu->env.nip = PROM_ADDR + 0x100; | |
1bba0dc9 AF |
104 | } |
105 | ||
3cbee15b | 106 | /* PowerPC Mac99 hardware initialisation */ |
3ef96221 | 107 | static void ppc_core99_init(MachineState *machine) |
64201201 | 108 | { |
3ef96221 | 109 | ram_addr_t ram_size = machine->ram_size; |
3ef96221 MA |
110 | const char *kernel_filename = machine->kernel_filename; |
111 | const char *kernel_cmdline = machine->kernel_cmdline; | |
112 | const char *initrd_filename = machine->initrd_filename; | |
113 | const char *boot_device = machine->boot_order; | |
f1114c17 | 114 | Core99MachineState *core99_machine = CORE99_MACHINE(machine); |
8f8204ec | 115 | PowerPCCPU *cpu = NULL; |
e2684c0b | 116 | CPUPPCState *env = NULL; |
5cea8590 | 117 | char *filename; |
9929301e | 118 | IrqLines *openpic_irqs; |
d0b72631 | 119 | int linux_boot, i, j, k; |
febbd7c2 | 120 | MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); |
a8170e5e | 121 | hwaddr kernel_base, initrd_base, cmdline_base = 0; |
093209cd | 122 | long kernel_size, initrd_size; |
c90c393c | 123 | UNINHostState *uninorth_pci; |
46e50e9d | 124 | PCIBus *pci_bus; |
dda12e9a | 125 | NewWorldMacIOState *macio; |
f1114c17 | 126 | bool has_pmu, has_adb; |
07a7484e | 127 | MACIOIDEState *macio_ide; |
293c867d | 128 | BusState *adb_bus; |
3cbee15b | 129 | MacIONVRAMState *nvr; |
9776874f | 130 | int bios_size; |
28c5af54 | 131 | int ppc_boot_device; |
f455e98c | 132 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
006f3a48 | 133 | void *fw_cfg; |
0f921197 | 134 | int machine_arch; |
d0b72631 | 135 | SysBusDevice *s; |
dda12e9a | 136 | DeviceState *dev, *pic_dev; |
261265cc | 137 | hwaddr nvram_addr = 0xFFF04000; |
caae6c96 | 138 | uint64_t tbfreq; |
46e50e9d | 139 | |
64201201 FB |
140 | linux_boot = (kernel_filename != NULL); |
141 | ||
c68ea704 | 142 | /* init CPUs */ |
e9df014c | 143 | for (i = 0; i < smp_cpus; i++) { |
9dff4c07 | 144 | cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); |
8f8204ec AF |
145 | env = &cpu->env; |
146 | ||
e9df014c | 147 | /* Set time-base frequency to 100 Mhz */ |
536d8cda | 148 | cpu_ppc_tb_init(env, TBFREQ); |
6680988c | 149 | qemu_register_reset(ppc_core99_reset, cpu); |
e9df014c | 150 | } |
c68ea704 | 151 | |
64201201 | 152 | /* allocate RAM */ |
e938ba0c | 153 | memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size); |
febbd7c2 | 154 | memory_region_add_subregion(get_system_memory(), 0, ram); |
864c136a | 155 | |
64201201 | 156 | /* allocate and load BIOS */ |
98a99ce0 | 157 | memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, |
f8ed85ac | 158 | &error_fatal); |
e206ad48 | 159 | |
1192dad8 | 160 | if (bios_name == NULL) |
006f3a48 | 161 | bios_name = PROM_FILENAME; |
5cea8590 | 162 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
febbd7c2 AK |
163 | memory_region_set_readonly(bios, true); |
164 | memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios); | |
006f3a48 BS |
165 | |
166 | /* Load OpenBIOS (ELF) */ | |
5cea8590 | 167 | if (filename) { |
409dbce5 | 168 | bios_size = load_elf(filename, NULL, NULL, NULL, |
7ef295ea | 169 | NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); |
ca20cf32 | 170 | |
7267c094 | 171 | g_free(filename); |
5cea8590 PB |
172 | } else { |
173 | bios_size = -1; | |
174 | } | |
d5295253 | 175 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
c525436e | 176 | error_report("could not load PowerPC bios '%s'", bios_name); |
64201201 FB |
177 | exit(1); |
178 | } | |
3b46e624 | 179 | |
b6b8bd18 | 180 | if (linux_boot) { |
513f789f | 181 | uint64_t lowaddr = 0; |
ca20cf32 BS |
182 | int bswap_needed; |
183 | ||
184 | #ifdef BSWAP_NEEDED | |
185 | bswap_needed = 1; | |
186 | #else | |
187 | bswap_needed = 0; | |
188 | #endif | |
b6b8bd18 | 189 | kernel_base = KERNEL_LOAD_ADDR; |
513f789f | 190 | |
409dbce5 | 191 | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, |
7ef295ea PC |
192 | NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, |
193 | 0, 0); | |
513f789f BS |
194 | if (kernel_size < 0) |
195 | kernel_size = load_aout(kernel_filename, kernel_base, | |
ca20cf32 BS |
196 | ram_size - kernel_base, bswap_needed, |
197 | TARGET_PAGE_SIZE); | |
513f789f BS |
198 | if (kernel_size < 0) |
199 | kernel_size = load_image_targphys(kernel_filename, | |
200 | kernel_base, | |
201 | ram_size - kernel_base); | |
b6b8bd18 | 202 | if (kernel_size < 0) { |
c525436e | 203 | error_report("could not load kernel '%s'", kernel_filename); |
b6b8bd18 FB |
204 | exit(1); |
205 | } | |
206 | /* load initrd */ | |
207 | if (initrd_filename) { | |
39d96847 | 208 | initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
44654490 PB |
209 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
210 | ram_size - initrd_base); | |
b6b8bd18 | 211 | if (initrd_size < 0) { |
c525436e MA |
212 | error_report("could not load initial ram disk '%s'", |
213 | initrd_filename); | |
b6b8bd18 FB |
214 | exit(1); |
215 | } | |
39d96847 | 216 | cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); |
b6b8bd18 FB |
217 | } else { |
218 | initrd_base = 0; | |
219 | initrd_size = 0; | |
39d96847 | 220 | cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
b6b8bd18 | 221 | } |
6ac0e82d | 222 | ppc_boot_device = 'm'; |
b6b8bd18 FB |
223 | } else { |
224 | kernel_base = 0; | |
225 | kernel_size = 0; | |
226 | initrd_base = 0; | |
227 | initrd_size = 0; | |
28c5af54 JM |
228 | ppc_boot_device = '\0'; |
229 | /* We consider that NewWorld PowerMac never have any floppy drive | |
230 | * For now, OHW cannot boot from the network. | |
231 | */ | |
0d913fdb JM |
232 | for (i = 0; boot_device[i] != '\0'; i++) { |
233 | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { | |
234 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 235 | break; |
0d913fdb | 236 | } |
28c5af54 JM |
237 | } |
238 | if (ppc_boot_device == '\0') { | |
6f76b817 | 239 | error_report("No valid boot device for Mac99 machine"); |
28c5af54 JM |
240 | exit(1); |
241 | } | |
b6b8bd18 | 242 | } |
0aa6a4a2 | 243 | |
0662946a MCA |
244 | /* UniN init */ |
245 | dev = qdev_create(NULL, TYPE_UNI_NORTH); | |
246 | qdev_init_nofail(dev); | |
247 | s = SYS_BUS_DEVICE(dev); | |
248 | memory_region_add_subregion(get_system_memory(), 0xf8000000, | |
249 | sysbus_mmio_get_region(s, 0)); | |
47103572 | 250 | |
9929301e | 251 | openpic_irqs = g_new0(IrqLines, smp_cpus); |
3cbee15b JM |
252 | for (i = 0; i < smp_cpus; i++) { |
253 | /* Mac99 IRQ connection between OpenPIC outputs pins | |
254 | * and PowerPC input pins | |
255 | */ | |
256 | switch (PPC_INPUT(env)) { | |
257 | case PPC_FLAGS_INPUT_6xx: | |
9929301e | 258 | openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] = |
3cbee15b | 259 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
9929301e | 260 | openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] = |
3cbee15b | 261 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
9929301e | 262 | openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] = |
3cbee15b JM |
263 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; |
264 | /* Not connected ? */ | |
9929301e | 265 | openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL; |
3cbee15b | 266 | /* Check this */ |
9929301e | 267 | openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] = |
3cbee15b JM |
268 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; |
269 | break; | |
00af685f | 270 | #if defined(TARGET_PPC64) |
3cbee15b | 271 | case PPC_FLAGS_INPUT_970: |
9929301e | 272 | openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] = |
3cbee15b | 273 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
9929301e | 274 | openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] = |
3cbee15b | 275 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
9929301e | 276 | openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] = |
3cbee15b JM |
277 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; |
278 | /* Not connected ? */ | |
9929301e | 279 | openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL; |
3cbee15b | 280 | /* Check this */ |
9929301e | 281 | openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] = |
3cbee15b JM |
282 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; |
283 | break; | |
00af685f | 284 | #endif /* defined(TARGET_PPC64) */ |
3cbee15b | 285 | default: |
c525436e | 286 | error_report("Bus model not supported on mac99 machine"); |
3cbee15b | 287 | exit(1); |
0aa6a4a2 | 288 | } |
3cbee15b | 289 | } |
d0b72631 | 290 | |
dda12e9a MCA |
291 | pic_dev = qdev_create(NULL, TYPE_OPENPIC); |
292 | qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); | |
293 | qdev_init_nofail(pic_dev); | |
294 | s = SYS_BUS_DEVICE(pic_dev); | |
d0b72631 AG |
295 | k = 0; |
296 | for (i = 0; i < smp_cpus; i++) { | |
297 | for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { | |
9929301e | 298 | sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]); |
d0b72631 AG |
299 | } |
300 | } | |
1bbd6272 | 301 | g_free(openpic_irqs); |
d0b72631 | 302 | |
0f921197 AG |
303 | if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { |
304 | /* 970 gets a U3 bus */ | |
8ce3f743 MCA |
305 | /* Uninorth AGP bus */ |
306 | dev = qdev_create(NULL, TYPE_U3_AGP_HOST_BRIDGE); | |
e7755cc1 MCA |
307 | object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", |
308 | &error_abort); | |
8ce3f743 MCA |
309 | qdev_init_nofail(dev); |
310 | uninorth_pci = U3_AGP_HOST_BRIDGE(dev); | |
311 | s = SYS_BUS_DEVICE(dev); | |
312 | /* PCI hole */ | |
313 | memory_region_add_subregion(get_system_memory(), 0x80000000ULL, | |
314 | sysbus_mmio_get_region(s, 2)); | |
e226efbb MCA |
315 | /* Register 8 MB of ISA IO space */ |
316 | memory_region_add_subregion(get_system_memory(), 0xf2000000, | |
317 | sysbus_mmio_get_region(s, 3)); | |
8ce3f743 MCA |
318 | sysbus_mmio_map(s, 0, 0xf0800000); |
319 | sysbus_mmio_map(s, 1, 0xf0c00000); | |
320 | ||
0f921197 AG |
321 | machine_arch = ARCH_MAC99_U3; |
322 | } else { | |
7b19318b MCA |
323 | /* Use values found on a real PowerMac */ |
324 | /* Uninorth AGP bus */ | |
325 | dev = qdev_create(NULL, TYPE_UNI_NORTH_AGP_HOST_BRIDGE); | |
e7755cc1 MCA |
326 | object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", |
327 | &error_abort); | |
7b19318b MCA |
328 | qdev_init_nofail(dev); |
329 | s = SYS_BUS_DEVICE(dev); | |
330 | sysbus_mmio_map(s, 0, 0xf0800000); | |
331 | sysbus_mmio_map(s, 1, 0xf0c00000); | |
332 | ||
333 | /* Uninorth internal bus */ | |
334 | dev = qdev_create(NULL, TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); | |
e7755cc1 MCA |
335 | object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", |
336 | &error_abort); | |
7b19318b MCA |
337 | qdev_init_nofail(dev); |
338 | s = SYS_BUS_DEVICE(dev); | |
339 | sysbus_mmio_map(s, 0, 0xf4800000); | |
340 | sysbus_mmio_map(s, 1, 0xf4c00000); | |
341 | ||
342 | /* Uninorth main bus */ | |
343 | dev = qdev_create(NULL, TYPE_UNI_NORTH_PCI_HOST_BRIDGE); | |
03756c84 | 344 | qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000); |
e7755cc1 MCA |
345 | object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", |
346 | &error_abort); | |
7b19318b MCA |
347 | qdev_init_nofail(dev); |
348 | uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev); | |
349 | s = SYS_BUS_DEVICE(dev); | |
350 | /* PCI hole */ | |
351 | memory_region_add_subregion(get_system_memory(), 0x80000000ULL, | |
352 | sysbus_mmio_get_region(s, 2)); | |
e226efbb MCA |
353 | /* Register 8 MB of ISA IO space */ |
354 | memory_region_add_subregion(get_system_memory(), 0xf2000000, | |
355 | sysbus_mmio_get_region(s, 3)); | |
7b19318b MCA |
356 | sysbus_mmio_map(s, 0, 0xf2800000); |
357 | sysbus_mmio_map(s, 1, 0xf2c00000); | |
358 | ||
0f921197 AG |
359 | machine_arch = ARCH_MAC99; |
360 | } | |
caae6c96 | 361 | |
72f1f97d | 362 | machine->usb |= defaults_enabled() && !machine->usb_disabled; |
f1114c17 MCA |
363 | has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA); |
364 | has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA || | |
365 | core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB); | |
72f1f97d | 366 | |
caae6c96 AG |
367 | /* Timebase Frequency */ |
368 | if (kvm_enabled()) { | |
369 | tbfreq = kvmppc_get_tbfreq(); | |
370 | } else { | |
371 | tbfreq = TBFREQ; | |
372 | } | |
373 | ||
0f4b5415 MCA |
374 | /* init basic PC hardware */ |
375 | pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus; | |
376 | ||
343bd85a | 377 | /* MacIO */ |
dda12e9a | 378 | macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO)); |
07a7484e | 379 | dev = DEVICE(macio); |
b981289c | 380 | qdev_prop_set_uint64(dev, "frequency", tbfreq); |
f1114c17 MCA |
381 | qdev_prop_set_bit(dev, "has-pmu", has_pmu); |
382 | qdev_prop_set_bit(dev, "has-adb", has_adb); | |
dda12e9a MCA |
383 | object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", |
384 | &error_abort); | |
b6712ea3 | 385 | qdev_init_nofail(dev); |
07a7484e AF |
386 | |
387 | /* We only emulate 2 out of 3 IDE controllers for now */ | |
d8f94e1b | 388 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
a0bb2a5f | 389 | |
07a7484e AF |
390 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), |
391 | "ide[0]")); | |
392 | macio_ide_init_drives(macio_ide, hd); | |
393 | ||
394 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), | |
395 | "ide[1]")); | |
396 | macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); | |
0d92ed30 | 397 | |
f1114c17 | 398 | if (has_adb) { |
d811d61f MCA |
399 | if (has_pmu) { |
400 | dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu")); | |
401 | } else { | |
402 | dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); | |
403 | } | |
404 | ||
f1114c17 MCA |
405 | adb_bus = qdev_get_child_bus(dev, "adb.0"); |
406 | dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); | |
5107a9cb | 407 | qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true); |
f1114c17 | 408 | qdev_init_nofail(dev); |
d811d61f | 409 | |
f1114c17 | 410 | dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); |
5107a9cb | 411 | qdev_prop_set_bit(dev, "disable-direct-reg3-writes", true); |
f1114c17 MCA |
412 | qdev_init_nofail(dev); |
413 | } | |
45fa67fb | 414 | |
59a04198 | 415 | if (machine->usb) { |
afb9a60e | 416 | pci_create_simple(pci_bus, -1, "pci-ohci"); |
c86580b8 | 417 | |
094b287f LZ |
418 | /* U3 needs to use USB for input because Linux doesn't support via-cuda |
419 | on PPC64 */ | |
f1114c17 | 420 | if (!has_adb || machine_arch == ARCH_MAC99_U3) { |
c86580b8 MA |
421 | USBBus *usb_bus = usb_bus_find(-1); |
422 | ||
423 | usb_create_simple(usb_bus, "usb-kbd"); | |
424 | usb_create_simple(usb_bus, "usb-mouse"); | |
094b287f | 425 | } |
a2236d48 AG |
426 | } |
427 | ||
a0bb2a5f BZ |
428 | pci_vga_init(pci_bus); |
429 | ||
430 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) { | |
b6b8bd18 | 431 | graphic_depth = 15; |
a0bb2a5f BZ |
432 | } |
433 | ||
434 | for (i = 0; i < nb_nics; i++) { | |
435 | pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); | |
436 | } | |
4f3f238b | 437 | |
3cbee15b | 438 | /* The NewWorld NVRAM is not located in the MacIO device */ |
261265cc AG |
439 | #ifdef CONFIG_KVM |
440 | if (kvm_enabled() && getpagesize() > 4096) { | |
441 | /* We can't combine read-write and read-only in a single page, so | |
442 | move the NVRAM out of ROM again for KVM */ | |
443 | nvram_addr = 0xFFE00000; | |
444 | } | |
445 | #endif | |
95ed3b7c AF |
446 | dev = qdev_create(NULL, TYPE_MACIO_NVRAM); |
447 | qdev_prop_set_uint32(dev, "size", 0x2000); | |
448 | qdev_prop_set_uint32(dev, "it_shift", 1); | |
449 | qdev_init_nofail(dev); | |
261265cc | 450 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); |
95ed3b7c | 451 | nvr = MACIO_NVRAM(dev); |
3cbee15b | 452 | pmac_format_nvram_partition(nvr, 0x2000); |
b6b8bd18 | 453 | /* No PCI init: the BIOS will do it */ |
0aa6a4a2 | 454 | |
74887ed9 MCA |
455 | dev = qdev_create(NULL, TYPE_FW_CFG_MEM); |
456 | fw_cfg = FW_CFG(dev); | |
457 | qdev_prop_set_uint32(dev, "data_width", 1); | |
458 | qdev_prop_set_bit(dev, "dma_enabled", false); | |
459 | object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, | |
460 | OBJECT(fw_cfg), NULL); | |
461 | qdev_init_nofail(dev); | |
462 | s = SYS_BUS_DEVICE(dev); | |
463 | sysbus_mmio_map(s, 0, CFG_ADDR); | |
464 | sysbus_mmio_map(s, 1, CFG_ADDR + 2); | |
465 | ||
5836d168 | 466 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); |
70db9222 | 467 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); |
006f3a48 | 468 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
0f921197 | 469 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch); |
513f789f BS |
470 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
471 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
472 | if (kernel_cmdline) { | |
b9e17a34 AG |
473 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); |
474 | pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); | |
513f789f BS |
475 | } else { |
476 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
477 | } | |
478 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
479 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
480 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
10696b4f BS |
481 | |
482 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
483 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
484 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
485 | ||
f1114c17 MCA |
486 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config); |
487 | ||
45024f09 | 488 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); |
dc333cd6 AG |
489 | if (kvm_enabled()) { |
490 | #ifdef CONFIG_KVM | |
45024f09 AG |
491 | uint8_t *hypercall; |
492 | ||
7267c094 | 493 | hypercall = g_malloc(16); |
45024f09 AG |
494 | kvmppc_get_hypercall(env, hypercall, 16); |
495 | fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); | |
496 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); | |
dc333cd6 | 497 | #endif |
dc333cd6 | 498 | } |
caae6c96 | 499 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); |
a1014f25 | 500 | /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ |
9d1c1283 BZ |
501 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); |
502 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); | |
261265cc | 503 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr); |
dc333cd6 | 504 | |
53ecf09d MCA |
505 | /* MacOS NDRV VGA driver */ |
506 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); | |
507 | if (filename) { | |
9776874f PM |
508 | gchar *ndrv_file; |
509 | gsize ndrv_size; | |
53ecf09d | 510 | |
9776874f | 511 | if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) { |
53ecf09d MCA |
512 | fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); |
513 | } | |
514 | g_free(filename); | |
515 | } | |
516 | ||
513f789f | 517 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
aae9366a | 518 | } |
0aa6a4a2 | 519 | |
5d19be6c MCA |
520 | /* |
521 | * Implementation of an interface to adjust firmware path | |
522 | * for the bootindex property handling. | |
523 | */ | |
524 | static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus, | |
525 | DeviceState *dev) | |
526 | { | |
527 | PCIDevice *pci; | |
528 | IDEBus *ide_bus; | |
529 | IDEState *ide_s; | |
530 | MACIOIDEState *macio_ide; | |
531 | ||
532 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) { | |
533 | pci = PCI_DEVICE(dev); | |
534 | return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn)); | |
535 | } | |
536 | ||
537 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) { | |
538 | macio_ide = MACIO_IDE(dev); | |
539 | return g_strdup_printf("ata-3@%x", macio_ide->addr); | |
540 | } | |
541 | ||
542 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) { | |
543 | ide_bus = IDE_BUS(qdev_get_parent_bus(dev)); | |
544 | ide_s = idebus_active_if(ide_bus); | |
545 | ||
546 | if (ide_s->drive_kind == IDE_CD) { | |
547 | return g_strdup("cdrom"); | |
548 | } | |
549 | ||
550 | return g_strdup("hd"); | |
551 | } | |
552 | ||
553 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) { | |
554 | return g_strdup("hd"); | |
555 | } | |
556 | ||
557 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) { | |
558 | return g_strdup("cdrom"); | |
559 | } | |
560 | ||
561 | if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) { | |
562 | return g_strdup("disk"); | |
563 | } | |
564 | ||
565 | return NULL; | |
566 | } | |
567 | ||
277c7a4d AG |
568 | static int core99_kvm_type(const char *arg) |
569 | { | |
570 | /* Always force PR KVM */ | |
571 | return 2; | |
572 | } | |
573 | ||
b1c2fb9b MA |
574 | static void core99_machine_class_init(ObjectClass *oc, void *data) |
575 | { | |
576 | MachineClass *mc = MACHINE_CLASS(oc); | |
5d19be6c | 577 | FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc); |
b1c2fb9b | 578 | |
b1c2fb9b MA |
579 | mc->desc = "Mac99 based PowerMAC"; |
580 | mc->init = ppc_core99_init; | |
2059839b | 581 | mc->block_default_type = IF_IDE; |
b1c2fb9b MA |
582 | mc->max_cpus = MAX_CPUS; |
583 | mc->default_boot_order = "cd"; | |
3232794b | 584 | mc->default_display = "std"; |
b1c2fb9b | 585 | mc->kvm_type = core99_kvm_type; |
9dff4c07 IM |
586 | #ifdef TARGET_PPC64 |
587 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1"); | |
588 | #else | |
589 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9"); | |
590 | #endif | |
5d19be6c MCA |
591 | mc->ignore_boot_device_suffixes = true; |
592 | fwc->get_dev_path = core99_fw_dev_path; | |
b1c2fb9b MA |
593 | } |
594 | ||
f1114c17 MCA |
595 | static char *core99_get_via_config(Object *obj, Error **errp) |
596 | { | |
597 | Core99MachineState *cms = CORE99_MACHINE(obj); | |
598 | ||
599 | switch (cms->via_config) { | |
600 | default: | |
601 | case CORE99_VIA_CONFIG_CUDA: | |
602 | return g_strdup("cuda"); | |
603 | ||
604 | case CORE99_VIA_CONFIG_PMU: | |
605 | return g_strdup("pmu"); | |
606 | ||
607 | case CORE99_VIA_CONFIG_PMU_ADB: | |
608 | return g_strdup("pmu-adb"); | |
609 | } | |
610 | } | |
611 | ||
612 | static void core99_set_via_config(Object *obj, const char *value, Error **errp) | |
613 | { | |
614 | Core99MachineState *cms = CORE99_MACHINE(obj); | |
615 | ||
616 | if (!strcmp(value, "cuda")) { | |
617 | cms->via_config = CORE99_VIA_CONFIG_CUDA; | |
618 | } else if (!strcmp(value, "pmu")) { | |
619 | cms->via_config = CORE99_VIA_CONFIG_PMU; | |
620 | } else if (!strcmp(value, "pmu-adb")) { | |
621 | cms->via_config = CORE99_VIA_CONFIG_PMU_ADB; | |
622 | } else { | |
623 | error_setg(errp, "Invalid via value"); | |
624 | error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n"); | |
625 | } | |
626 | } | |
627 | ||
06fe3a5b MCA |
628 | static void core99_instance_init(Object *obj) |
629 | { | |
f1114c17 MCA |
630 | Core99MachineState *cms = CORE99_MACHINE(obj); |
631 | ||
632 | /* Default via_config is CORE99_VIA_CONFIG_CUDA */ | |
633 | cms->via_config = CORE99_VIA_CONFIG_CUDA; | |
634 | object_property_add_str(obj, "via", core99_get_via_config, | |
635 | core99_set_via_config, NULL); | |
636 | object_property_set_description(obj, "via", | |
637 | "Set VIA configuration. " | |
638 | "Valid values are cuda, pmu and pmu-adb", | |
639 | NULL); | |
640 | ||
06fe3a5b MCA |
641 | return; |
642 | } | |
643 | ||
b1c2fb9b | 644 | static const TypeInfo core99_machine_info = { |
c0f36518 | 645 | .name = MACHINE_TYPE_NAME("mac99"), |
b1c2fb9b MA |
646 | .parent = TYPE_MACHINE, |
647 | .class_init = core99_machine_class_init, | |
06fe3a5b | 648 | .instance_init = core99_instance_init, |
5d19be6c MCA |
649 | .instance_size = sizeof(Core99MachineState), |
650 | .interfaces = (InterfaceInfo[]) { | |
651 | { TYPE_FW_PATH_PROVIDER }, | |
652 | { } | |
653 | }, | |
0aa6a4a2 | 654 | }; |
f80f9ec9 | 655 | |
b1c2fb9b | 656 | static void mac_machine_register_types(void) |
f80f9ec9 | 657 | { |
b1c2fb9b | 658 | type_register_static(&core99_machine_info); |
f80f9ec9 AL |
659 | } |
660 | ||
b1c2fb9b | 661 | type_init(mac_machine_register_types) |