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Commit | Line | Data |
---|---|---|
64201201 | 1 | /* |
3cbee15b | 2 | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator |
5fafdf24 | 3 | * |
47103572 | 4 | * Copyright (c) 2004-2007 Fabrice Bellard |
3cbee15b | 5 | * Copyright (c) 2007 Jocelyn Mayer |
5fafdf24 | 6 | * |
64201201 FB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
915cd3a9 AG |
24 | * |
25 | * PCI bus layout on a real G5 (U3 based): | |
26 | * | |
27 | * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b] | |
28 | * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150] | |
29 | * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a] | |
30 | * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) | |
31 | * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) | |
32 | * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045] | |
33 | * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046] | |
34 | * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047] | |
35 | * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048] | |
36 | * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049] | |
37 | * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20) | |
38 | * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] | |
39 | * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] | |
40 | * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) | |
41 | * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) | |
42 | * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04) | |
43 | * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043] | |
44 | * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042] | |
45 | * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c] | |
46 | * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240] | |
47 | * | |
64201201 | 48 | */ |
0d75590d | 49 | #include "qemu/osdep.h" |
da34e65c | 50 | #include "qapi/error.h" |
baec1910 | 51 | #include "hw/hw.h" |
0d09e41a | 52 | #include "hw/ppc/ppc.h" |
baec1910 | 53 | #include "hw/ppc/mac.h" |
0d09e41a PB |
54 | #include "hw/input/adb.h" |
55 | #include "hw/ppc/mac_dbdma.h" | |
56 | #include "hw/timer/m48t59.h" | |
baec1910 | 57 | #include "hw/pci/pci.h" |
1422e32d | 58 | #include "net/net.h" |
9c17d615 | 59 | #include "sysemu/sysemu.h" |
baec1910 | 60 | #include "hw/boards.h" |
0d09e41a PB |
61 | #include "hw/nvram/fw_cfg.h" |
62 | #include "hw/char/escc.h" | |
e1218e48 | 63 | #include "hw/misc/macio/macio.h" |
0d09e41a | 64 | #include "hw/ppc/openpic.h" |
baec1910 AF |
65 | #include "hw/ide.h" |
66 | #include "hw/loader.h" | |
ca20cf32 | 67 | #include "elf.h" |
c525436e | 68 | #include "qemu/error-report.h" |
9c17d615 | 69 | #include "sysemu/kvm.h" |
dc333cd6 | 70 | #include "kvm_ppc.h" |
a2236d48 | 71 | #include "hw/usb.h" |
022c62cb | 72 | #include "exec/address-spaces.h" |
baec1910 | 73 | #include "hw/sysbus.h" |
f348b6d1 | 74 | #include "qemu/cutils.h" |
5283c27f | 75 | #include "trace.h" |
267002cd | 76 | |
e4bcb14c | 77 | #define MAX_IDE_BUS 2 |
006f3a48 | 78 | #define CFG_ADDR 0xf0000510 |
536d8cda | 79 | #define TBFREQ (100UL * 1000UL * 1000UL) |
3c062289 | 80 | #define CLOCKFREQ (900UL * 1000UL * 1000UL) |
9d1c1283 | 81 | #define BUSFREQ (100UL * 1000UL * 1000UL) |
e4bcb14c | 82 | |
53ecf09d MCA |
83 | #define NDRV_VGA_FILENAME "qemu_vga.ndrv" |
84 | ||
0aa6a4a2 | 85 | /* UniN device */ |
a8170e5e | 86 | static void unin_write(void *opaque, hwaddr addr, uint64_t value, |
febbd7c2 | 87 | unsigned size) |
0aa6a4a2 | 88 | { |
5283c27f | 89 | trace_mac99_uninorth_write(addr, value); |
4e46dcdb AG |
90 | if (addr == 0x0) { |
91 | *(int*)opaque = value; | |
92 | } | |
0aa6a4a2 FB |
93 | } |
94 | ||
a8170e5e | 95 | static uint64_t unin_read(void *opaque, hwaddr addr, unsigned size) |
0aa6a4a2 | 96 | { |
f3902383 BS |
97 | uint32_t value; |
98 | ||
99 | value = 0; | |
4e46dcdb AG |
100 | switch (addr) { |
101 | case 0: | |
102 | value = *(int*)opaque; | |
103 | } | |
104 | ||
5283c27f | 105 | trace_mac99_uninorth_read(addr, value); |
f3902383 BS |
106 | |
107 | return value; | |
0aa6a4a2 FB |
108 | } |
109 | ||
febbd7c2 AK |
110 | static const MemoryRegionOps unin_ops = { |
111 | .read = unin_read, | |
112 | .write = unin_write, | |
113 | .endianness = DEVICE_NATIVE_ENDIAN, | |
0aa6a4a2 FB |
114 | }; |
115 | ||
ddcd5531 GA |
116 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
117 | Error **errp) | |
513f789f | 118 | { |
48779e50 | 119 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); |
513f789f BS |
120 | } |
121 | ||
409dbce5 AJ |
122 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
123 | { | |
124 | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; | |
125 | } | |
126 | ||
1bba0dc9 AF |
127 | static void ppc_core99_reset(void *opaque) |
128 | { | |
6680988c | 129 | PowerPCCPU *cpu = opaque; |
1bba0dc9 | 130 | |
6680988c | 131 | cpu_reset(CPU(cpu)); |
20f649dd AG |
132 | /* 970 CPUs want to get their initial IP as part of their boot protocol */ |
133 | cpu->env.nip = PROM_ADDR + 0x100; | |
1bba0dc9 AF |
134 | } |
135 | ||
3cbee15b | 136 | /* PowerPC Mac99 hardware initialisation */ |
3ef96221 | 137 | static void ppc_core99_init(MachineState *machine) |
64201201 | 138 | { |
3ef96221 | 139 | ram_addr_t ram_size = machine->ram_size; |
3ef96221 MA |
140 | const char *kernel_filename = machine->kernel_filename; |
141 | const char *kernel_cmdline = machine->kernel_cmdline; | |
142 | const char *initrd_filename = machine->initrd_filename; | |
143 | const char *boot_device = machine->boot_order; | |
8f8204ec | 144 | PowerPCCPU *cpu = NULL; |
e2684c0b | 145 | CPUPPCState *env = NULL; |
5cea8590 | 146 | char *filename; |
e9df014c | 147 | qemu_irq *pic, **openpic_irqs; |
2b1096e0 | 148 | MemoryRegion *isa = g_new(MemoryRegion, 1); |
febbd7c2 | 149 | MemoryRegion *unin_memory = g_new(MemoryRegion, 1); |
593c1811 | 150 | MemoryRegion *unin2_memory = g_new(MemoryRegion, 1); |
d0b72631 | 151 | int linux_boot, i, j, k; |
febbd7c2 | 152 | MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1); |
a8170e5e | 153 | hwaddr kernel_base, initrd_base, cmdline_base = 0; |
093209cd | 154 | long kernel_size, initrd_size; |
46e50e9d | 155 | PCIBus *pci_bus; |
dda12e9a | 156 | NewWorldMacIOState *macio; |
07a7484e | 157 | MACIOIDEState *macio_ide; |
293c867d | 158 | BusState *adb_bus; |
3cbee15b | 159 | MacIONVRAMState *nvr; |
53ecf09d MCA |
160 | int bios_size, ndrv_size; |
161 | uint8_t *ndrv_file; | |
28c5af54 | 162 | int ppc_boot_device; |
f455e98c | 163 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
006f3a48 | 164 | void *fw_cfg; |
0f921197 | 165 | int machine_arch; |
d0b72631 | 166 | SysBusDevice *s; |
dda12e9a | 167 | DeviceState *dev, *pic_dev; |
4e46dcdb | 168 | int *token = g_new(int, 1); |
261265cc | 169 | hwaddr nvram_addr = 0xFFF04000; |
caae6c96 | 170 | uint64_t tbfreq; |
46e50e9d | 171 | |
64201201 FB |
172 | linux_boot = (kernel_filename != NULL); |
173 | ||
c68ea704 | 174 | /* init CPUs */ |
e9df014c | 175 | for (i = 0; i < smp_cpus; i++) { |
9dff4c07 | 176 | cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); |
8f8204ec AF |
177 | env = &cpu->env; |
178 | ||
e9df014c | 179 | /* Set time-base frequency to 100 Mhz */ |
536d8cda | 180 | cpu_ppc_tb_init(env, TBFREQ); |
6680988c | 181 | qemu_register_reset(ppc_core99_reset, cpu); |
e9df014c | 182 | } |
c68ea704 | 183 | |
64201201 | 184 | /* allocate RAM */ |
e938ba0c | 185 | memory_region_allocate_system_memory(ram, NULL, "ppc_core99.ram", ram_size); |
febbd7c2 | 186 | memory_region_add_subregion(get_system_memory(), 0, ram); |
864c136a | 187 | |
64201201 | 188 | /* allocate and load BIOS */ |
98a99ce0 | 189 | memory_region_init_ram(bios, NULL, "ppc_core99.bios", BIOS_SIZE, |
f8ed85ac | 190 | &error_fatal); |
e206ad48 | 191 | |
1192dad8 | 192 | if (bios_name == NULL) |
006f3a48 | 193 | bios_name = PROM_FILENAME; |
5cea8590 | 194 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
febbd7c2 AK |
195 | memory_region_set_readonly(bios, true); |
196 | memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios); | |
006f3a48 BS |
197 | |
198 | /* Load OpenBIOS (ELF) */ | |
5cea8590 | 199 | if (filename) { |
409dbce5 | 200 | bios_size = load_elf(filename, NULL, NULL, NULL, |
7ef295ea | 201 | NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); |
ca20cf32 | 202 | |
7267c094 | 203 | g_free(filename); |
5cea8590 PB |
204 | } else { |
205 | bios_size = -1; | |
206 | } | |
d5295253 | 207 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
c525436e | 208 | error_report("could not load PowerPC bios '%s'", bios_name); |
64201201 FB |
209 | exit(1); |
210 | } | |
3b46e624 | 211 | |
b6b8bd18 | 212 | if (linux_boot) { |
513f789f | 213 | uint64_t lowaddr = 0; |
ca20cf32 BS |
214 | int bswap_needed; |
215 | ||
216 | #ifdef BSWAP_NEEDED | |
217 | bswap_needed = 1; | |
218 | #else | |
219 | bswap_needed = 0; | |
220 | #endif | |
b6b8bd18 | 221 | kernel_base = KERNEL_LOAD_ADDR; |
513f789f | 222 | |
409dbce5 | 223 | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL, |
7ef295ea PC |
224 | NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, |
225 | 0, 0); | |
513f789f BS |
226 | if (kernel_size < 0) |
227 | kernel_size = load_aout(kernel_filename, kernel_base, | |
ca20cf32 BS |
228 | ram_size - kernel_base, bswap_needed, |
229 | TARGET_PAGE_SIZE); | |
513f789f BS |
230 | if (kernel_size < 0) |
231 | kernel_size = load_image_targphys(kernel_filename, | |
232 | kernel_base, | |
233 | ram_size - kernel_base); | |
b6b8bd18 | 234 | if (kernel_size < 0) { |
c525436e | 235 | error_report("could not load kernel '%s'", kernel_filename); |
b6b8bd18 FB |
236 | exit(1); |
237 | } | |
238 | /* load initrd */ | |
239 | if (initrd_filename) { | |
39d96847 | 240 | initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
44654490 PB |
241 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
242 | ram_size - initrd_base); | |
b6b8bd18 | 243 | if (initrd_size < 0) { |
c525436e MA |
244 | error_report("could not load initial ram disk '%s'", |
245 | initrd_filename); | |
b6b8bd18 FB |
246 | exit(1); |
247 | } | |
39d96847 | 248 | cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); |
b6b8bd18 FB |
249 | } else { |
250 | initrd_base = 0; | |
251 | initrd_size = 0; | |
39d96847 | 252 | cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
b6b8bd18 | 253 | } |
6ac0e82d | 254 | ppc_boot_device = 'm'; |
b6b8bd18 FB |
255 | } else { |
256 | kernel_base = 0; | |
257 | kernel_size = 0; | |
258 | initrd_base = 0; | |
259 | initrd_size = 0; | |
28c5af54 JM |
260 | ppc_boot_device = '\0'; |
261 | /* We consider that NewWorld PowerMac never have any floppy drive | |
262 | * For now, OHW cannot boot from the network. | |
263 | */ | |
0d913fdb JM |
264 | for (i = 0; boot_device[i] != '\0'; i++) { |
265 | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { | |
266 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 267 | break; |
0d913fdb | 268 | } |
28c5af54 JM |
269 | } |
270 | if (ppc_boot_device == '\0') { | |
6f76b817 | 271 | error_report("No valid boot device for Mac99 machine"); |
28c5af54 JM |
272 | exit(1); |
273 | } | |
b6b8bd18 | 274 | } |
0aa6a4a2 | 275 | |
3cbee15b | 276 | /* Register 8 MB of ISA IO space */ |
2b1096e0 PB |
277 | memory_region_init_alias(isa, NULL, "isa_mmio", |
278 | get_system_io(), 0, 0x00800000); | |
279 | memory_region_add_subregion(get_system_memory(), 0xf2000000, isa); | |
3b46e624 | 280 | |
4e46dcdb | 281 | /* UniN init: XXX should be a real device */ |
2c9b15ca | 282 | memory_region_init_io(unin_memory, NULL, &unin_ops, token, "unin", 0x1000); |
febbd7c2 | 283 | memory_region_add_subregion(get_system_memory(), 0xf8000000, unin_memory); |
47103572 | 284 | |
2c9b15ca | 285 | memory_region_init_io(unin2_memory, NULL, &unin_ops, token, "unin", 0x1000); |
593c1811 AG |
286 | memory_region_add_subregion(get_system_memory(), 0xf3000000, unin2_memory); |
287 | ||
7267c094 | 288 | openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *)); |
3cbee15b | 289 | openpic_irqs[0] = |
7267c094 | 290 | g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB); |
3cbee15b JM |
291 | for (i = 0; i < smp_cpus; i++) { |
292 | /* Mac99 IRQ connection between OpenPIC outputs pins | |
293 | * and PowerPC input pins | |
294 | */ | |
295 | switch (PPC_INPUT(env)) { | |
296 | case PPC_FLAGS_INPUT_6xx: | |
297 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
298 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
299 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
300 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
301 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; | |
302 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
303 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; | |
304 | /* Not connected ? */ | |
305 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
306 | /* Check this */ | |
307 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
308 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; | |
309 | break; | |
00af685f | 310 | #if defined(TARGET_PPC64) |
3cbee15b JM |
311 | case PPC_FLAGS_INPUT_970: |
312 | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB); | |
313 | openpic_irqs[i][OPENPIC_OUTPUT_INT] = | |
314 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
315 | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = | |
316 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; | |
317 | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = | |
318 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; | |
319 | /* Not connected ? */ | |
320 | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL; | |
321 | /* Check this */ | |
322 | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = | |
323 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; | |
324 | break; | |
00af685f | 325 | #endif /* defined(TARGET_PPC64) */ |
3cbee15b | 326 | default: |
c525436e | 327 | error_report("Bus model not supported on mac99 machine"); |
3cbee15b | 328 | exit(1); |
0aa6a4a2 | 329 | } |
3cbee15b | 330 | } |
d0b72631 | 331 | |
aa2ac1da | 332 | pic = g_new0(qemu_irq, 64); |
d0b72631 | 333 | |
dda12e9a MCA |
334 | pic_dev = qdev_create(NULL, TYPE_OPENPIC); |
335 | qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO); | |
336 | qdev_init_nofail(pic_dev); | |
337 | s = SYS_BUS_DEVICE(pic_dev); | |
d0b72631 AG |
338 | k = 0; |
339 | for (i = 0; i < smp_cpus; i++) { | |
340 | for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { | |
341 | sysbus_connect_irq(s, k++, openpic_irqs[i][j]); | |
342 | } | |
343 | } | |
344 | ||
345 | for (i = 0; i < 64; i++) { | |
dda12e9a | 346 | pic[i] = qdev_get_gpio_in(pic_dev, i); |
d0b72631 AG |
347 | } |
348 | ||
0f921197 AG |
349 | if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { |
350 | /* 970 gets a U3 bus */ | |
aee97b84 | 351 | pci_bus = pci_pmac_u3_init(pic, get_system_memory(), get_system_io()); |
0f921197 AG |
352 | machine_arch = ARCH_MAC99_U3; |
353 | } else { | |
aee97b84 | 354 | pci_bus = pci_pmac_init(pic, get_system_memory(), get_system_io()); |
0f921197 AG |
355 | machine_arch = ARCH_MAC99; |
356 | } | |
1b04cc80 | 357 | object_property_set_bool(OBJECT(pci_bus), true, "realized", &error_abort); |
caae6c96 | 358 | |
72f1f97d AG |
359 | machine->usb |= defaults_enabled() && !machine->usb_disabled; |
360 | ||
caae6c96 AG |
361 | /* Timebase Frequency */ |
362 | if (kvm_enabled()) { | |
363 | tbfreq = kvmppc_get_tbfreq(); | |
364 | } else { | |
365 | tbfreq = TBFREQ; | |
366 | } | |
367 | ||
343bd85a | 368 | /* MacIO */ |
dda12e9a | 369 | macio = NEWWORLD_MACIO(pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO)); |
07a7484e | 370 | dev = DEVICE(macio); |
45fa67fb | 371 | qdev_connect_gpio_out(dev, 0, pic[0x19]); /* CUDA */ |
343bd85a MCA |
372 | qdev_connect_gpio_out(dev, 1, pic[0x24]); /* ESCC-B */ |
373 | qdev_connect_gpio_out(dev, 2, pic[0x25]); /* ESCC-A */ | |
374 | qdev_connect_gpio_out(dev, 3, pic[0x0d]); /* IDE */ | |
375 | qdev_connect_gpio_out(dev, 4, pic[0x02]); /* IDE DMA */ | |
376 | qdev_connect_gpio_out(dev, 5, pic[0x0e]); /* IDE */ | |
377 | qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE DMA */ | |
b981289c | 378 | qdev_prop_set_uint64(dev, "frequency", tbfreq); |
dda12e9a MCA |
379 | object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", |
380 | &error_abort); | |
b6712ea3 | 381 | qdev_init_nofail(dev); |
07a7484e AF |
382 | |
383 | /* We only emulate 2 out of 3 IDE controllers for now */ | |
d8f94e1b | 384 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
a0bb2a5f | 385 | |
07a7484e AF |
386 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), |
387 | "ide[0]")); | |
388 | macio_ide_init_drives(macio_ide, hd); | |
389 | ||
390 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), | |
391 | "ide[1]")); | |
392 | macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); | |
0d92ed30 | 393 | |
293c867d AF |
394 | dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); |
395 | adb_bus = qdev_get_child_bus(dev, "adb.0"); | |
396 | dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); | |
2e4a7c9c | 397 | qdev_init_nofail(dev); |
293c867d | 398 | dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); |
2e4a7c9c | 399 | qdev_init_nofail(dev); |
45fa67fb | 400 | |
59a04198 | 401 | if (machine->usb) { |
afb9a60e | 402 | pci_create_simple(pci_bus, -1, "pci-ohci"); |
c86580b8 | 403 | |
094b287f LZ |
404 | /* U3 needs to use USB for input because Linux doesn't support via-cuda |
405 | on PPC64 */ | |
406 | if (machine_arch == ARCH_MAC99_U3) { | |
c86580b8 MA |
407 | USBBus *usb_bus = usb_bus_find(-1); |
408 | ||
409 | usb_create_simple(usb_bus, "usb-kbd"); | |
410 | usb_create_simple(usb_bus, "usb-mouse"); | |
094b287f | 411 | } |
a2236d48 AG |
412 | } |
413 | ||
a0bb2a5f BZ |
414 | pci_vga_init(pci_bus); |
415 | ||
416 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) { | |
b6b8bd18 | 417 | graphic_depth = 15; |
a0bb2a5f BZ |
418 | } |
419 | ||
420 | for (i = 0; i < nb_nics; i++) { | |
421 | pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); | |
422 | } | |
4f3f238b | 423 | |
3cbee15b | 424 | /* The NewWorld NVRAM is not located in the MacIO device */ |
261265cc AG |
425 | #ifdef CONFIG_KVM |
426 | if (kvm_enabled() && getpagesize() > 4096) { | |
427 | /* We can't combine read-write and read-only in a single page, so | |
428 | move the NVRAM out of ROM again for KVM */ | |
429 | nvram_addr = 0xFFE00000; | |
430 | } | |
431 | #endif | |
95ed3b7c AF |
432 | dev = qdev_create(NULL, TYPE_MACIO_NVRAM); |
433 | qdev_prop_set_uint32(dev, "size", 0x2000); | |
434 | qdev_prop_set_uint32(dev, "it_shift", 1); | |
435 | qdev_init_nofail(dev); | |
261265cc | 436 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); |
95ed3b7c | 437 | nvr = MACIO_NVRAM(dev); |
3cbee15b | 438 | pmac_format_nvram_partition(nvr, 0x2000); |
b6b8bd18 | 439 | /* No PCI init: the BIOS will do it */ |
0aa6a4a2 | 440 | |
66708822 | 441 | fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2); |
5836d168 | 442 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); |
70db9222 | 443 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); |
006f3a48 | 444 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
0f921197 | 445 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch); |
513f789f BS |
446 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
447 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
448 | if (kernel_cmdline) { | |
b9e17a34 AG |
449 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); |
450 | pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); | |
513f789f BS |
451 | } else { |
452 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
453 | } | |
454 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
455 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
456 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
10696b4f BS |
457 | |
458 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
459 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
460 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
461 | ||
45024f09 | 462 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); |
dc333cd6 AG |
463 | if (kvm_enabled()) { |
464 | #ifdef CONFIG_KVM | |
45024f09 AG |
465 | uint8_t *hypercall; |
466 | ||
7267c094 | 467 | hypercall = g_malloc(16); |
45024f09 AG |
468 | kvmppc_get_hypercall(env, hypercall, 16); |
469 | fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); | |
470 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); | |
dc333cd6 | 471 | #endif |
dc333cd6 | 472 | } |
caae6c96 | 473 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); |
a1014f25 | 474 | /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ |
9d1c1283 BZ |
475 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); |
476 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); | |
261265cc | 477 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr); |
dc333cd6 | 478 | |
53ecf09d MCA |
479 | /* MacOS NDRV VGA driver */ |
480 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); | |
481 | if (filename) { | |
482 | ndrv_size = get_image_size(filename); | |
483 | if (ndrv_size != -1) { | |
484 | ndrv_file = g_malloc(ndrv_size); | |
485 | ndrv_size = load_image(filename, ndrv_file); | |
486 | ||
487 | fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); | |
488 | } | |
489 | g_free(filename); | |
490 | } | |
491 | ||
513f789f | 492 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
aae9366a | 493 | } |
0aa6a4a2 | 494 | |
277c7a4d AG |
495 | static int core99_kvm_type(const char *arg) |
496 | { | |
497 | /* Always force PR KVM */ | |
498 | return 2; | |
499 | } | |
500 | ||
b1c2fb9b MA |
501 | static void core99_machine_class_init(ObjectClass *oc, void *data) |
502 | { | |
503 | MachineClass *mc = MACHINE_CLASS(oc); | |
504 | ||
b1c2fb9b MA |
505 | mc->desc = "Mac99 based PowerMAC"; |
506 | mc->init = ppc_core99_init; | |
2059839b | 507 | mc->block_default_type = IF_IDE; |
b1c2fb9b MA |
508 | mc->max_cpus = MAX_CPUS; |
509 | mc->default_boot_order = "cd"; | |
510 | mc->kvm_type = core99_kvm_type; | |
9dff4c07 IM |
511 | #ifdef TARGET_PPC64 |
512 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1"); | |
513 | #else | |
514 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9"); | |
515 | #endif | |
b1c2fb9b MA |
516 | } |
517 | ||
518 | static const TypeInfo core99_machine_info = { | |
c0f36518 | 519 | .name = MACHINE_TYPE_NAME("mac99"), |
b1c2fb9b MA |
520 | .parent = TYPE_MACHINE, |
521 | .class_init = core99_machine_class_init, | |
0aa6a4a2 | 522 | }; |
f80f9ec9 | 523 | |
b1c2fb9b | 524 | static void mac_machine_register_types(void) |
f80f9ec9 | 525 | { |
b1c2fb9b | 526 | type_register_static(&core99_machine_info); |
f80f9ec9 AL |
527 | } |
528 | ||
b1c2fb9b | 529 | type_init(mac_machine_register_types) |