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Commit | Line | Data |
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64201201 | 1 | /* |
3cbee15b | 2 | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator |
5fafdf24 | 3 | * |
47103572 | 4 | * Copyright (c) 2004-2007 Fabrice Bellard |
3cbee15b | 5 | * Copyright (c) 2007 Jocelyn Mayer |
5fafdf24 | 6 | * |
64201201 FB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
915cd3a9 AG |
24 | * |
25 | * PCI bus layout on a real G5 (U3 based): | |
26 | * | |
27 | * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b] | |
28 | * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150] | |
29 | * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a] | |
30 | * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) | |
31 | * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12) | |
32 | * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045] | |
33 | * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046] | |
34 | * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047] | |
35 | * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048] | |
36 | * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049] | |
37 | * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20) | |
38 | * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] | |
39 | * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040] | |
40 | * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) | |
41 | * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43) | |
42 | * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04) | |
43 | * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043] | |
44 | * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042] | |
45 | * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c] | |
46 | * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240] | |
64201201 | 47 | */ |
a8d25326 | 48 | |
0d75590d | 49 | #include "qemu/osdep.h" |
a8d25326 | 50 | #include "qemu-common.h" |
2c65db5e | 51 | #include "qemu/datadir.h" |
da34e65c | 52 | #include "qapi/error.h" |
0d09e41a | 53 | #include "hw/ppc/ppc.h" |
a27bd6c7 | 54 | #include "hw/qdev-properties.h" |
baec1910 | 55 | #include "hw/ppc/mac.h" |
0d09e41a PB |
56 | #include "hw/input/adb.h" |
57 | #include "hw/ppc/mac_dbdma.h" | |
baec1910 | 58 | #include "hw/pci/pci.h" |
1422e32d | 59 | #include "net/net.h" |
9c17d615 | 60 | #include "sysemu/sysemu.h" |
0d09e41a PB |
61 | #include "hw/nvram/fw_cfg.h" |
62 | #include "hw/char/escc.h" | |
e1218e48 | 63 | #include "hw/misc/macio/macio.h" |
0d09e41a | 64 | #include "hw/ppc/openpic.h" |
baec1910 | 65 | #include "hw/loader.h" |
5d19be6c | 66 | #include "hw/fw-path-provider.h" |
ca20cf32 | 67 | #include "elf.h" |
c525436e | 68 | #include "qemu/error-report.h" |
9c17d615 | 69 | #include "sysemu/kvm.h" |
71e8a915 | 70 | #include "sysemu/reset.h" |
dc333cd6 | 71 | #include "kvm_ppc.h" |
a2236d48 | 72 | #include "hw/usb.h" |
baec1910 | 73 | #include "hw/sysbus.h" |
5283c27f | 74 | #include "trace.h" |
267002cd | 75 | |
e4bcb14c | 76 | #define MAX_IDE_BUS 2 |
006f3a48 | 77 | #define CFG_ADDR 0xf0000510 |
536d8cda | 78 | #define TBFREQ (100UL * 1000UL * 1000UL) |
3c062289 | 79 | #define CLOCKFREQ (900UL * 1000UL * 1000UL) |
9d1c1283 | 80 | #define BUSFREQ (100UL * 1000UL * 1000UL) |
e4bcb14c | 81 | |
53ecf09d MCA |
82 | #define NDRV_VGA_FILENAME "qemu_vga.ndrv" |
83 | ||
31a6f353 BZ |
84 | #define PROM_BASE 0xfff00000 |
85 | #define PROM_SIZE (1 * MiB) | |
0aa6a4a2 | 86 | |
ddcd5531 GA |
87 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
88 | Error **errp) | |
513f789f | 89 | { |
48779e50 | 90 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); |
513f789f BS |
91 | } |
92 | ||
409dbce5 AJ |
93 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
94 | { | |
95 | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; | |
96 | } | |
97 | ||
1bba0dc9 AF |
98 | static void ppc_core99_reset(void *opaque) |
99 | { | |
6680988c | 100 | PowerPCCPU *cpu = opaque; |
1bba0dc9 | 101 | |
6680988c | 102 | cpu_reset(CPU(cpu)); |
20f649dd | 103 | /* 970 CPUs want to get their initial IP as part of their boot protocol */ |
31a6f353 | 104 | cpu->env.nip = PROM_BASE + 0x100; |
1bba0dc9 AF |
105 | } |
106 | ||
3cbee15b | 107 | /* PowerPC Mac99 hardware initialisation */ |
3ef96221 | 108 | static void ppc_core99_init(MachineState *machine) |
64201201 | 109 | { |
3ef96221 | 110 | ram_addr_t ram_size = machine->ram_size; |
cd7b9498 | 111 | const char *bios_name = machine->firmware ?: PROM_FILENAME; |
3ef96221 MA |
112 | const char *kernel_filename = machine->kernel_filename; |
113 | const char *kernel_cmdline = machine->kernel_cmdline; | |
114 | const char *initrd_filename = machine->initrd_filename; | |
115 | const char *boot_device = machine->boot_order; | |
f1114c17 | 116 | Core99MachineState *core99_machine = CORE99_MACHINE(machine); |
8f8204ec | 117 | PowerPCCPU *cpu = NULL; |
e2684c0b | 118 | CPUPPCState *env = NULL; |
5cea8590 | 119 | char *filename; |
9929301e | 120 | IrqLines *openpic_irqs; |
d0b72631 | 121 | int linux_boot, i, j, k; |
a5b5de02 | 122 | MemoryRegion *bios = g_new(MemoryRegion, 1); |
a8170e5e | 123 | hwaddr kernel_base, initrd_base, cmdline_base = 0; |
093209cd | 124 | long kernel_size, initrd_size; |
c90c393c | 125 | UNINHostState *uninorth_pci; |
46e50e9d | 126 | PCIBus *pci_bus; |
7d612261 | 127 | PCIDevice *macio; |
348b8d1a | 128 | ESCCState *escc; |
f1114c17 | 129 | bool has_pmu, has_adb; |
07a7484e | 130 | MACIOIDEState *macio_ide; |
293c867d | 131 | BusState *adb_bus; |
3cbee15b | 132 | MacIONVRAMState *nvr; |
9776874f | 133 | int bios_size; |
28c5af54 | 134 | int ppc_boot_device; |
f455e98c | 135 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
006f3a48 | 136 | void *fw_cfg; |
0f921197 | 137 | int machine_arch; |
d0b72631 | 138 | SysBusDevice *s; |
dda12e9a | 139 | DeviceState *dev, *pic_dev; |
6ce97b22 | 140 | DeviceState *uninorth_internal_dev = NULL, *uninorth_agp_dev = NULL; |
261265cc | 141 | hwaddr nvram_addr = 0xFFF04000; |
caae6c96 | 142 | uint64_t tbfreq; |
fe6b6346 | 143 | unsigned int smp_cpus = machine->smp.cpus; |
46e50e9d | 144 | |
64201201 FB |
145 | linux_boot = (kernel_filename != NULL); |
146 | ||
c68ea704 | 147 | /* init CPUs */ |
e9df014c | 148 | for (i = 0; i < smp_cpus; i++) { |
9dff4c07 | 149 | cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); |
8f8204ec AF |
150 | env = &cpu->env; |
151 | ||
e9df014c | 152 | /* Set time-base frequency to 100 Mhz */ |
536d8cda | 153 | cpu_ppc_tb_init(env, TBFREQ); |
6680988c | 154 | qemu_register_reset(ppc_core99_reset, cpu); |
e9df014c | 155 | } |
c68ea704 | 156 | |
64201201 | 157 | /* allocate RAM */ |
03b3542a PMD |
158 | if (machine->ram_size > 2 * GiB) { |
159 | error_report("RAM size more than 2 GiB is not supported"); | |
160 | exit(1); | |
161 | } | |
a5b5de02 | 162 | memory_region_add_subregion(get_system_memory(), 0, machine->ram); |
864c136a | 163 | |
31a6f353 BZ |
164 | /* allocate and load firmware ROM */ |
165 | memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE, | |
f8ed85ac | 166 | &error_fatal); |
31a6f353 | 167 | memory_region_add_subregion(get_system_memory(), PROM_BASE, bios); |
e206ad48 | 168 | |
5cea8590 | 169 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
5cea8590 | 170 | if (filename) { |
31a6f353 | 171 | /* Load OpenBIOS (ELF) */ |
4366e1db | 172 | bios_size = load_elf(filename, NULL, NULL, NULL, NULL, |
6cdda0ff | 173 | NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); |
ca20cf32 | 174 | |
31a6f353 BZ |
175 | if (bios_size <= 0) { |
176 | /* or load binary ROM image */ | |
177 | bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE); | |
178 | } | |
7267c094 | 179 | g_free(filename); |
5cea8590 PB |
180 | } else { |
181 | bios_size = -1; | |
182 | } | |
31a6f353 | 183 | if (bios_size < 0 || bios_size > PROM_SIZE) { |
c525436e | 184 | error_report("could not load PowerPC bios '%s'", bios_name); |
64201201 FB |
185 | exit(1); |
186 | } | |
3b46e624 | 187 | |
b6b8bd18 | 188 | if (linux_boot) { |
ca20cf32 BS |
189 | int bswap_needed; |
190 | ||
191 | #ifdef BSWAP_NEEDED | |
192 | bswap_needed = 1; | |
193 | #else | |
194 | bswap_needed = 0; | |
195 | #endif | |
b6b8bd18 | 196 | kernel_base = KERNEL_LOAD_ADDR; |
513f789f | 197 | |
4366e1db | 198 | kernel_size = load_elf(kernel_filename, NULL, |
617160c9 BZ |
199 | translate_kernel_address, NULL, NULL, NULL, |
200 | NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); | |
513f789f BS |
201 | if (kernel_size < 0) |
202 | kernel_size = load_aout(kernel_filename, kernel_base, | |
ca20cf32 BS |
203 | ram_size - kernel_base, bswap_needed, |
204 | TARGET_PAGE_SIZE); | |
513f789f BS |
205 | if (kernel_size < 0) |
206 | kernel_size = load_image_targphys(kernel_filename, | |
207 | kernel_base, | |
208 | ram_size - kernel_base); | |
b6b8bd18 | 209 | if (kernel_size < 0) { |
c525436e | 210 | error_report("could not load kernel '%s'", kernel_filename); |
b6b8bd18 FB |
211 | exit(1); |
212 | } | |
213 | /* load initrd */ | |
214 | if (initrd_filename) { | |
39d96847 | 215 | initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
44654490 PB |
216 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
217 | ram_size - initrd_base); | |
b6b8bd18 | 218 | if (initrd_size < 0) { |
c525436e MA |
219 | error_report("could not load initial ram disk '%s'", |
220 | initrd_filename); | |
b6b8bd18 FB |
221 | exit(1); |
222 | } | |
39d96847 | 223 | cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); |
b6b8bd18 FB |
224 | } else { |
225 | initrd_base = 0; | |
226 | initrd_size = 0; | |
39d96847 | 227 | cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
b6b8bd18 | 228 | } |
6ac0e82d | 229 | ppc_boot_device = 'm'; |
b6b8bd18 FB |
230 | } else { |
231 | kernel_base = 0; | |
232 | kernel_size = 0; | |
233 | initrd_base = 0; | |
234 | initrd_size = 0; | |
28c5af54 JM |
235 | ppc_boot_device = '\0'; |
236 | /* We consider that NewWorld PowerMac never have any floppy drive | |
237 | * For now, OHW cannot boot from the network. | |
238 | */ | |
0d913fdb JM |
239 | for (i = 0; boot_device[i] != '\0'; i++) { |
240 | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { | |
241 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 242 | break; |
0d913fdb | 243 | } |
28c5af54 JM |
244 | } |
245 | if (ppc_boot_device == '\0') { | |
6f76b817 | 246 | error_report("No valid boot device for Mac99 machine"); |
28c5af54 JM |
247 | exit(1); |
248 | } | |
b6b8bd18 | 249 | } |
0aa6a4a2 | 250 | |
0662946a | 251 | /* UniN init */ |
3e80f690 | 252 | dev = qdev_new(TYPE_UNI_NORTH); |
0662946a | 253 | s = SYS_BUS_DEVICE(dev); |
3c6ef471 | 254 | sysbus_realize_and_unref(s, &error_fatal); |
0662946a MCA |
255 | memory_region_add_subregion(get_system_memory(), 0xf8000000, |
256 | sysbus_mmio_get_region(s, 0)); | |
47103572 | 257 | |
9929301e | 258 | openpic_irqs = g_new0(IrqLines, smp_cpus); |
3cbee15b JM |
259 | for (i = 0; i < smp_cpus; i++) { |
260 | /* Mac99 IRQ connection between OpenPIC outputs pins | |
261 | * and PowerPC input pins | |
262 | */ | |
263 | switch (PPC_INPUT(env)) { | |
264 | case PPC_FLAGS_INPUT_6xx: | |
9929301e | 265 | openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] = |
3cbee15b | 266 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
9929301e | 267 | openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] = |
3cbee15b | 268 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
9929301e | 269 | openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] = |
3cbee15b JM |
270 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; |
271 | /* Not connected ? */ | |
9929301e | 272 | openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL; |
3cbee15b | 273 | /* Check this */ |
9929301e | 274 | openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] = |
3cbee15b JM |
275 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; |
276 | break; | |
00af685f | 277 | #if defined(TARGET_PPC64) |
3cbee15b | 278 | case PPC_FLAGS_INPUT_970: |
9929301e | 279 | openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] = |
3cbee15b | 280 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
9929301e | 281 | openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] = |
3cbee15b | 282 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
9929301e | 283 | openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] = |
3cbee15b JM |
284 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; |
285 | /* Not connected ? */ | |
9929301e | 286 | openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL; |
3cbee15b | 287 | /* Check this */ |
9929301e | 288 | openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] = |
3cbee15b JM |
289 | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; |
290 | break; | |
00af685f | 291 | #endif /* defined(TARGET_PPC64) */ |
3cbee15b | 292 | default: |
c525436e | 293 | error_report("Bus model not supported on mac99 machine"); |
3cbee15b | 294 | exit(1); |
0aa6a4a2 | 295 | } |
3cbee15b | 296 | } |
d0b72631 | 297 | |
0f921197 AG |
298 | if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) { |
299 | /* 970 gets a U3 bus */ | |
8ce3f743 | 300 | /* Uninorth AGP bus */ |
3e80f690 | 301 | dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE); |
3c6ef471 | 302 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
8ce3f743 MCA |
303 | uninorth_pci = U3_AGP_HOST_BRIDGE(dev); |
304 | s = SYS_BUS_DEVICE(dev); | |
305 | /* PCI hole */ | |
306 | memory_region_add_subregion(get_system_memory(), 0x80000000ULL, | |
307 | sysbus_mmio_get_region(s, 2)); | |
e226efbb MCA |
308 | /* Register 8 MB of ISA IO space */ |
309 | memory_region_add_subregion(get_system_memory(), 0xf2000000, | |
310 | sysbus_mmio_get_region(s, 3)); | |
8ce3f743 MCA |
311 | sysbus_mmio_map(s, 0, 0xf0800000); |
312 | sysbus_mmio_map(s, 1, 0xf0c00000); | |
313 | ||
0f921197 AG |
314 | machine_arch = ARCH_MAC99_U3; |
315 | } else { | |
7b19318b MCA |
316 | /* Use values found on a real PowerMac */ |
317 | /* Uninorth AGP bus */ | |
6ce97b22 MCA |
318 | uninorth_agp_dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE); |
319 | s = SYS_BUS_DEVICE(uninorth_agp_dev); | |
3c6ef471 | 320 | sysbus_realize_and_unref(s, &error_fatal); |
7b19318b MCA |
321 | sysbus_mmio_map(s, 0, 0xf0800000); |
322 | sysbus_mmio_map(s, 1, 0xf0c00000); | |
323 | ||
324 | /* Uninorth internal bus */ | |
6ce97b22 MCA |
325 | uninorth_internal_dev = qdev_new( |
326 | TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE); | |
327 | s = SYS_BUS_DEVICE(uninorth_internal_dev); | |
3c6ef471 | 328 | sysbus_realize_and_unref(s, &error_fatal); |
7b19318b MCA |
329 | sysbus_mmio_map(s, 0, 0xf4800000); |
330 | sysbus_mmio_map(s, 1, 0xf4c00000); | |
331 | ||
332 | /* Uninorth main bus */ | |
3e80f690 | 333 | dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE); |
03756c84 | 334 | qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000); |
3c6ef471 | 335 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
7b19318b MCA |
336 | uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev); |
337 | s = SYS_BUS_DEVICE(dev); | |
338 | /* PCI hole */ | |
339 | memory_region_add_subregion(get_system_memory(), 0x80000000ULL, | |
340 | sysbus_mmio_get_region(s, 2)); | |
e226efbb MCA |
341 | /* Register 8 MB of ISA IO space */ |
342 | memory_region_add_subregion(get_system_memory(), 0xf2000000, | |
343 | sysbus_mmio_get_region(s, 3)); | |
7b19318b MCA |
344 | sysbus_mmio_map(s, 0, 0xf2800000); |
345 | sysbus_mmio_map(s, 1, 0xf2c00000); | |
346 | ||
0f921197 AG |
347 | machine_arch = ARCH_MAC99; |
348 | } | |
caae6c96 | 349 | |
72f1f97d | 350 | machine->usb |= defaults_enabled() && !machine->usb_disabled; |
f1114c17 MCA |
351 | has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA); |
352 | has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA || | |
353 | core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB); | |
72f1f97d | 354 | |
caae6c96 AG |
355 | /* Timebase Frequency */ |
356 | if (kvm_enabled()) { | |
357 | tbfreq = kvmppc_get_tbfreq(); | |
358 | } else { | |
359 | tbfreq = TBFREQ; | |
360 | } | |
361 | ||
0f4b5415 MCA |
362 | /* init basic PC hardware */ |
363 | pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus; | |
364 | ||
343bd85a | 365 | /* MacIO */ |
9307d06d | 366 | macio = pci_new(-1, TYPE_NEWWORLD_MACIO); |
07a7484e | 367 | dev = DEVICE(macio); |
b981289c | 368 | qdev_prop_set_uint64(dev, "frequency", tbfreq); |
f1114c17 MCA |
369 | qdev_prop_set_bit(dev, "has-pmu", has_pmu); |
370 | qdev_prop_set_bit(dev, "has-adb", has_adb); | |
348b8d1a MCA |
371 | |
372 | escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc")); | |
373 | qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0)); | |
374 | qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1)); | |
375 | ||
9307d06d | 376 | pci_realize_and_unref(macio, pci_bus, &error_fatal); |
07a7484e | 377 | |
7e4d62df | 378 | pic_dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pic")); |
6ce97b22 MCA |
379 | for (i = 0; i < 4; i++) { |
380 | qdev_connect_gpio_out(DEVICE(uninorth_pci), i, | |
381 | qdev_get_gpio_in(pic_dev, 0x1b + i)); | |
382 | } | |
383 | ||
384 | /* TODO: additional PCI buses only wired up for 32-bit machines */ | |
385 | if (PPC_INPUT(env) != PPC_FLAGS_INPUT_970) { | |
386 | /* Uninorth AGP bus */ | |
387 | for (i = 0; i < 4; i++) { | |
388 | qdev_connect_gpio_out(uninorth_agp_dev, i, | |
389 | qdev_get_gpio_in(pic_dev, 0x1b + i)); | |
390 | } | |
391 | ||
392 | /* Uninorth internal bus */ | |
393 | for (i = 0; i < 4; i++) { | |
394 | qdev_connect_gpio_out(uninorth_internal_dev, i, | |
395 | qdev_get_gpio_in(pic_dev, 0x1b + i)); | |
396 | } | |
397 | } | |
398 | ||
7e4d62df MCA |
399 | /* OpenPIC */ |
400 | s = SYS_BUS_DEVICE(pic_dev); | |
401 | k = 0; | |
402 | for (i = 0; i < smp_cpus; i++) { | |
403 | for (j = 0; j < OPENPIC_OUTPUT_NB; j++) { | |
404 | sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]); | |
405 | } | |
406 | } | |
407 | g_free(openpic_irqs); | |
408 | ||
07a7484e | 409 | /* We only emulate 2 out of 3 IDE controllers for now */ |
d8f94e1b | 410 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
a0bb2a5f | 411 | |
07a7484e AF |
412 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), |
413 | "ide[0]")); | |
414 | macio_ide_init_drives(macio_ide, hd); | |
415 | ||
416 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), | |
417 | "ide[1]")); | |
418 | macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); | |
0d92ed30 | 419 | |
f1114c17 | 420 | if (has_adb) { |
d811d61f MCA |
421 | if (has_pmu) { |
422 | dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu")); | |
423 | } else { | |
424 | dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); | |
425 | } | |
426 | ||
f1114c17 | 427 | adb_bus = qdev_get_child_bus(dev, "adb.0"); |
3e80f690 | 428 | dev = qdev_new(TYPE_ADB_KEYBOARD); |
3e80f690 | 429 | qdev_realize_and_unref(dev, adb_bus, &error_fatal); |
d811d61f | 430 | |
3e80f690 | 431 | dev = qdev_new(TYPE_ADB_MOUSE); |
3e80f690 | 432 | qdev_realize_and_unref(dev, adb_bus, &error_fatal); |
f1114c17 | 433 | } |
45fa67fb | 434 | |
59a04198 | 435 | if (machine->usb) { |
afb9a60e | 436 | pci_create_simple(pci_bus, -1, "pci-ohci"); |
c86580b8 | 437 | |
094b287f LZ |
438 | /* U3 needs to use USB for input because Linux doesn't support via-cuda |
439 | on PPC64 */ | |
f1114c17 | 440 | if (!has_adb || machine_arch == ARCH_MAC99_U3) { |
c86580b8 MA |
441 | USBBus *usb_bus = usb_bus_find(-1); |
442 | ||
443 | usb_create_simple(usb_bus, "usb-kbd"); | |
444 | usb_create_simple(usb_bus, "usb-mouse"); | |
094b287f | 445 | } |
a2236d48 AG |
446 | } |
447 | ||
a0bb2a5f BZ |
448 | pci_vga_init(pci_bus); |
449 | ||
450 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) { | |
b6b8bd18 | 451 | graphic_depth = 15; |
a0bb2a5f BZ |
452 | } |
453 | ||
454 | for (i = 0; i < nb_nics; i++) { | |
4479b51e | 455 | pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL); |
a0bb2a5f | 456 | } |
4f3f238b | 457 | |
3cbee15b | 458 | /* The NewWorld NVRAM is not located in the MacIO device */ |
8e3b0cbb | 459 | if (kvm_enabled() && qemu_real_host_page_size() > 4096) { |
261265cc AG |
460 | /* We can't combine read-write and read-only in a single page, so |
461 | move the NVRAM out of ROM again for KVM */ | |
462 | nvram_addr = 0xFFE00000; | |
463 | } | |
3e80f690 | 464 | dev = qdev_new(TYPE_MACIO_NVRAM); |
95ed3b7c AF |
465 | qdev_prop_set_uint32(dev, "size", 0x2000); |
466 | qdev_prop_set_uint32(dev, "it_shift", 1); | |
3c6ef471 | 467 | sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); |
261265cc | 468 | sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr); |
95ed3b7c | 469 | nvr = MACIO_NVRAM(dev); |
3cbee15b | 470 | pmac_format_nvram_partition(nvr, 0x2000); |
b6b8bd18 | 471 | /* No PCI init: the BIOS will do it */ |
0aa6a4a2 | 472 | |
3e80f690 | 473 | dev = qdev_new(TYPE_FW_CFG_MEM); |
74887ed9 MCA |
474 | fw_cfg = FW_CFG(dev); |
475 | qdev_prop_set_uint32(dev, "data_width", 1); | |
476 | qdev_prop_set_bit(dev, "dma_enabled", false); | |
477 | object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, | |
d2623129 | 478 | OBJECT(fw_cfg)); |
74887ed9 | 479 | s = SYS_BUS_DEVICE(dev); |
3c6ef471 | 480 | sysbus_realize_and_unref(s, &error_fatal); |
74887ed9 MCA |
481 | sysbus_mmio_map(s, 0, CFG_ADDR); |
482 | sysbus_mmio_map(s, 1, CFG_ADDR + 2); | |
483 | ||
5836d168 | 484 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); |
fe6b6346 | 485 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus); |
006f3a48 | 486 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
0f921197 | 487 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch); |
513f789f BS |
488 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
489 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
490 | if (kernel_cmdline) { | |
b9e17a34 AG |
491 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); |
492 | pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); | |
513f789f BS |
493 | } else { |
494 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
495 | } | |
496 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
497 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
498 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
10696b4f BS |
499 | |
500 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
501 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
502 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
503 | ||
f1114c17 MCA |
504 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config); |
505 | ||
45024f09 | 506 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); |
dc333cd6 | 507 | if (kvm_enabled()) { |
45024f09 AG |
508 | uint8_t *hypercall; |
509 | ||
7267c094 | 510 | hypercall = g_malloc(16); |
45024f09 AG |
511 | kvmppc_get_hypercall(env, hypercall, 16); |
512 | fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); | |
513 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); | |
dc333cd6 | 514 | } |
caae6c96 | 515 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); |
a1014f25 | 516 | /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ |
9d1c1283 BZ |
517 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); |
518 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); | |
261265cc | 519 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr); |
dc333cd6 | 520 | |
53ecf09d MCA |
521 | /* MacOS NDRV VGA driver */ |
522 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); | |
523 | if (filename) { | |
9776874f PM |
524 | gchar *ndrv_file; |
525 | gsize ndrv_size; | |
53ecf09d | 526 | |
9776874f | 527 | if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) { |
53ecf09d MCA |
528 | fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); |
529 | } | |
530 | g_free(filename); | |
531 | } | |
532 | ||
513f789f | 533 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
aae9366a | 534 | } |
0aa6a4a2 | 535 | |
5d19be6c MCA |
536 | /* |
537 | * Implementation of an interface to adjust firmware path | |
538 | * for the bootindex property handling. | |
539 | */ | |
540 | static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus, | |
541 | DeviceState *dev) | |
542 | { | |
543 | PCIDevice *pci; | |
5d19be6c MCA |
544 | MACIOIDEState *macio_ide; |
545 | ||
546 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) { | |
547 | pci = PCI_DEVICE(dev); | |
548 | return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn)); | |
549 | } | |
550 | ||
551 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) { | |
552 | macio_ide = MACIO_IDE(dev); | |
553 | return g_strdup_printf("ata-3@%x", macio_ide->addr); | |
554 | } | |
555 | ||
5d19be6c | 556 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) { |
31bc6fa7 | 557 | return g_strdup("disk"); |
5d19be6c MCA |
558 | } |
559 | ||
560 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) { | |
561 | return g_strdup("cdrom"); | |
562 | } | |
563 | ||
564 | if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) { | |
565 | return g_strdup("disk"); | |
566 | } | |
567 | ||
568 | return NULL; | |
569 | } | |
dc0ca80e | 570 | static int core99_kvm_type(MachineState *machine, const char *arg) |
277c7a4d AG |
571 | { |
572 | /* Always force PR KVM */ | |
573 | return 2; | |
574 | } | |
575 | ||
b1c2fb9b MA |
576 | static void core99_machine_class_init(ObjectClass *oc, void *data) |
577 | { | |
578 | MachineClass *mc = MACHINE_CLASS(oc); | |
5d19be6c | 579 | FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc); |
b1c2fb9b | 580 | |
b1c2fb9b MA |
581 | mc->desc = "Mac99 based PowerMAC"; |
582 | mc->init = ppc_core99_init; | |
2059839b | 583 | mc->block_default_type = IF_IDE; |
83234b82 PM |
584 | /* SMP is not supported currently */ |
585 | mc->max_cpus = 1; | |
b1c2fb9b | 586 | mc->default_boot_order = "cd"; |
3232794b | 587 | mc->default_display = "std"; |
b1c2fb9b | 588 | mc->kvm_type = core99_kvm_type; |
9dff4c07 IM |
589 | #ifdef TARGET_PPC64 |
590 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1"); | |
591 | #else | |
592 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9"); | |
593 | #endif | |
a5b5de02 | 594 | mc->default_ram_id = "ppc_core99.ram"; |
5d19be6c MCA |
595 | mc->ignore_boot_device_suffixes = true; |
596 | fwc->get_dev_path = core99_fw_dev_path; | |
b1c2fb9b MA |
597 | } |
598 | ||
f1114c17 MCA |
599 | static char *core99_get_via_config(Object *obj, Error **errp) |
600 | { | |
601 | Core99MachineState *cms = CORE99_MACHINE(obj); | |
602 | ||
603 | switch (cms->via_config) { | |
604 | default: | |
605 | case CORE99_VIA_CONFIG_CUDA: | |
606 | return g_strdup("cuda"); | |
607 | ||
608 | case CORE99_VIA_CONFIG_PMU: | |
609 | return g_strdup("pmu"); | |
610 | ||
611 | case CORE99_VIA_CONFIG_PMU_ADB: | |
612 | return g_strdup("pmu-adb"); | |
613 | } | |
614 | } | |
615 | ||
616 | static void core99_set_via_config(Object *obj, const char *value, Error **errp) | |
617 | { | |
618 | Core99MachineState *cms = CORE99_MACHINE(obj); | |
619 | ||
620 | if (!strcmp(value, "cuda")) { | |
621 | cms->via_config = CORE99_VIA_CONFIG_CUDA; | |
622 | } else if (!strcmp(value, "pmu")) { | |
623 | cms->via_config = CORE99_VIA_CONFIG_PMU; | |
624 | } else if (!strcmp(value, "pmu-adb")) { | |
625 | cms->via_config = CORE99_VIA_CONFIG_PMU_ADB; | |
626 | } else { | |
627 | error_setg(errp, "Invalid via value"); | |
628 | error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n"); | |
629 | } | |
630 | } | |
631 | ||
06fe3a5b MCA |
632 | static void core99_instance_init(Object *obj) |
633 | { | |
f1114c17 MCA |
634 | Core99MachineState *cms = CORE99_MACHINE(obj); |
635 | ||
636 | /* Default via_config is CORE99_VIA_CONFIG_CUDA */ | |
637 | cms->via_config = CORE99_VIA_CONFIG_CUDA; | |
638 | object_property_add_str(obj, "via", core99_get_via_config, | |
d2623129 | 639 | core99_set_via_config); |
f1114c17 MCA |
640 | object_property_set_description(obj, "via", |
641 | "Set VIA configuration. " | |
7eecec7d | 642 | "Valid values are cuda, pmu and pmu-adb"); |
f1114c17 | 643 | |
06fe3a5b MCA |
644 | return; |
645 | } | |
646 | ||
b1c2fb9b | 647 | static const TypeInfo core99_machine_info = { |
c0f36518 | 648 | .name = MACHINE_TYPE_NAME("mac99"), |
b1c2fb9b MA |
649 | .parent = TYPE_MACHINE, |
650 | .class_init = core99_machine_class_init, | |
06fe3a5b | 651 | .instance_init = core99_instance_init, |
5d19be6c MCA |
652 | .instance_size = sizeof(Core99MachineState), |
653 | .interfaces = (InterfaceInfo[]) { | |
654 | { TYPE_FW_PATH_PROVIDER }, | |
655 | { } | |
656 | }, | |
0aa6a4a2 | 657 | }; |
f80f9ec9 | 658 | |
b1c2fb9b | 659 | static void mac_machine_register_types(void) |
f80f9ec9 | 660 | { |
b1c2fb9b | 661 | type_register_static(&core99_machine_info); |
f80f9ec9 AL |
662 | } |
663 | ||
b1c2fb9b | 664 | type_init(mac_machine_register_types) |