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Commit | Line | Data |
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ae0bfb79 | 1 | |
3cbee15b | 2 | /* |
4d7ca41e | 3 | * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator |
3cbee15b JM |
4 | * |
5 | * Copyright (c) 2004-2007 Fabrice Bellard | |
6 | * Copyright (c) 2007 Jocelyn Mayer | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | */ | |
0d75590d | 26 | #include "qemu/osdep.h" |
ab3dd749 | 27 | #include "qemu/units.h" |
da34e65c | 28 | #include "qapi/error.h" |
baec1910 | 29 | #include "hw/hw.h" |
0d09e41a | 30 | #include "hw/ppc/ppc.h" |
baec1910 | 31 | #include "mac.h" |
0d09e41a | 32 | #include "hw/input/adb.h" |
9c17d615 | 33 | #include "sysemu/sysemu.h" |
1422e32d | 34 | #include "net/net.h" |
0d09e41a | 35 | #include "hw/isa/isa.h" |
baec1910 | 36 | #include "hw/pci/pci.h" |
a773e64a | 37 | #include "hw/pci/pci_host.h" |
baec1910 | 38 | #include "hw/boards.h" |
0d09e41a PB |
39 | #include "hw/nvram/fw_cfg.h" |
40 | #include "hw/char/escc.h" | |
e1218e48 | 41 | #include "hw/misc/macio/macio.h" |
baec1910 AF |
42 | #include "hw/ide.h" |
43 | #include "hw/loader.h" | |
bbcc635f | 44 | #include "hw/fw-path-provider.h" |
ca20cf32 | 45 | #include "elf.h" |
c525436e | 46 | #include "qemu/error-report.h" |
9c17d615 | 47 | #include "sysemu/kvm.h" |
dc333cd6 | 48 | #include "kvm_ppc.h" |
022c62cb | 49 | #include "exec/address-spaces.h" |
3cbee15b | 50 | |
e4bcb14c | 51 | #define MAX_IDE_BUS 2 |
271dd5e0 | 52 | #define CFG_ADDR 0xf0000510 |
536d8cda | 53 | #define TBFREQ 16600000UL |
9d1c1283 BZ |
54 | #define CLOCKFREQ 266000000UL |
55 | #define BUSFREQ 66000000UL | |
271dd5e0 | 56 | |
b50de5cd MCA |
57 | #define NDRV_VGA_FILENAME "qemu_vga.ndrv" |
58 | ||
a773e64a MCA |
59 | #define GRACKLE_BASE 0xfec00000 |
60 | ||
ddcd5531 GA |
61 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
62 | Error **errp) | |
513f789f | 63 | { |
48779e50 | 64 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); |
513f789f BS |
65 | } |
66 | ||
409dbce5 AJ |
67 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
68 | { | |
69 | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; | |
70 | } | |
71 | ||
1bba0dc9 AF |
72 | static void ppc_heathrow_reset(void *opaque) |
73 | { | |
cd79664f | 74 | PowerPCCPU *cpu = opaque; |
1bba0dc9 | 75 | |
cd79664f | 76 | cpu_reset(CPU(cpu)); |
1bba0dc9 AF |
77 | } |
78 | ||
3ef96221 | 79 | static void ppc_heathrow_init(MachineState *machine) |
3cbee15b | 80 | { |
3ef96221 | 81 | ram_addr_t ram_size = machine->ram_size; |
3ef96221 MA |
82 | const char *kernel_filename = machine->kernel_filename; |
83 | const char *kernel_cmdline = machine->kernel_cmdline; | |
84 | const char *initrd_filename = machine->initrd_filename; | |
85 | const char *boot_device = machine->boot_order; | |
c92bb2c7 | 86 | MemoryRegion *sysmem = get_system_memory(); |
72c33dd7 | 87 | PowerPCCPU *cpu = NULL; |
e2684c0b | 88 | CPUPPCState *env = NULL; |
5cea8590 | 89 | char *filename; |
3cbee15b | 90 | int linux_boot, i; |
c92bb2c7 AK |
91 | MemoryRegion *ram = g_new(MemoryRegion, 1); |
92 | MemoryRegion *bios = g_new(MemoryRegion, 1); | |
b9e17a34 | 93 | uint32_t kernel_base, initrd_base, cmdline_base = 0; |
7373048c | 94 | int32_t kernel_size, initrd_size; |
3cbee15b | 95 | PCIBus *pci_bus; |
017812df | 96 | OldWorldMacIOState *macio; |
07a7484e | 97 | MACIOIDEState *macio_ide; |
a773e64a | 98 | SysBusDevice *s; |
c2964600 | 99 | DeviceState *dev, *pic_dev; |
293c867d | 100 | BusState *adb_bus; |
9776874f | 101 | int bios_size; |
513f789f | 102 | uint16_t ppc_boot_device; |
f455e98c | 103 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
271dd5e0 | 104 | void *fw_cfg; |
caae6c96 | 105 | uint64_t tbfreq; |
3cbee15b JM |
106 | |
107 | linux_boot = (kernel_filename != NULL); | |
108 | ||
109 | /* init CPUs */ | |
3cbee15b | 110 | for (i = 0; i < smp_cpus; i++) { |
f4c6604e | 111 | cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); |
72c33dd7 AF |
112 | env = &cpu->env; |
113 | ||
b0fb43d8 | 114 | /* Set time-base frequency to 16.6 Mhz */ |
536d8cda | 115 | cpu_ppc_tb_init(env, TBFREQ); |
cd79664f | 116 | qemu_register_reset(ppc_heathrow_reset, cpu); |
3cbee15b JM |
117 | } |
118 | ||
119 | /* allocate RAM */ | |
ab3dd749 PMD |
120 | if (ram_size > 2047 * MiB) { |
121 | error_report("Too much memory for this machine: %" PRId64 " MB, " | |
122 | "maximum 2047 MB", ram_size / MiB); | |
6b4079f8 AJ |
123 | exit(1); |
124 | } | |
125 | ||
e938ba0c SP |
126 | memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram", |
127 | ram_size); | |
c92bb2c7 | 128 | memory_region_add_subregion(sysmem, 0, ram); |
a748ab6d | 129 | |
3cbee15b | 130 | /* allocate and load BIOS */ |
98a99ce0 | 131 | memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, |
f8ed85ac | 132 | &error_fatal); |
e206ad48 | 133 | |
3cbee15b | 134 | if (bios_name == NULL) |
992e5acd | 135 | bios_name = PROM_FILENAME; |
5cea8590 | 136 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
c92bb2c7 AK |
137 | memory_region_set_readonly(bios, true); |
138 | memory_region_add_subregion(sysmem, PROM_ADDR, bios); | |
992e5acd BS |
139 | |
140 | /* Load OpenBIOS (ELF) */ | |
5cea8590 | 141 | if (filename) { |
4366e1db | 142 | bios_size = load_elf(filename, NULL, 0, NULL, NULL, NULL, NULL, |
7ef295ea | 143 | 1, PPC_ELF_MACHINE, 0, 0); |
7267c094 | 144 | g_free(filename); |
5cea8590 PB |
145 | } else { |
146 | bios_size = -1; | |
147 | } | |
3cbee15b | 148 | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
c525436e | 149 | error_report("could not load PowerPC bios '%s'", bios_name); |
3cbee15b JM |
150 | exit(1); |
151 | } | |
3cbee15b | 152 | |
3cbee15b | 153 | if (linux_boot) { |
36bee1e3 | 154 | uint64_t lowaddr = 0; |
ca20cf32 BS |
155 | int bswap_needed; |
156 | ||
157 | #ifdef BSWAP_NEEDED | |
158 | bswap_needed = 1; | |
159 | #else | |
160 | bswap_needed = 0; | |
161 | #endif | |
3cbee15b | 162 | kernel_base = KERNEL_LOAD_ADDR; |
4366e1db LM |
163 | kernel_size = load_elf(kernel_filename, NULL, |
164 | translate_kernel_address, NULL, | |
7ef295ea PC |
165 | NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE, |
166 | 0, 0); | |
52f163b7 BS |
167 | if (kernel_size < 0) |
168 | kernel_size = load_aout(kernel_filename, kernel_base, | |
ca20cf32 BS |
169 | ram_size - kernel_base, bswap_needed, |
170 | TARGET_PAGE_SIZE); | |
52f163b7 BS |
171 | if (kernel_size < 0) |
172 | kernel_size = load_image_targphys(kernel_filename, | |
173 | kernel_base, | |
174 | ram_size - kernel_base); | |
3cbee15b | 175 | if (kernel_size < 0) { |
c525436e | 176 | error_report("could not load kernel '%s'", kernel_filename); |
3cbee15b JM |
177 | exit(1); |
178 | } | |
179 | /* load initrd */ | |
180 | if (initrd_filename) { | |
39d96847 | 181 | initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
dcac9679 PB |
182 | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
183 | ram_size - initrd_base); | |
3cbee15b | 184 | if (initrd_size < 0) { |
c525436e MA |
185 | error_report("could not load initial ram disk '%s'", |
186 | initrd_filename); | |
3cbee15b JM |
187 | exit(1); |
188 | } | |
39d96847 | 189 | cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); |
3cbee15b JM |
190 | } else { |
191 | initrd_base = 0; | |
192 | initrd_size = 0; | |
39d96847 | 193 | cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
3cbee15b | 194 | } |
6ac0e82d | 195 | ppc_boot_device = 'm'; |
3cbee15b JM |
196 | } else { |
197 | kernel_base = 0; | |
198 | kernel_size = 0; | |
199 | initrd_base = 0; | |
200 | initrd_size = 0; | |
28c5af54 | 201 | ppc_boot_device = '\0'; |
0d913fdb | 202 | for (i = 0; boot_device[i] != '\0'; i++) { |
28c5af54 | 203 | /* TOFIX: for now, the second IDE channel is not properly |
0d913fdb | 204 | * used by OHW. The Mac floppy disk are not emulated. |
28c5af54 JM |
205 | * For now, OHW cannot boot from the network. |
206 | */ | |
207 | #if 0 | |
0d913fdb JM |
208 | if (boot_device[i] >= 'a' && boot_device[i] <= 'f') { |
209 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 210 | break; |
0d913fdb | 211 | } |
28c5af54 | 212 | #else |
0d913fdb JM |
213 | if (boot_device[i] >= 'c' && boot_device[i] <= 'd') { |
214 | ppc_boot_device = boot_device[i]; | |
28c5af54 | 215 | break; |
0d913fdb | 216 | } |
28c5af54 JM |
217 | #endif |
218 | } | |
219 | if (ppc_boot_device == '\0') { | |
6f76b817 | 220 | error_report("No valid boot device for G3 Beige machine"); |
28c5af54 JM |
221 | exit(1); |
222 | } | |
3cbee15b JM |
223 | } |
224 | ||
3cbee15b | 225 | /* XXX: we register only 1 output pin for heathrow PIC */ |
a5ed75fe MCA |
226 | pic_dev = qdev_create(NULL, TYPE_HEATHROW); |
227 | qdev_init_nofail(pic_dev); | |
228 | ||
3cbee15b JM |
229 | /* Connect the heathrow PIC outputs to the 6xx bus */ |
230 | for (i = 0; i < smp_cpus; i++) { | |
231 | switch (PPC_INPUT(env)) { | |
232 | case PPC_FLAGS_INPUT_6xx: | |
a5ed75fe MCA |
233 | qdev_connect_gpio_out(pic_dev, 0, |
234 | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]); | |
3cbee15b JM |
235 | break; |
236 | default: | |
c525436e MA |
237 | error_report("Bus model not supported on OldWorld Mac machine"); |
238 | exit(1); | |
3cbee15b JM |
239 | } |
240 | } | |
241 | ||
caae6c96 AG |
242 | /* Timebase Frequency */ |
243 | if (kvm_enabled()) { | |
244 | tbfreq = kvmppc_get_tbfreq(); | |
245 | } else { | |
246 | tbfreq = TBFREQ; | |
247 | } | |
248 | ||
3cbee15b JM |
249 | /* init basic PC hardware */ |
250 | if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { | |
c525436e MA |
251 | error_report("Only 6xx bus is supported on heathrow machine"); |
252 | exit(1); | |
3cbee15b | 253 | } |
a5ed75fe | 254 | |
a773e64a MCA |
255 | /* Grackle PCI host bridge */ |
256 | dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE); | |
ac43eb2e | 257 | qdev_prop_set_uint32(dev, "ofw-addr", 0x80000000); |
a773e64a MCA |
258 | object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic", |
259 | &error_abort); | |
260 | qdev_init_nofail(dev); | |
261 | s = SYS_BUS_DEVICE(dev); | |
262 | sysbus_mmio_map(s, 0, GRACKLE_BASE); | |
263 | sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000); | |
264 | /* PCI hole */ | |
265 | memory_region_add_subregion(get_system_memory(), 0x80000000ULL, | |
266 | sysbus_mmio_get_region(s, 2)); | |
a94e5f99 MCA |
267 | /* Register 2 MB of ISA IO space */ |
268 | memory_region_add_subregion(get_system_memory(), 0xfe000000, | |
269 | sysbus_mmio_get_region(s, 3)); | |
a773e64a MCA |
270 | |
271 | pci_bus = PCI_HOST_BRIDGE(dev)->bus; | |
272 | ||
3e20ad3a | 273 | pci_vga_init(pci_bus); |
aae9366a | 274 | |
343bd85a | 275 | for (i = 0; i < nb_nics; i++) { |
29b358f9 | 276 | pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); |
343bd85a | 277 | } |
e4bcb14c | 278 | |
d8f94e1b | 279 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
bd4524ed | 280 | |
343bd85a | 281 | /* MacIO */ |
017812df | 282 | macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO)); |
07a7484e | 283 | dev = DEVICE(macio); |
b981289c | 284 | qdev_prop_set_uint64(dev, "frequency", tbfreq); |
017812df MCA |
285 | object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", |
286 | &error_abort); | |
b6712ea3 | 287 | qdev_init_nofail(dev); |
07a7484e | 288 | |
07a7484e | 289 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), |
14eefd0e | 290 | "ide[0]")); |
07a7484e AF |
291 | macio_ide_init_drives(macio_ide, hd); |
292 | ||
14eefd0e AG |
293 | macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio), |
294 | "ide[1]")); | |
295 | macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); | |
3cbee15b | 296 | |
293c867d AF |
297 | dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); |
298 | adb_bus = qdev_get_child_bus(dev, "adb.0"); | |
299 | dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); | |
2e4a7c9c | 300 | qdev_init_nofail(dev); |
293c867d | 301 | dev = qdev_create(adb_bus, TYPE_ADB_MOUSE); |
2e4a7c9c | 302 | qdev_init_nofail(dev); |
45fa67fb | 303 | |
4bcbe0b6 | 304 | if (machine_usb(machine)) { |
afb9a60e | 305 | pci_create_simple(pci_bus, -1, "pci-ohci"); |
3cbee15b JM |
306 | } |
307 | ||
308 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) | |
309 | graphic_depth = 15; | |
310 | ||
3cbee15b JM |
311 | /* No PCI init: the BIOS will do it */ |
312 | ||
81a07050 MCA |
313 | dev = qdev_create(NULL, TYPE_FW_CFG_MEM); |
314 | fw_cfg = FW_CFG(dev); | |
315 | qdev_prop_set_uint32(dev, "data_width", 1); | |
316 | qdev_prop_set_bit(dev, "dma_enabled", false); | |
317 | object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, | |
318 | OBJECT(fw_cfg), NULL); | |
319 | qdev_init_nofail(dev); | |
320 | s = SYS_BUS_DEVICE(dev); | |
321 | sysbus_mmio_map(s, 0, CFG_ADDR); | |
322 | sysbus_mmio_map(s, 1, CFG_ADDR + 2); | |
323 | ||
5836d168 | 324 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); |
70db9222 | 325 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); |
271dd5e0 BS |
326 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
327 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW); | |
513f789f BS |
328 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
329 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
330 | if (kernel_cmdline) { | |
b9e17a34 AG |
331 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); |
332 | pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline); | |
513f789f BS |
333 | } else { |
334 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
335 | } | |
336 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
337 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
338 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
7f1aec5f LV |
339 | |
340 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
341 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
342 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
343 | ||
45024f09 | 344 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); |
dc333cd6 AG |
345 | if (kvm_enabled()) { |
346 | #ifdef CONFIG_KVM | |
45024f09 AG |
347 | uint8_t *hypercall; |
348 | ||
7267c094 | 349 | hypercall = g_malloc(16); |
45024f09 AG |
350 | kvmppc_get_hypercall(env, hypercall, 16); |
351 | fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); | |
352 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); | |
dc333cd6 | 353 | #endif |
dc333cd6 | 354 | } |
caae6c96 | 355 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); |
a1014f25 | 356 | /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ |
9d1c1283 BZ |
357 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); |
358 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); | |
dc333cd6 | 359 | |
b50de5cd MCA |
360 | /* MacOS NDRV VGA driver */ |
361 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); | |
362 | if (filename) { | |
9776874f PM |
363 | gchar *ndrv_file; |
364 | gsize ndrv_size; | |
b50de5cd | 365 | |
9776874f | 366 | if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) { |
b50de5cd MCA |
367 | fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); |
368 | } | |
369 | g_free(filename); | |
370 | } | |
371 | ||
513f789f | 372 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
3cbee15b JM |
373 | } |
374 | ||
bbcc635f MCA |
375 | /* |
376 | * Implementation of an interface to adjust firmware path | |
377 | * for the bootindex property handling. | |
378 | */ | |
379 | static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus, | |
380 | DeviceState *dev) | |
381 | { | |
382 | PCIDevice *pci; | |
383 | IDEBus *ide_bus; | |
384 | IDEState *ide_s; | |
385 | MACIOIDEState *macio_ide; | |
386 | ||
387 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) { | |
388 | pci = PCI_DEVICE(dev); | |
389 | return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn)); | |
390 | } | |
391 | ||
392 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) { | |
393 | macio_ide = MACIO_IDE(dev); | |
394 | return g_strdup_printf("ata-3@%x", macio_ide->addr); | |
395 | } | |
396 | ||
397 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) { | |
398 | ide_bus = IDE_BUS(qdev_get_parent_bus(dev)); | |
399 | ide_s = idebus_active_if(ide_bus); | |
400 | ||
401 | if (ide_s->drive_kind == IDE_CD) { | |
402 | return g_strdup("cdrom"); | |
403 | } | |
404 | ||
405 | return g_strdup("hd"); | |
406 | } | |
407 | ||
408 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) { | |
409 | return g_strdup("hd"); | |
410 | } | |
411 | ||
412 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) { | |
413 | return g_strdup("cdrom"); | |
414 | } | |
415 | ||
416 | if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) { | |
417 | return g_strdup("disk"); | |
418 | } | |
419 | ||
420 | return NULL; | |
421 | } | |
422 | ||
277c7a4d AG |
423 | static int heathrow_kvm_type(const char *arg) |
424 | { | |
425 | /* Always force PR KVM */ | |
426 | return 2; | |
427 | } | |
428 | ||
c8bd3526 | 429 | static void heathrow_class_init(ObjectClass *oc, void *data) |
e264d29d | 430 | { |
c8bd3526 | 431 | MachineClass *mc = MACHINE_CLASS(oc); |
bbcc635f | 432 | FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc); |
c8bd3526 | 433 | |
e264d29d EH |
434 | mc->desc = "Heathrow based PowerMAC"; |
435 | mc->init = ppc_heathrow_init; | |
2059839b | 436 | mc->block_default_type = IF_IDE; |
e264d29d | 437 | mc->max_cpus = MAX_CPUS; |
46214a27 | 438 | #ifndef TARGET_PPC64 |
e264d29d | 439 | mc->is_default = 1; |
46214a27 | 440 | #endif |
f309ae85 | 441 | /* TOFIX "cad" when Mac floppy is implemented */ |
e264d29d EH |
442 | mc->default_boot_order = "cd"; |
443 | mc->kvm_type = heathrow_kvm_type; | |
f4c6604e | 444 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1"); |
3232794b | 445 | mc->default_display = "std"; |
bbcc635f MCA |
446 | mc->ignore_boot_device_suffixes = true; |
447 | fwc->get_dev_path = heathrow_fw_dev_path; | |
f80f9ec9 AL |
448 | } |
449 | ||
c8bd3526 MCA |
450 | static const TypeInfo ppc_heathrow_machine_info = { |
451 | .name = MACHINE_TYPE_NAME("g3beige"), | |
452 | .parent = TYPE_MACHINE, | |
bbcc635f MCA |
453 | .class_init = heathrow_class_init, |
454 | .interfaces = (InterfaceInfo[]) { | |
455 | { TYPE_FW_PATH_PROVIDER }, | |
456 | { } | |
457 | }, | |
c8bd3526 MCA |
458 | }; |
459 | ||
460 | static void ppc_heathrow_register_types(void) | |
461 | { | |
462 | type_register_static(&ppc_heathrow_machine_info); | |
463 | } | |
464 | ||
465 | type_init(ppc_heathrow_register_types); |