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Commit | Line | Data |
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ae0bfb79 | 1 | |
3cbee15b | 2 | /* |
4d7ca41e | 3 | * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator |
3cbee15b JM |
4 | * |
5 | * Copyright (c) 2004-2007 Fabrice Bellard | |
6 | * Copyright (c) 2007 Jocelyn Mayer | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | */ | |
a8d25326 | 26 | |
0d75590d | 27 | #include "qemu/osdep.h" |
2c65db5e | 28 | #include "qemu/datadir.h" |
ab3dd749 | 29 | #include "qemu/units.h" |
da34e65c | 30 | #include "qapi/error.h" |
0d09e41a | 31 | #include "hw/ppc/ppc.h" |
a27bd6c7 | 32 | #include "hw/qdev-properties.h" |
cfb47bfa | 33 | #include "hw/boards.h" |
0d09e41a | 34 | #include "hw/input/adb.h" |
9c17d615 | 35 | #include "sysemu/sysemu.h" |
1422e32d | 36 | #include "net/net.h" |
0d09e41a | 37 | #include "hw/isa/isa.h" |
baec1910 | 38 | #include "hw/pci/pci.h" |
a773e64a | 39 | #include "hw/pci/pci_host.h" |
87e5a4f8 | 40 | #include "hw/pci-host/grackle.h" |
0d09e41a PB |
41 | #include "hw/nvram/fw_cfg.h" |
42 | #include "hw/char/escc.h" | |
e1218e48 | 43 | #include "hw/misc/macio/macio.h" |
baec1910 | 44 | #include "hw/loader.h" |
bbcc635f | 45 | #include "hw/fw-path-provider.h" |
ca20cf32 | 46 | #include "elf.h" |
c525436e | 47 | #include "qemu/error-report.h" |
9c17d615 | 48 | #include "sysemu/kvm.h" |
71e8a915 | 49 | #include "sysemu/reset.h" |
dc333cd6 | 50 | #include "kvm_ppc.h" |
3cbee15b | 51 | |
e4bcb14c | 52 | #define MAX_IDE_BUS 2 |
271dd5e0 | 53 | #define CFG_ADDR 0xf0000510 |
536d8cda | 54 | #define TBFREQ 16600000UL |
9d1c1283 BZ |
55 | #define CLOCKFREQ 266000000UL |
56 | #define BUSFREQ 66000000UL | |
271dd5e0 | 57 | |
b50de5cd MCA |
58 | #define NDRV_VGA_FILENAME "qemu_vga.ndrv" |
59 | ||
3d0031c1 | 60 | #define PROM_FILENAME "openbios-ppc" |
464c73e8 BZ |
61 | #define PROM_BASE 0xffc00000 |
62 | #define PROM_SIZE (4 * MiB) | |
a773e64a | 63 | |
3d0031c1 BZ |
64 | #define KERNEL_LOAD_ADDR 0x01000000 |
65 | #define KERNEL_GAP 0x00100000 | |
66 | ||
67 | #define GRACKLE_BASE 0xfec00000 | |
68 | ||
ddcd5531 GA |
69 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
70 | Error **errp) | |
513f789f | 71 | { |
48779e50 | 72 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); |
513f789f BS |
73 | } |
74 | ||
409dbce5 AJ |
75 | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
76 | { | |
77 | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; | |
78 | } | |
79 | ||
1bba0dc9 AF |
80 | static void ppc_heathrow_reset(void *opaque) |
81 | { | |
cd79664f | 82 | PowerPCCPU *cpu = opaque; |
1bba0dc9 | 83 | |
cd79664f | 84 | cpu_reset(CPU(cpu)); |
1bba0dc9 AF |
85 | } |
86 | ||
3ef96221 | 87 | static void ppc_heathrow_init(MachineState *machine) |
3cbee15b | 88 | { |
cd7b9498 | 89 | const char *bios_name = machine->firmware ?: PROM_FILENAME; |
72c33dd7 | 90 | PowerPCCPU *cpu = NULL; |
e2684c0b | 91 | CPUPPCState *env = NULL; |
5cea8590 | 92 | char *filename; |
6120dc8d | 93 | int i, bios_size = -1; |
c92bb2c7 | 94 | MemoryRegion *bios = g_new(MemoryRegion, 1); |
94c92e1a | 95 | uint64_t bios_addr; |
6120dc8d BZ |
96 | uint32_t kernel_base = 0, initrd_base = 0, cmdline_base = 0; |
97 | int32_t kernel_size = 0, initrd_size = 0; | |
3cbee15b | 98 | PCIBus *pci_bus; |
18e0383b | 99 | Object *macio; |
07a7484e | 100 | MACIOIDEState *macio_ide; |
a773e64a | 101 | SysBusDevice *s; |
370022ce | 102 | DeviceState *dev, *pic_dev, *grackle_dev; |
293c867d | 103 | BusState *adb_bus; |
513f789f | 104 | uint16_t ppc_boot_device; |
f455e98c | 105 | DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
271dd5e0 | 106 | void *fw_cfg; |
6b924abe | 107 | uint64_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TBFREQ; |
3cbee15b | 108 | |
3cbee15b | 109 | /* init CPUs */ |
94c92e1a | 110 | for (i = 0; i < machine->smp.cpus; i++) { |
f4c6604e | 111 | cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); |
72c33dd7 AF |
112 | env = &cpu->env; |
113 | ||
b0fb43d8 | 114 | /* Set time-base frequency to 16.6 Mhz */ |
536d8cda | 115 | cpu_ppc_tb_init(env, TBFREQ); |
cd79664f | 116 | qemu_register_reset(ppc_heathrow_reset, cpu); |
3cbee15b JM |
117 | } |
118 | ||
119 | /* allocate RAM */ | |
94c92e1a | 120 | if (machine->ram_size > 2047 * MiB) { |
ab3dd749 | 121 | error_report("Too much memory for this machine: %" PRId64 " MB, " |
94c92e1a | 122 | "maximum 2047 MB", machine->ram_size / MiB); |
6b4079f8 AJ |
123 | exit(1); |
124 | } | |
125 | ||
c3481ab0 | 126 | memory_region_add_subregion(get_system_memory(), 0, machine->ram); |
a748ab6d | 127 | |
464c73e8 BZ |
128 | /* allocate and load firmware ROM */ |
129 | memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE, | |
f8ed85ac | 130 | &error_fatal); |
c3481ab0 | 131 | memory_region_add_subregion(get_system_memory(), PROM_BASE, bios); |
e206ad48 | 132 | |
5cea8590 | 133 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
5cea8590 | 134 | if (filename) { |
464c73e8 BZ |
135 | /* Load OpenBIOS (ELF) */ |
136 | bios_size = load_elf(filename, NULL, NULL, NULL, NULL, &bios_addr, | |
137 | NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); | |
138 | /* Unfortunately, load_elf sign-extends reading elf32 */ | |
139 | bios_addr = (uint32_t)bios_addr; | |
140 | ||
141 | if (bios_size <= 0) { | |
b8df3255 | 142 | /* or if could not load ELF try loading a binary ROM image */ |
464c73e8 BZ |
143 | bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE); |
144 | bios_addr = PROM_BASE; | |
145 | } | |
7267c094 | 146 | g_free(filename); |
5cea8590 | 147 | } |
464c73e8 | 148 | if (bios_size < 0 || bios_addr - PROM_BASE + bios_size > PROM_SIZE) { |
c525436e | 149 | error_report("could not load PowerPC bios '%s'", bios_name); |
3cbee15b JM |
150 | exit(1); |
151 | } | |
3cbee15b | 152 | |
b8df3255 | 153 | if (machine->kernel_filename) { |
6120dc8d | 154 | int bswap_needed = 0; |
ca20cf32 BS |
155 | |
156 | #ifdef BSWAP_NEEDED | |
157 | bswap_needed = 1; | |
ca20cf32 | 158 | #endif |
3cbee15b | 159 | kernel_base = KERNEL_LOAD_ADDR; |
b8df3255 | 160 | kernel_size = load_elf(machine->kernel_filename, NULL, |
617160c9 BZ |
161 | translate_kernel_address, NULL, NULL, NULL, |
162 | NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); | |
cc537e13 | 163 | if (kernel_size < 0) { |
b8df3255 | 164 | kernel_size = load_aout(machine->kernel_filename, kernel_base, |
94c92e1a BZ |
165 | machine->ram_size - kernel_base, |
166 | bswap_needed, TARGET_PAGE_SIZE); | |
cc537e13 BZ |
167 | } |
168 | if (kernel_size < 0) { | |
b8df3255 | 169 | kernel_size = load_image_targphys(machine->kernel_filename, |
52f163b7 | 170 | kernel_base, |
94c92e1a | 171 | machine->ram_size - kernel_base); |
cc537e13 | 172 | } |
3cbee15b | 173 | if (kernel_size < 0) { |
b8df3255 BZ |
174 | error_report("could not load kernel '%s'", |
175 | machine->kernel_filename); | |
3cbee15b JM |
176 | exit(1); |
177 | } | |
178 | /* load initrd */ | |
b8df3255 BZ |
179 | if (machine->initrd_filename) { |
180 | initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + | |
181 | KERNEL_GAP); | |
182 | initrd_size = load_image_targphys(machine->initrd_filename, | |
183 | initrd_base, | |
94c92e1a | 184 | machine->ram_size - initrd_base); |
3cbee15b | 185 | if (initrd_size < 0) { |
c525436e | 186 | error_report("could not load initial ram disk '%s'", |
b8df3255 | 187 | machine->initrd_filename); |
3cbee15b JM |
188 | exit(1); |
189 | } | |
39d96847 | 190 | cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size); |
3cbee15b | 191 | } else { |
39d96847 | 192 | cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP); |
3cbee15b | 193 | } |
6ac0e82d | 194 | ppc_boot_device = 'm'; |
3cbee15b | 195 | } else { |
28c5af54 | 196 | ppc_boot_device = '\0'; |
94c92e1a BZ |
197 | for (i = 0; machine->boot_config.order[i] != '\0'; i++) { |
198 | /* | |
199 | * TOFIX: for now, the second IDE channel is not properly | |
0d913fdb | 200 | * used by OHW. The Mac floppy disk are not emulated. |
28c5af54 JM |
201 | * For now, OHW cannot boot from the network. |
202 | */ | |
203 | #if 0 | |
94c92e1a BZ |
204 | if (machine->boot_config.order[i] >= 'a' && |
205 | machine->boot_config.order[i] <= 'f') { | |
206 | ppc_boot_device = machine->boot_config.order[i]; | |
28c5af54 | 207 | break; |
0d913fdb | 208 | } |
28c5af54 | 209 | #else |
94c92e1a BZ |
210 | if (machine->boot_config.order[i] >= 'c' && |
211 | machine->boot_config.order[i] <= 'd') { | |
212 | ppc_boot_device = machine->boot_config.order[i]; | |
28c5af54 | 213 | break; |
0d913fdb | 214 | } |
28c5af54 JM |
215 | #endif |
216 | } | |
217 | if (ppc_boot_device == '\0') { | |
6f76b817 | 218 | error_report("No valid boot device for G3 Beige machine"); |
28c5af54 JM |
219 | exit(1); |
220 | } | |
3cbee15b JM |
221 | } |
222 | ||
49ac51ae | 223 | /* Grackle PCI host bridge */ |
370022ce MCA |
224 | grackle_dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE); |
225 | qdev_prop_set_uint32(grackle_dev, "ofw-addr", 0x80000000); | |
226 | s = SYS_BUS_DEVICE(grackle_dev); | |
49ac51ae MCA |
227 | sysbus_realize_and_unref(s, &error_fatal); |
228 | ||
229 | sysbus_mmio_map(s, 0, GRACKLE_BASE); | |
230 | sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000); | |
231 | /* PCI hole */ | |
232 | memory_region_add_subregion(get_system_memory(), 0x80000000ULL, | |
233 | sysbus_mmio_get_region(s, 2)); | |
234 | /* Register 2 MB of ISA IO space */ | |
235 | memory_region_add_subregion(get_system_memory(), 0xfe000000, | |
236 | sysbus_mmio_get_region(s, 3)); | |
237 | ||
370022ce MCA |
238 | pci_bus = PCI_HOST_BRIDGE(grackle_dev)->bus; |
239 | ||
240 | /* MacIO */ | |
18e0383b BZ |
241 | macio = OBJECT(pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO)); |
242 | qdev_prop_set_uint64(DEVICE(macio), "frequency", tbfreq); | |
370022ce | 243 | |
18e0383b BZ |
244 | dev = DEVICE(object_resolve_path_component(macio, "escc")); |
245 | qdev_prop_set_chr(dev, "chrA", serial_hd(0)); | |
246 | qdev_prop_set_chr(dev, "chrB", serial_hd(1)); | |
370022ce | 247 | |
18e0383b | 248 | pci_realize_and_unref(PCI_DEVICE(macio), pci_bus, &error_fatal); |
370022ce | 249 | |
18e0383b | 250 | pic_dev = DEVICE(object_resolve_path_component(macio, "pic")); |
370022ce MCA |
251 | for (i = 0; i < 4; i++) { |
252 | qdev_connect_gpio_out(grackle_dev, i, | |
253 | qdev_get_gpio_in(pic_dev, 0x15 + i)); | |
254 | } | |
a5ed75fe | 255 | |
3cbee15b | 256 | /* Connect the heathrow PIC outputs to the 6xx bus */ |
94c92e1a | 257 | for (i = 0; i < machine->smp.cpus; i++) { |
3cbee15b JM |
258 | switch (PPC_INPUT(env)) { |
259 | case PPC_FLAGS_INPUT_6xx: | |
370022ce | 260 | /* XXX: we register only 1 output pin for heathrow PIC */ |
a5ed75fe | 261 | qdev_connect_gpio_out(pic_dev, 0, |
0f3e0c6f | 262 | qdev_get_gpio_in(DEVICE(cpu), PPC6xx_INPUT_INT)); |
3cbee15b JM |
263 | break; |
264 | default: | |
c525436e MA |
265 | error_report("Bus model not supported on OldWorld Mac machine"); |
266 | exit(1); | |
3cbee15b JM |
267 | } |
268 | } | |
269 | ||
3e20ad3a | 270 | pci_vga_init(pci_bus); |
aae9366a | 271 | |
343bd85a | 272 | for (i = 0; i < nb_nics; i++) { |
29b358f9 | 273 | pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL); |
343bd85a | 274 | } |
e4bcb14c | 275 | |
370022ce | 276 | /* MacIO IDE */ |
d8f94e1b | 277 | ide_drive_get(hd, ARRAY_SIZE(hd)); |
18e0383b | 278 | macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[0]")); |
07a7484e AF |
279 | macio_ide_init_drives(macio_ide, hd); |
280 | ||
18e0383b | 281 | macio_ide = MACIO_IDE(object_resolve_path_component(macio, "ide[1]")); |
14eefd0e | 282 | macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); |
3cbee15b | 283 | |
370022ce | 284 | /* MacIO CUDA/ADB */ |
18e0383b | 285 | dev = DEVICE(object_resolve_path_component(macio, "cuda")); |
293c867d | 286 | adb_bus = qdev_get_child_bus(dev, "adb.0"); |
3e80f690 MA |
287 | dev = qdev_new(TYPE_ADB_KEYBOARD); |
288 | qdev_realize_and_unref(dev, adb_bus, &error_fatal); | |
289 | dev = qdev_new(TYPE_ADB_MOUSE); | |
290 | qdev_realize_and_unref(dev, adb_bus, &error_fatal); | |
45fa67fb | 291 | |
4bcbe0b6 | 292 | if (machine_usb(machine)) { |
afb9a60e | 293 | pci_create_simple(pci_bus, -1, "pci-ohci"); |
3cbee15b JM |
294 | } |
295 | ||
cc537e13 | 296 | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) { |
3cbee15b | 297 | graphic_depth = 15; |
cc537e13 | 298 | } |
3cbee15b | 299 | |
3cbee15b JM |
300 | /* No PCI init: the BIOS will do it */ |
301 | ||
3e80f690 | 302 | dev = qdev_new(TYPE_FW_CFG_MEM); |
81a07050 MCA |
303 | fw_cfg = FW_CFG(dev); |
304 | qdev_prop_set_uint32(dev, "data_width", 1); | |
305 | qdev_prop_set_bit(dev, "dma_enabled", false); | |
4db4847d | 306 | object_property_add_child(OBJECT(machine), TYPE_FW_CFG, OBJECT(fw_cfg)); |
81a07050 | 307 | s = SYS_BUS_DEVICE(dev); |
3c6ef471 | 308 | sysbus_realize_and_unref(s, &error_fatal); |
81a07050 MCA |
309 | sysbus_mmio_map(s, 0, CFG_ADDR); |
310 | sysbus_mmio_map(s, 1, CFG_ADDR + 2); | |
311 | ||
94c92e1a | 312 | fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)machine->smp.cpus); |
fe6b6346 | 313 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus); |
94c92e1a | 314 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); |
271dd5e0 | 315 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW); |
513f789f BS |
316 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
317 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); | |
b8df3255 | 318 | if (machine->kernel_cmdline) { |
b9e17a34 | 319 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base); |
b8df3255 BZ |
320 | pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, |
321 | machine->kernel_cmdline); | |
513f789f BS |
322 | } else { |
323 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); | |
324 | } | |
325 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); | |
326 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); | |
327 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device); | |
7f1aec5f LV |
328 | |
329 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); | |
330 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); | |
331 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); | |
332 | ||
45024f09 | 333 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled()); |
dc333cd6 | 334 | if (kvm_enabled()) { |
45024f09 AG |
335 | uint8_t *hypercall; |
336 | ||
7267c094 | 337 | hypercall = g_malloc(16); |
45024f09 AG |
338 | kvmppc_get_hypercall(env, hypercall, 16); |
339 | fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16); | |
340 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid()); | |
dc333cd6 | 341 | } |
caae6c96 | 342 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq); |
a1014f25 | 343 | /* Mac OS X requires a "known good" clock-frequency value; pass it one. */ |
9d1c1283 BZ |
344 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ); |
345 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ); | |
dc333cd6 | 346 | |
b50de5cd MCA |
347 | /* MacOS NDRV VGA driver */ |
348 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME); | |
349 | if (filename) { | |
9776874f PM |
350 | gchar *ndrv_file; |
351 | gsize ndrv_size; | |
b50de5cd | 352 | |
9776874f | 353 | if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) { |
b50de5cd MCA |
354 | fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size); |
355 | } | |
356 | g_free(filename); | |
357 | } | |
358 | ||
513f789f | 359 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
3cbee15b JM |
360 | } |
361 | ||
bbcc635f MCA |
362 | /* |
363 | * Implementation of an interface to adjust firmware path | |
364 | * for the bootindex property handling. | |
365 | */ | |
366 | static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus, | |
367 | DeviceState *dev) | |
368 | { | |
369 | PCIDevice *pci; | |
bbcc635f MCA |
370 | MACIOIDEState *macio_ide; |
371 | ||
372 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) { | |
373 | pci = PCI_DEVICE(dev); | |
374 | return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn)); | |
375 | } | |
376 | ||
377 | if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) { | |
378 | macio_ide = MACIO_IDE(dev); | |
379 | return g_strdup_printf("ata-3@%x", macio_ide->addr); | |
380 | } | |
381 | ||
bbcc635f | 382 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) { |
484d366e | 383 | return g_strdup("disk"); |
bbcc635f MCA |
384 | } |
385 | ||
386 | if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) { | |
387 | return g_strdup("cdrom"); | |
388 | } | |
389 | ||
390 | if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) { | |
391 | return g_strdup("disk"); | |
392 | } | |
393 | ||
394 | return NULL; | |
395 | } | |
396 | ||
dc0ca80e | 397 | static int heathrow_kvm_type(MachineState *machine, const char *arg) |
277c7a4d AG |
398 | { |
399 | /* Always force PR KVM */ | |
400 | return 2; | |
401 | } | |
402 | ||
c8bd3526 | 403 | static void heathrow_class_init(ObjectClass *oc, void *data) |
e264d29d | 404 | { |
c8bd3526 | 405 | MachineClass *mc = MACHINE_CLASS(oc); |
bbcc635f | 406 | FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc); |
c8bd3526 | 407 | |
e264d29d EH |
408 | mc->desc = "Heathrow based PowerMAC"; |
409 | mc->init = ppc_heathrow_init; | |
2059839b | 410 | mc->block_default_type = IF_IDE; |
83234b82 PM |
411 | /* SMP is not supported currently */ |
412 | mc->max_cpus = 1; | |
46214a27 | 413 | #ifndef TARGET_PPC64 |
ea0ac7f6 | 414 | mc->is_default = true; |
46214a27 | 415 | #endif |
f309ae85 | 416 | /* TOFIX "cad" when Mac floppy is implemented */ |
e264d29d EH |
417 | mc->default_boot_order = "cd"; |
418 | mc->kvm_type = heathrow_kvm_type; | |
f4c6604e | 419 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1"); |
3232794b | 420 | mc->default_display = "std"; |
bbcc635f | 421 | mc->ignore_boot_device_suffixes = true; |
8ee06e4c | 422 | mc->default_ram_id = "ppc_heathrow.ram"; |
bbcc635f | 423 | fwc->get_dev_path = heathrow_fw_dev_path; |
f80f9ec9 AL |
424 | } |
425 | ||
c8bd3526 MCA |
426 | static const TypeInfo ppc_heathrow_machine_info = { |
427 | .name = MACHINE_TYPE_NAME("g3beige"), | |
428 | .parent = TYPE_MACHINE, | |
bbcc635f MCA |
429 | .class_init = heathrow_class_init, |
430 | .interfaces = (InterfaceInfo[]) { | |
431 | { TYPE_FW_PATH_PROVIDER }, | |
432 | { } | |
433 | }, | |
c8bd3526 MCA |
434 | }; |
435 | ||
436 | static void ppc_heathrow_register_types(void) | |
437 | { | |
438 | type_register_static(&ppc_heathrow_machine_info); | |
439 | } | |
440 | ||
441 | type_init(ppc_heathrow_register_types); |