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Commit | Line | Data |
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2c9fade2 | 1 | /* |
5cbdb3a3 | 2 | * QEMU PowerPC 440 Bamboo board emulation |
2c9fade2 AJ |
3 | * |
4 | * Copyright 2007 IBM Corporation. | |
5 | * Authors: | |
2d94af4b GZ |
6 | * Jerone Young <jyoung5@us.ibm.com> |
7 | * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> | |
8 | * Hollis Blanchard <hollisb@us.ibm.com> | |
2c9fade2 AJ |
9 | * |
10 | * This work is licensed under the GNU GPL license version 2 or later. | |
11 | * | |
12 | */ | |
13 | ||
0d75590d | 14 | #include "qemu/osdep.h" |
ab3dd749 | 15 | #include "qemu/units.h" |
2c65db5e | 16 | #include "qemu/datadir.h" |
64b47457 | 17 | #include "qemu/error-report.h" |
74781c08 | 18 | #include "exec/page-protection.h" |
1422e32d | 19 | #include "net/net.h" |
83c9f4ca PB |
20 | #include "hw/pci/pci.h" |
21 | #include "hw/boards.h" | |
9c17d615 | 22 | #include "sysemu/kvm.h" |
9c17d615 | 23 | #include "sysemu/device_tree.h" |
83c9f4ca | 24 | #include "hw/loader.h" |
ca20cf32 | 25 | #include "elf.h" |
0d09e41a PB |
26 | #include "hw/char/serial.h" |
27 | #include "hw/ppc/ppc.h" | |
4d641f36 | 28 | #include "hw/pci-host/ppc4xx.h" |
9c17d615 | 29 | #include "sysemu/sysemu.h" |
71e8a915 | 30 | #include "sysemu/reset.h" |
83c9f4ca | 31 | #include "hw/sysbus.h" |
0270d74e PM |
32 | #include "hw/intc/ppc-uic.h" |
33 | #include "hw/qdev-properties.h" | |
34 | #include "qapi/error.h" | |
2c9fade2 | 35 | |
8d42c851 DHB |
36 | #include <libfdt.h> |
37 | ||
2c9fade2 AJ |
38 | #define BINARY_DEVICE_TREE_FILE "bamboo.dtb" |
39 | ||
ceee6da6 HB |
40 | /* from u-boot */ |
41 | #define KERNEL_ADDR 0x1000000 | |
42 | #define FDT_ADDR 0x1800000 | |
43 | #define RAMDISK_ADDR 0x1900000 | |
44 | ||
3960b04d AG |
45 | #define PPC440EP_PCI_CONFIG 0xeec00000 |
46 | #define PPC440EP_PCI_INTACK 0xeed00000 | |
47 | #define PPC440EP_PCI_SPECIAL 0xeed00000 | |
48 | #define PPC440EP_PCI_REGS 0xef400000 | |
49 | #define PPC440EP_PCI_IO 0xe8000000 | |
50 | #define PPC440EP_PCI_IOLEN 0x00010000 | |
51 | ||
a8170e5e | 52 | static hwaddr entry; |
b10a04b5 | 53 | |
8d42c851 DHB |
54 | static int bamboo_load_device_tree(MachineState *machine, |
55 | hwaddr addr, | |
56 | hwaddr initrd_base, | |
57 | hwaddr initrd_size) | |
2c9fade2 | 58 | { |
dbf916d8 | 59 | int ret = -1; |
8d42c851 | 60 | uint32_t mem_reg_property[] = { 0, 0, cpu_to_be32(machine->ram_size) }; |
5cea8590 | 61 | char *filename; |
7ec632b4 | 62 | int fdt_size; |
dbf916d8 | 63 | void *fdt; |
7dadd40c AG |
64 | uint32_t tb_freq = 400000000; |
65 | uint32_t clock_freq = 400000000; | |
2c9fade2 | 66 | |
5cea8590 PB |
67 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE); |
68 | if (!filename) { | |
400431ef | 69 | return -1; |
5cea8590 PB |
70 | } |
71 | fdt = load_device_tree(filename, &fdt_size); | |
7267c094 | 72 | g_free(filename); |
5cea8590 | 73 | if (fdt == NULL) { |
400431ef | 74 | return -1; |
5cea8590 | 75 | } |
2c9fade2 AJ |
76 | |
77 | /* Manipulate device tree in memory. */ | |
78 | ||
5a4348d1 PC |
79 | ret = qemu_fdt_setprop(fdt, "/memory", "reg", mem_reg_property, |
80 | sizeof(mem_reg_property)); | |
95e22932 | 81 | if (ret < 0) { |
2c9fade2 | 82 | fprintf(stderr, "couldn't set /memory/reg\n"); |
95e22932 | 83 | } |
5a4348d1 PC |
84 | ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", |
85 | initrd_base); | |
95e22932 | 86 | if (ret < 0) { |
2c9fade2 | 87 | fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n"); |
95e22932 | 88 | } |
5a4348d1 PC |
89 | ret = qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", |
90 | (initrd_base + initrd_size)); | |
95e22932 | 91 | if (ret < 0) { |
2c9fade2 | 92 | fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n"); |
95e22932 | 93 | } |
5a4348d1 | 94 | ret = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", |
8d42c851 | 95 | machine->kernel_cmdline); |
95e22932 | 96 | if (ret < 0) { |
2c9fade2 | 97 | fprintf(stderr, "couldn't set /chosen/bootargs\n"); |
95e22932 | 98 | } |
2c9fade2 | 99 | |
5a4348d1 PC |
100 | qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "clock-frequency", |
101 | clock_freq); | |
102 | qemu_fdt_setprop_cell(fdt, "/cpus/cpu@0", "timebase-frequency", | |
103 | tb_freq); | |
2c9fade2 | 104 | |
fe1479aa | 105 | rom_add_blob_fixed(BINARY_DEVICE_TREE_FILE, fdt, fdt_size, addr); |
8d42c851 DHB |
106 | |
107 | /* Set ms->fdt for 'dumpdtb' QMP/HMP command */ | |
108 | machine->fdt = fdt; | |
109 | ||
fe1479aa | 110 | return 0; |
2c9fade2 AJ |
111 | } |
112 | ||
72718e9a | 113 | /* Create reset TLB entries for BookE, spanning the 32bit addr space. */ |
e2684c0b | 114 | static void mmubooke_create_initial_mapping(CPUPPCState *env, |
72718e9a | 115 | target_ulong va, |
a8170e5e | 116 | hwaddr pa) |
72718e9a AG |
117 | { |
118 | ppcemb_tlb_t *tlb = &env->tlb.tlbe[0]; | |
119 | ||
120 | tlb->attr = 0; | |
121 | tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); | |
a1f7f97b | 122 | tlb->size = 1U << 31; /* up to 0x80000000 */ |
72718e9a AG |
123 | tlb->EPN = va & TARGET_PAGE_MASK; |
124 | tlb->RPN = pa & TARGET_PAGE_MASK; | |
125 | tlb->PID = 0; | |
126 | ||
127 | tlb = &env->tlb.tlbe[1]; | |
128 | tlb->attr = 0; | |
129 | tlb->prot = PAGE_VALID | ((PAGE_READ | PAGE_WRITE | PAGE_EXEC) << 4); | |
a1f7f97b | 130 | tlb->size = 1U << 31; /* up to 0xffffffff */ |
72718e9a AG |
131 | tlb->EPN = 0x80000000 & TARGET_PAGE_MASK; |
132 | tlb->RPN = 0x80000000 & TARGET_PAGE_MASK; | |
133 | tlb->PID = 0; | |
134 | } | |
135 | ||
b10a04b5 AG |
136 | static void main_cpu_reset(void *opaque) |
137 | { | |
182fbbf2 AF |
138 | PowerPCCPU *cpu = opaque; |
139 | CPUPPCState *env = &cpu->env; | |
b10a04b5 | 140 | |
182fbbf2 | 141 | cpu_reset(CPU(cpu)); |
ab3dd749 | 142 | env->gpr[1] = (16 * MiB) - 8; |
b10a04b5 AG |
143 | env->gpr[3] = FDT_ADDR; |
144 | env->nip = entry; | |
72718e9a AG |
145 | |
146 | /* Create a mapping for the kernel. */ | |
147 | mmubooke_create_initial_mapping(env, 0, 0); | |
b10a04b5 AG |
148 | } |
149 | ||
3ef96221 | 150 | static void bamboo_init(MachineState *machine) |
2c9fade2 | 151 | { |
3ef96221 | 152 | const char *kernel_filename = machine->kernel_filename; |
3ef96221 | 153 | const char *initrd_filename = machine->initrd_filename; |
053b7086 | 154 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
2c9fade2 | 155 | unsigned int pci_irq_nrs[4] = { 28, 27, 26, 25 }; |
3e9f0113 | 156 | MemoryRegion *address_space_mem = get_system_memory(); |
68501502 | 157 | MemoryRegion *isa = g_new(MemoryRegion, 1); |
2c9fade2 | 158 | PCIBus *pcibus; |
322164e0 | 159 | PowerPCCPU *cpu; |
e2684c0b | 160 | CPUPPCState *env; |
2c9fade2 | 161 | target_long initrd_size = 0; |
34ba1dc8 | 162 | DeviceState *dev; |
0270d74e PM |
163 | DeviceState *uicdev; |
164 | SysBusDevice *uicsbd; | |
ceee6da6 | 165 | int success; |
2c9fade2 | 166 | |
74b2fd63 CLG |
167 | if (kvm_enabled()) { |
168 | error_report("machine %s does not support the KVM accelerator", | |
169 | MACHINE_GET_CLASS(machine)->name); | |
170 | exit(EXIT_FAILURE); | |
171 | } | |
172 | ||
376d7a2a | 173 | cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); |
322164e0 | 174 | env = &cpu->env; |
34ba1dc8 | 175 | |
00469dc3 | 176 | if (env->mmu_model != POWERPC_MMU_BOOKE) { |
6f76b817 AF |
177 | error_report("MMU model %i not supported by this machine", |
178 | env->mmu_model); | |
00469dc3 VP |
179 | exit(1); |
180 | } | |
181 | ||
182fbbf2 | 182 | qemu_register_reset(main_cpu_reset, cpu); |
a34a92b9 | 183 | ppc_booke_timers_init(cpu, 400000000, 0); |
34ba1dc8 AG |
184 | ppc_dcr_init(env, NULL, NULL); |
185 | ||
186 | /* interrupt controller */ | |
0270d74e | 187 | uicdev = qdev_new(TYPE_PPC_UIC); |
a55b2136 BZ |
188 | ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(uicdev), cpu, &error_fatal); |
189 | object_unref(OBJECT(uicdev)); | |
0270d74e | 190 | uicsbd = SYS_BUS_DEVICE(uicdev); |
0270d74e | 191 | sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_INT, |
47b60fc6 | 192 | qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_INT)); |
0270d74e | 193 | sysbus_connect_irq(uicsbd, PPCUIC_OUTPUT_CINT, |
47b60fc6 | 194 | qdev_get_gpio_in(DEVICE(cpu), PPC40x_INPUT_CINT)); |
34ba1dc8 AG |
195 | |
196 | /* SDRAM controller */ | |
4fc30e15 BZ |
197 | dev = qdev_new(TYPE_PPC4xx_SDRAM_DDR); |
198 | object_property_set_link(OBJECT(dev), "dram", OBJECT(machine->ram), | |
199 | &error_abort); | |
200 | ppc4xx_dcr_realize(PPC4xx_DCR_DEVICE(dev), cpu, &error_fatal); | |
201 | object_unref(OBJECT(dev)); | |
34ba1dc8 | 202 | /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ |
4fc30e15 | 203 | sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(uicdev, 14)); |
68b9a2e3 | 204 | /* Enable SDRAM memory regions, this should be done by the firmware */ |
1e545fbc | 205 | ppc4xx_sdram_ddr_enable(PPC4xx_SDRAM_DDR(dev)); |
34ba1dc8 AG |
206 | |
207 | /* PCI */ | |
e75a951b | 208 | dev = sysbus_create_varargs(TYPE_PPC4xx_PCI_HOST, PPC440EP_PCI_CONFIG, |
0270d74e PM |
209 | qdev_get_gpio_in(uicdev, pci_irq_nrs[0]), |
210 | qdev_get_gpio_in(uicdev, pci_irq_nrs[1]), | |
211 | qdev_get_gpio_in(uicdev, pci_irq_nrs[2]), | |
212 | qdev_get_gpio_in(uicdev, pci_irq_nrs[3]), | |
34ba1dc8 AG |
213 | NULL); |
214 | pcibus = (PCIBus *)qdev_get_child_bus(dev, "pci.0"); | |
215 | if (!pcibus) { | |
6f76b817 | 216 | error_report("couldn't create PCI controller"); |
34ba1dc8 AG |
217 | exit(1); |
218 | } | |
219 | ||
68501502 PB |
220 | memory_region_init_alias(isa, NULL, "isa_mmio", |
221 | get_system_io(), 0, PPC440EP_PCI_IOLEN); | |
222 | memory_region_add_subregion(get_system_memory(), PPC440EP_PCI_IO, isa); | |
34ba1dc8 | 223 | |
9bca0edb | 224 | if (serial_hd(0) != NULL) { |
0270d74e PM |
225 | serial_mm_init(address_space_mem, 0xef600300, 0, |
226 | qdev_get_gpio_in(uicdev, 0), | |
9bca0edb | 227 | PPC_SERIAL_MM_BAUDBASE, serial_hd(0), |
34ba1dc8 AG |
228 | DEVICE_BIG_ENDIAN); |
229 | } | |
9bca0edb | 230 | if (serial_hd(1) != NULL) { |
0270d74e PM |
231 | serial_mm_init(address_space_mem, 0xef600400, 0, |
232 | qdev_get_gpio_in(uicdev, 1), | |
9bca0edb | 233 | PPC_SERIAL_MM_BAUDBASE, serial_hd(1), |
34ba1dc8 AG |
234 | DEVICE_BIG_ENDIAN); |
235 | } | |
2c9fade2 AJ |
236 | |
237 | if (pcibus) { | |
36b6968d DW |
238 | /* |
239 | * There are no PCI NICs on the Bamboo board, but there are | |
240 | * PCI slots, so we can pick whatever default model we want. | |
241 | */ | |
242 | pci_init_nic_devices(pcibus, mc->default_nic); | |
2c9fade2 AJ |
243 | } |
244 | ||
245 | /* Load kernel. */ | |
246 | if (kernel_filename) { | |
617160c9 | 247 | hwaddr loadaddr = LOAD_UIMAGE_LOADADDR_INVALID; |
25bda50a MF |
248 | success = load_uimage(kernel_filename, &entry, &loadaddr, NULL, |
249 | NULL, NULL); | |
ceee6da6 | 250 | if (success < 0) { |
617160c9 | 251 | uint64_t elf_entry; |
4366e1db | 252 | success = load_elf(kernel_filename, NULL, NULL, NULL, &elf_entry, |
617160c9 | 253 | NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); |
2c9fade2 | 254 | entry = elf_entry; |
2c9fade2 AJ |
255 | } |
256 | /* XXX try again as binary */ | |
ceee6da6 | 257 | if (success < 0) { |
6f76b817 | 258 | error_report("could not load kernel '%s'", kernel_filename); |
2c9fade2 AJ |
259 | exit(1); |
260 | } | |
261 | } | |
262 | ||
263 | /* Load initrd. */ | |
264 | if (initrd_filename) { | |
ceee6da6 | 265 | initrd_size = load_image_targphys(initrd_filename, RAMDISK_ADDR, |
a0258e4a | 266 | machine->ram_size - RAMDISK_ADDR); |
2c9fade2 AJ |
267 | |
268 | if (initrd_size < 0) { | |
6f76b817 AF |
269 | error_report("could not load ram disk '%s' at %x", |
270 | initrd_filename, RAMDISK_ADDR); | |
2c9fade2 AJ |
271 | exit(1); |
272 | } | |
273 | } | |
274 | ||
275 | /* If we're loading a kernel directly, we must load the device tree too. */ | |
276 | if (kernel_filename) { | |
8d42c851 DHB |
277 | if (bamboo_load_device_tree(machine, FDT_ADDR, |
278 | RAMDISK_ADDR, initrd_size) < 0) { | |
6f76b817 | 279 | error_report("couldn't load device tree"); |
2c9fade2 AJ |
280 | exit(1); |
281 | } | |
2c9fade2 | 282 | } |
2c9fade2 AJ |
283 | } |
284 | ||
e264d29d | 285 | static void bamboo_machine_init(MachineClass *mc) |
f80f9ec9 | 286 | { |
e264d29d EH |
287 | mc->desc = "bamboo"; |
288 | mc->init = bamboo_init; | |
376d7a2a | 289 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("440epb"); |
b28f0188 | 290 | mc->default_ram_id = "ppc4xx.sdram"; |
053b7086 | 291 | mc->default_nic = "e1000"; |
f80f9ec9 AL |
292 | } |
293 | ||
e264d29d | 294 | DEFINE_MACHINE("bamboo", bamboo_machine_init) |