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79623312 HP |
1 | /* |
2 | * QEMU RS/6000 memory controller | |
3 | * | |
4 | * Copyright (c) 2017 Hervé Poussineau | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 2 of the License, or | |
9 | * (at your option) version 3 or any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "qemu/osdep.h" | |
ab3dd749 | 21 | #include "qemu/units.h" |
79623312 | 22 | #include "hw/isa/isa.h" |
a27bd6c7 | 23 | #include "hw/qdev-properties.h" |
d6454270 | 24 | #include "migration/vmstate.h" |
79623312 HP |
25 | #include "exec/address-spaces.h" |
26 | #include "hw/boards.h" | |
27 | #include "qapi/error.h" | |
28 | #include "trace.h" | |
db1015e9 | 29 | #include "qom/object.h" |
79623312 HP |
30 | |
31 | #define TYPE_RS6000MC "rs6000-mc" | |
db1015e9 | 32 | typedef struct RS6000MCState RS6000MCState; |
79623312 HP |
33 | #define RS6000MC_DEVICE(obj) \ |
34 | OBJECT_CHECK(RS6000MCState, (obj), TYPE_RS6000MC) | |
35 | ||
db1015e9 | 36 | struct RS6000MCState { |
79623312 HP |
37 | ISADevice parent_obj; |
38 | /* see US patent 5,684,979 for details (expired 2001-11-04) */ | |
39 | uint32_t ram_size; | |
40 | bool autoconfigure; | |
41 | MemoryRegion simm[6]; | |
42 | unsigned int simm_size[6]; | |
43 | uint32_t end_address[8]; | |
44 | uint8_t port0820_index; | |
45 | PortioList portio; | |
db1015e9 | 46 | }; |
79623312 HP |
47 | |
48 | /* P0RT 0803 -- SIMM ID Register (32/8 MB) (Read Only) */ | |
49 | ||
50 | static uint32_t rs6000mc_port0803_read(void *opaque, uint32_t addr) | |
51 | { | |
52 | RS6000MCState *s = opaque; | |
53 | uint32_t val = 0; | |
54 | int socket; | |
55 | ||
56 | /* (1 << socket) indicates 32 MB SIMM at given socket */ | |
57 | for (socket = 0; socket < 6; socket++) { | |
58 | if (s->simm_size[socket] == 32) { | |
59 | val |= (1 << socket); | |
60 | } | |
61 | } | |
62 | ||
63 | trace_rs6000mc_id_read(addr, val); | |
64 | return val; | |
65 | } | |
66 | ||
67 | /* PORT 0804 -- SIMM Presence Register (Read Only) */ | |
68 | ||
69 | static uint32_t rs6000mc_port0804_read(void *opaque, uint32_t addr) | |
70 | { | |
71 | RS6000MCState *s = opaque; | |
72 | uint32_t val = 0xff; | |
73 | int socket; | |
74 | ||
75 | /* (1 << socket) indicates SIMM absence at given socket */ | |
76 | for (socket = 0; socket < 6; socket++) { | |
77 | if (s->simm_size[socket]) { | |
78 | val &= ~(1 << socket); | |
79 | } | |
80 | } | |
81 | s->port0820_index = 0; | |
82 | ||
83 | trace_rs6000mc_presence_read(addr, val); | |
84 | return val; | |
85 | } | |
86 | ||
87 | /* Memory Controller Size Programming Register */ | |
88 | ||
89 | static uint32_t rs6000mc_port0820_read(void *opaque, uint32_t addr) | |
90 | { | |
91 | RS6000MCState *s = opaque; | |
92 | uint32_t val = s->end_address[s->port0820_index] & 0x1f; | |
93 | s->port0820_index = (s->port0820_index + 1) & 7; | |
94 | trace_rs6000mc_size_read(addr, val); | |
95 | return val; | |
96 | } | |
97 | ||
98 | static void rs6000mc_port0820_write(void *opaque, uint32_t addr, uint32_t val) | |
99 | { | |
100 | RS6000MCState *s = opaque; | |
101 | uint8_t socket = val >> 5; | |
102 | uint32_t end_address = val & 0x1f; | |
103 | ||
104 | trace_rs6000mc_size_write(addr, val); | |
105 | s->end_address[socket] = end_address; | |
106 | if (socket > 0 && socket < 7) { | |
107 | if (s->simm_size[socket - 1]) { | |
108 | uint32_t size; | |
109 | uint32_t start_address = 0; | |
110 | if (socket > 1) { | |
111 | start_address = s->end_address[socket - 1]; | |
112 | } | |
113 | ||
114 | size = end_address - start_address; | |
115 | memory_region_set_enabled(&s->simm[socket - 1], size != 0); | |
116 | memory_region_set_address(&s->simm[socket - 1], | |
ab3dd749 | 117 | start_address * 8 * MiB); |
79623312 HP |
118 | } |
119 | } | |
120 | } | |
121 | ||
122 | /* Read Memory Parity Error */ | |
123 | ||
124 | enum { | |
125 | PORT0841_NO_ERROR_DETECTED = 0x01, | |
126 | }; | |
127 | ||
128 | static uint32_t rs6000mc_port0841_read(void *opaque, uint32_t addr) | |
129 | { | |
130 | uint32_t val = PORT0841_NO_ERROR_DETECTED; | |
131 | trace_rs6000mc_parity_read(addr, val); | |
132 | return val; | |
133 | } | |
134 | ||
135 | static const MemoryRegionPortio rs6000mc_port_list[] = { | |
136 | { 0x803, 1, 1, .read = rs6000mc_port0803_read }, | |
137 | { 0x804, 1, 1, .read = rs6000mc_port0804_read }, | |
138 | { 0x820, 1, 1, .read = rs6000mc_port0820_read, | |
139 | .write = rs6000mc_port0820_write, }, | |
140 | { 0x841, 1, 1, .read = rs6000mc_port0841_read }, | |
141 | PORTIO_END_OF_LIST() | |
142 | }; | |
143 | ||
144 | static void rs6000mc_realize(DeviceState *dev, Error **errp) | |
145 | { | |
146 | RS6000MCState *s = RS6000MC_DEVICE(dev); | |
147 | int socket = 0; | |
ab3dd749 | 148 | unsigned int ram_size = s->ram_size / MiB; |
2def24f1 | 149 | Error *local_err = NULL; |
79623312 HP |
150 | |
151 | while (socket < 6) { | |
152 | if (ram_size >= 64) { | |
153 | s->simm_size[socket] = 32; | |
154 | s->simm_size[socket + 1] = 32; | |
155 | ram_size -= 64; | |
156 | } else if (ram_size >= 16) { | |
157 | s->simm_size[socket] = 8; | |
158 | s->simm_size[socket + 1] = 8; | |
159 | ram_size -= 16; | |
160 | } else { | |
161 | /* Not enough memory */ | |
162 | break; | |
163 | } | |
164 | socket += 2; | |
165 | } | |
166 | ||
167 | for (socket = 0; socket < 6; socket++) { | |
168 | if (s->simm_size[socket]) { | |
169 | char name[] = "simm.?"; | |
170 | name[5] = socket + '0'; | |
2def24f1 IM |
171 | memory_region_init_ram(&s->simm[socket], OBJECT(dev), name, |
172 | s->simm_size[socket] * MiB, &local_err); | |
173 | if (local_err) { | |
dcfe4805 MA |
174 | error_propagate(errp, local_err); |
175 | return; | |
2def24f1 | 176 | } |
79623312 HP |
177 | memory_region_add_subregion_overlap(get_system_memory(), 0, |
178 | &s->simm[socket], socket); | |
179 | } | |
180 | } | |
181 | if (ram_size) { | |
182 | /* unable to push all requested RAM in SIMMs */ | |
dcfe4805 | 183 | error_setg(errp, "RAM size incompatible with this board. " |
ab3dd749 PMD |
184 | "Try again with something else, like %" PRId64 " MB", |
185 | s->ram_size / MiB - ram_size); | |
dcfe4805 | 186 | return; |
79623312 HP |
187 | } |
188 | ||
189 | if (s->autoconfigure) { | |
190 | uint32_t start_address = 0; | |
191 | for (socket = 0; socket < 6; socket++) { | |
192 | if (s->simm_size[socket]) { | |
193 | memory_region_set_enabled(&s->simm[socket], true); | |
194 | memory_region_set_address(&s->simm[socket], start_address); | |
195 | start_address += memory_region_size(&s->simm[socket]); | |
196 | } | |
197 | } | |
198 | } | |
199 | ||
200 | isa_register_portio_list(ISA_DEVICE(dev), &s->portio, 0x0, | |
201 | rs6000mc_port_list, s, "rs6000mc"); | |
202 | } | |
203 | ||
204 | static const VMStateDescription vmstate_rs6000mc = { | |
205 | .name = "rs6000-mc", | |
206 | .version_id = 1, | |
207 | .minimum_version_id = 1, | |
208 | .fields = (VMStateField[]) { | |
209 | VMSTATE_UINT8(port0820_index, RS6000MCState), | |
210 | VMSTATE_END_OF_LIST() | |
211 | }, | |
212 | }; | |
213 | ||
214 | static Property rs6000mc_properties[] = { | |
215 | DEFINE_PROP_UINT32("ram-size", RS6000MCState, ram_size, 0), | |
216 | DEFINE_PROP_BOOL("auto-configure", RS6000MCState, autoconfigure, true), | |
217 | DEFINE_PROP_END_OF_LIST() | |
218 | }; | |
219 | ||
220 | static void rs6000mc_class_initfn(ObjectClass *klass, void *data) | |
221 | { | |
222 | DeviceClass *dc = DEVICE_CLASS(klass); | |
223 | ||
224 | dc->realize = rs6000mc_realize; | |
225 | dc->vmsd = &vmstate_rs6000mc; | |
4f67d30b | 226 | device_class_set_props(dc, rs6000mc_properties); |
79623312 HP |
227 | } |
228 | ||
229 | static const TypeInfo rs6000mc_info = { | |
230 | .name = TYPE_RS6000MC, | |
231 | .parent = TYPE_ISA_DEVICE, | |
232 | .instance_size = sizeof(RS6000MCState), | |
233 | .class_init = rs6000mc_class_initfn, | |
234 | }; | |
235 | ||
236 | static void rs6000mc_types(void) | |
237 | { | |
238 | type_register_static(&rs6000mc_info); | |
239 | } | |
240 | ||
241 | type_init(rs6000mc_types) |