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33face6b
DG
1/*
2 * QEMU PowerPC pSeries Logical Partition capabilities handling
3 *
4 * Copyright (c) 2017 David Gibson, Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24#include "qemu/osdep.h"
be85537d 25#include "qemu/error-report.h"
33face6b
DG
26#include "qapi/error.h"
27#include "qapi/visitor.h"
ee76a09f 28#include "sysemu/hw_accel.h"
123eec65 29#include "exec/ram_addr.h"
ee76a09f 30#include "target/ppc/cpu.h"
2309832a 31#include "target/ppc/mmu-hash64.h"
ee76a09f
DG
32#include "cpu-models.h"
33#include "kvm_ppc.h"
006e9d36 34#include "sysemu/qtest.h"
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DG
35
36#include "hw/ppc/spapr.h"
37
ce2918cb 38typedef struct SpaprCapPossible {
87175d1b
SJS
39 int num; /* size of vals array below */
40 const char *help; /* help text for vals */
41 /*
42 * Note:
43 * - because of the way compatibility is determined vals MUST be ordered
44 * such that later options are a superset of all preceding options.
45 * - the order of vals must be preserved, that is their index is important,
46 * however vals may be added to the end of the list so long as the above
47 * point is observed
48 */
49 const char *vals[];
ce2918cb 50} SpaprCapPossible;
87175d1b 51
ce2918cb 52typedef struct SpaprCapabilityInfo {
33face6b
DG
53 const char *name;
54 const char *description;
4e5fe368 55 int index;
33face6b 56
4e5fe368
SJS
57 /* Getter and Setter Function Pointers */
58 ObjectPropertyAccessor *get;
59 ObjectPropertyAccessor *set;
60 const char *type;
87175d1b 61 /* Possible values if this is a custom string type */
ce2918cb 62 SpaprCapPossible *possible;
33face6b 63 /* Make sure the virtual hardware can support this capability */
ce2918cb
DG
64 void (*apply)(SpaprMachineState *spapr, uint8_t val, Error **errp);
65 void (*cpu_apply)(SpaprMachineState *spapr, PowerPCCPU *cpu,
e2e4f641 66 uint8_t val, Error **errp);
ce2918cb 67} SpaprCapabilityInfo;
33face6b 68
4e5fe368
SJS
69static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name,
70 void *opaque, Error **errp)
71{
ce2918cb
DG
72 SpaprCapabilityInfo *cap = opaque;
73 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
4e5fe368
SJS
74 bool value = spapr_get_cap(spapr, cap->index) == SPAPR_CAP_ON;
75
76 visit_type_bool(v, name, &value, errp);
77}
78
79static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name,
80 void *opaque, Error **errp)
ee76a09f 81{
ce2918cb
DG
82 SpaprCapabilityInfo *cap = opaque;
83 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
4e5fe368
SJS
84 bool value;
85 Error *local_err = NULL;
86
87 visit_type_bool(v, name, &value, &local_err);
88 if (local_err) {
89 error_propagate(errp, local_err);
90 return;
91 }
92
93 spapr->cmd_line_caps[cap->index] = true;
94 spapr->eff.caps[cap->index] = value ? SPAPR_CAP_ON : SPAPR_CAP_OFF;
95}
96
6898aed7 97
f27aa81e
SJS
98static void spapr_cap_get_string(Object *obj, Visitor *v, const char *name,
99 void *opaque, Error **errp)
87175d1b 100{
ce2918cb
DG
101 SpaprCapabilityInfo *cap = opaque;
102 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
87175d1b
SJS
103 char *val = NULL;
104 uint8_t value = spapr_get_cap(spapr, cap->index);
105
106 if (value >= cap->possible->num) {
107 error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name);
108 return;
109 }
110
111 val = g_strdup(cap->possible->vals[value]);
112
113 visit_type_str(v, name, &val, errp);
114 g_free(val);
115}
116
f27aa81e
SJS
117static void spapr_cap_set_string(Object *obj, Visitor *v, const char *name,
118 void *opaque, Error **errp)
87175d1b 119{
ce2918cb
DG
120 SpaprCapabilityInfo *cap = opaque;
121 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
87175d1b
SJS
122 Error *local_err = NULL;
123 uint8_t i;
124 char *val;
125
126 visit_type_str(v, name, &val, &local_err);
127 if (local_err) {
128 error_propagate(errp, local_err);
129 return;
130 }
131
132 if (!strcmp(val, "?")) {
133 error_setg(errp, "%s", cap->possible->help);
134 goto out;
135 }
136 for (i = 0; i < cap->possible->num; i++) {
137 if (!strcasecmp(val, cap->possible->vals[i])) {
138 spapr->cmd_line_caps[cap->index] = true;
139 spapr->eff.caps[cap->index] = i;
140 goto out;
141 }
142 }
143
144 error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val,
145 cap->name);
146out:
147 g_free(val);
148}
149
2309832a
DG
150static void spapr_cap_get_pagesize(Object *obj, Visitor *v, const char *name,
151 void *opaque, Error **errp)
152{
ce2918cb
DG
153 SpaprCapabilityInfo *cap = opaque;
154 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
2309832a
DG
155 uint8_t val = spapr_get_cap(spapr, cap->index);
156 uint64_t pagesize = (1ULL << val);
157
158 visit_type_size(v, name, &pagesize, errp);
159}
160
161static void spapr_cap_set_pagesize(Object *obj, Visitor *v, const char *name,
162 void *opaque, Error **errp)
163{
ce2918cb
DG
164 SpaprCapabilityInfo *cap = opaque;
165 SpaprMachineState *spapr = SPAPR_MACHINE(obj);
2309832a
DG
166 uint64_t pagesize;
167 uint8_t val;
168 Error *local_err = NULL;
169
170 visit_type_size(v, name, &pagesize, &local_err);
171 if (local_err) {
172 error_propagate(errp, local_err);
173 return;
174 }
175
176 if (!is_power_of_2(pagesize)) {
177 error_setg(errp, "cap-%s must be a power of 2", cap->name);
178 return;
179 }
180
181 val = ctz64(pagesize);
182 spapr->cmd_line_caps[cap->index] = true;
183 spapr->eff.caps[cap->index] = val;
184}
185
ce2918cb 186static void cap_htm_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
4e5fe368
SJS
187{
188 if (!val) {
189 /* TODO: We don't support disabling htm yet */
190 return;
191 }
ee76a09f
DG
192 if (tcg_enabled()) {
193 error_setg(errp,
194 "No Transactional Memory support in TCG, try cap-htm=off");
195 } else if (kvm_enabled() && !kvmppc_has_cap_htm()) {
196 error_setg(errp,
197"KVM implementation does not support Transactional Memory, try cap-htm=off"
198 );
199 }
200}
201
ce2918cb 202static void cap_vsx_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
29386642
DG
203{
204 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
205 CPUPPCState *env = &cpu->env;
206
4e5fe368
SJS
207 if (!val) {
208 /* TODO: We don't support disabling vsx yet */
209 return;
210 }
29386642
DG
211 /* Allowable CPUs in spapr_cpu_core.c should already have gotten
212 * rid of anything that doesn't do VMX */
213 g_assert(env->insns_flags & PPC_ALTIVEC);
214 if (!(env->insns_flags2 & PPC2_VSX)) {
215 error_setg(errp, "VSX support not available, try cap-vsx=off");
216 }
217}
218
ce2918cb 219static void cap_dfp_apply(SpaprMachineState *spapr, uint8_t val, Error **errp)
2d1fb9bc
DG
220{
221 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
222 CPUPPCState *env = &cpu->env;
223
4e5fe368
SJS
224 if (!val) {
225 /* TODO: We don't support disabling dfp yet */
226 return;
227 }
2d1fb9bc
DG
228 if (!(env->insns_flags2 & PPC2_DFP)) {
229 error_setg(errp, "DFP support not available, try cap-dfp=off");
230 }
231}
232
ce2918cb 233SpaprCapPossible cap_cfpc_possible = {
f27aa81e
SJS
234 .num = 3,
235 .vals = {"broken", "workaround", "fixed"},
236 .help = "broken - no protection, workaround - workaround available,"
237 " fixed - fixed in hardware",
238};
239
ce2918cb 240static void cap_safe_cache_apply(SpaprMachineState *spapr, uint8_t val,
8f38eaf8
SJS
241 Error **errp)
242{
006e9d36 243 Error *local_err = NULL;
f27aa81e
SJS
244 uint8_t kvm_val = kvmppc_get_cap_safe_cache();
245
8f38eaf8 246 if (tcg_enabled() && val) {
006e9d36
SJS
247 /* TCG only supports broken, allow other values and print a warning */
248 error_setg(&local_err,
249 "TCG doesn't support requested feature, cap-cfpc=%s",
250 cap_cfpc_possible.vals[val]);
f27aa81e
SJS
251 } else if (kvm_enabled() && (val > kvm_val)) {
252 error_setg(errp,
253"Requested safe cache capability level not supported by kvm, try cap-cfpc=%s",
254 cap_cfpc_possible.vals[kvm_val]);
8f38eaf8 255 }
006e9d36
SJS
256
257 if (local_err != NULL)
258 warn_report_err(local_err);
8f38eaf8
SJS
259}
260
ce2918cb 261SpaprCapPossible cap_sbbc_possible = {
aaf265ff
SJS
262 .num = 3,
263 .vals = {"broken", "workaround", "fixed"},
264 .help = "broken - no protection, workaround - workaround available,"
265 " fixed - fixed in hardware",
266};
267
ce2918cb 268static void cap_safe_bounds_check_apply(SpaprMachineState *spapr, uint8_t val,
09114fd8
SJS
269 Error **errp)
270{
006e9d36 271 Error *local_err = NULL;
aaf265ff
SJS
272 uint8_t kvm_val = kvmppc_get_cap_safe_bounds_check();
273
09114fd8 274 if (tcg_enabled() && val) {
006e9d36
SJS
275 /* TCG only supports broken, allow other values and print a warning */
276 error_setg(&local_err,
277 "TCG doesn't support requested feature, cap-sbbc=%s",
278 cap_sbbc_possible.vals[val]);
aaf265ff
SJS
279 } else if (kvm_enabled() && (val > kvm_val)) {
280 error_setg(errp,
281"Requested safe bounds check capability level not supported by kvm, try cap-sbbc=%s",
282 cap_sbbc_possible.vals[kvm_val]);
09114fd8 283 }
006e9d36
SJS
284
285 if (local_err != NULL)
286 warn_report_err(local_err);
09114fd8
SJS
287}
288
ce2918cb 289SpaprCapPossible cap_ibs_possible = {
399b2896 290 .num = 5,
c76c0d30 291 /* Note workaround only maintained for compatibility */
399b2896
SJS
292 .vals = {"broken", "workaround", "fixed-ibs", "fixed-ccd", "fixed-na"},
293 .help = "broken - no protection, workaround - count cache flush"
294 ", fixed-ibs - indirect branch serialisation,"
295 " fixed-ccd - cache count disabled,"
296 " fixed-na - fixed in hardware (no longer applicable)",
c76c0d30
SJS
297};
298
ce2918cb 299static void cap_safe_indirect_branch_apply(SpaprMachineState *spapr,
4be8d4e7
SJS
300 uint8_t val, Error **errp)
301{
006e9d36 302 Error *local_err = NULL;
c76c0d30
SJS
303 uint8_t kvm_val = kvmppc_get_cap_safe_indirect_branch();
304
399b2896 305 if (tcg_enabled() && val) {
006e9d36
SJS
306 /* TCG only supports broken, allow other values and print a warning */
307 error_setg(&local_err,
308 "TCG doesn't support requested feature, cap-ibs=%s",
309 cap_ibs_possible.vals[val]);
399b2896 310 } else if (kvm_enabled() && (val > kvm_val)) {
c76c0d30
SJS
311 error_setg(errp,
312"Requested safe indirect branch capability level not supported by kvm, try cap-ibs=%s",
313 cap_ibs_possible.vals[kvm_val]);
4be8d4e7 314 }
006e9d36
SJS
315
316 if (local_err != NULL) {
317 warn_report_err(local_err);
318 }
4be8d4e7
SJS
319}
320
8f38eaf8 321#define VALUE_DESC_TRISTATE " (broken, workaround, fixed)"
4e5fe368 322
ce2918cb 323void spapr_check_pagesize(SpaprMachineState *spapr, hwaddr pagesize,
123eec65
DG
324 Error **errp)
325{
326 hwaddr maxpagesize = (1ULL << spapr->eff.caps[SPAPR_CAP_HPT_MAXPAGESIZE]);
327
328 if (!kvmppc_hpt_needs_host_contiguous_pages()) {
329 return;
330 }
331
332 if (maxpagesize > pagesize) {
333 error_setg(errp,
334 "Can't support %"HWADDR_PRIu" kiB guest pages with %"
335 HWADDR_PRIu" kiB host pages with this KVM implementation",
336 maxpagesize >> 10, pagesize >> 10);
337 }
338}
339
ce2918cb 340static void cap_hpt_maxpagesize_apply(SpaprMachineState *spapr,
2309832a
DG
341 uint8_t val, Error **errp)
342{
343 if (val < 12) {
344 error_setg(errp, "Require at least 4kiB hpt-max-page-size");
123eec65 345 return;
2309832a
DG
346 } else if (val < 16) {
347 warn_report("Many guests require at least 64kiB hpt-max-page-size");
348 }
123eec65
DG
349
350 spapr_check_pagesize(spapr, qemu_getrampagesize(), errp);
2309832a
DG
351}
352
9dceda5f
DG
353static bool spapr_pagesize_cb(void *opaque, uint32_t seg_pshift,
354 uint32_t pshift)
355{
356 unsigned maxshift = *((unsigned *)opaque);
357
358 assert(pshift >= seg_pshift);
359
360 /* Don't allow the guest to use pages bigger than the configured
361 * maximum size */
362 if (pshift > maxshift) {
363 return false;
364 }
365
366 /* For whatever reason, KVM doesn't allow multiple pagesizes
367 * within a segment, *except* for the case of 16M pages in a 4k or
368 * 64k segment. Always exclude other cases, so that TCG and KVM
369 * guests see a consistent environment */
370 if ((pshift != seg_pshift) && (pshift != 24)) {
371 return false;
372 }
373
374 return true;
375}
376
ce2918cb 377static void cap_hpt_maxpagesize_cpu_apply(SpaprMachineState *spapr,
9dceda5f
DG
378 PowerPCCPU *cpu,
379 uint8_t val, Error **errp)
380{
381 unsigned maxshift = val;
382
383 ppc_hash64_filter_pagesizes(cpu, spapr_pagesize_cb, &maxshift);
384}
385
ce2918cb 386static void cap_nested_kvm_hv_apply(SpaprMachineState *spapr,
b9a477b7
SJS
387 uint8_t val, Error **errp)
388{
389 if (!val) {
390 /* capability disabled by default */
391 return;
392 }
393
394 if (tcg_enabled()) {
395 error_setg(errp,
396 "No Nested KVM-HV support in tcg, try cap-nested-hv=off");
397 } else if (kvm_enabled()) {
398 if (!kvmppc_has_cap_nested_kvm_hv()) {
399 error_setg(errp,
400"KVM implementation does not support Nested KVM-HV, try cap-nested-hv=off");
401 } else if (kvmppc_set_cap_nested_kvm_hv(val) < 0) {
402 error_setg(errp,
403"Error enabling cap-nested-hv with KVM, try cap-nested-hv=off");
404 }
405 }
406}
407
ce2918cb 408static void cap_large_decr_apply(SpaprMachineState *spapr,
c982f5cf
SJS
409 uint8_t val, Error **errp)
410{
a8dafa52 411 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
7d050527 412 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
a8dafa52
SJS
413
414 if (!val) {
415 return; /* Disabled by default */
416 }
417
418 if (tcg_enabled()) {
419 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_3_00, 0,
420 spapr->max_compat_pvr)) {
421 error_setg(errp,
422 "Large decrementer only supported on POWER9, try -cpu POWER9");
423 return;
424 }
7d050527
SJS
425 } else if (kvm_enabled()) {
426 int kvm_nr_bits = kvmppc_get_cap_large_decr();
427
428 if (!kvm_nr_bits) {
429 error_setg(errp,
430 "No large decrementer support, try cap-large-decr=off");
431 } else if (pcc->lrg_decr_bits != kvm_nr_bits) {
432 error_setg(errp,
433"KVM large decrementer size (%d) differs to model (%d), try -cap-large-decr=off",
434 kvm_nr_bits, pcc->lrg_decr_bits);
435 }
a8dafa52
SJS
436 }
437}
438
ce2918cb 439static void cap_large_decr_cpu_apply(SpaprMachineState *spapr,
a8dafa52
SJS
440 PowerPCCPU *cpu,
441 uint8_t val, Error **errp)
442{
443 CPUPPCState *env = &cpu->env;
444 target_ulong lpcr = env->spr[SPR_LPCR];
445
7d050527
SJS
446 if (kvm_enabled()) {
447 if (kvmppc_enable_cap_large_decr(cpu, val)) {
448 error_setg(errp,
449 "No large decrementer support, try cap-large-decr=off");
450 }
451 }
452
a8dafa52
SJS
453 if (val) {
454 lpcr |= LPCR_LD;
455 } else {
456 lpcr &= ~LPCR_LD;
457 }
458 ppc_store_lpcr(cpu, lpcr);
c982f5cf
SJS
459}
460
ce2918cb 461static void cap_ccf_assist_apply(SpaprMachineState *spapr, uint8_t val,
8ff43ee4
SJS
462 Error **errp)
463{
464 uint8_t kvm_val = kvmppc_get_cap_count_cache_flush_assist();
465
466 if (tcg_enabled() && val) {
467 /* TODO - for now only allow broken for TCG */
468 error_setg(errp,
469"Requested count cache flush assist capability level not supported by tcg, try cap-ccf-assist=off");
470 } else if (kvm_enabled() && (val > kvm_val)) {
471 error_setg(errp,
472"Requested count cache flush assist capability level not supported by kvm, try cap-ccf-assist=off");
473 }
474}
475
ce2918cb 476SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
4e5fe368 477 [SPAPR_CAP_HTM] = {
ee76a09f
DG
478 .name = "htm",
479 .description = "Allow Hardware Transactional Memory (HTM)",
4e5fe368
SJS
480 .index = SPAPR_CAP_HTM,
481 .get = spapr_cap_get_bool,
482 .set = spapr_cap_set_bool,
483 .type = "bool",
484 .apply = cap_htm_apply,
ee76a09f 485 },
4e5fe368 486 [SPAPR_CAP_VSX] = {
29386642
DG
487 .name = "vsx",
488 .description = "Allow Vector Scalar Extensions (VSX)",
4e5fe368
SJS
489 .index = SPAPR_CAP_VSX,
490 .get = spapr_cap_get_bool,
491 .set = spapr_cap_set_bool,
492 .type = "bool",
493 .apply = cap_vsx_apply,
29386642 494 },
4e5fe368 495 [SPAPR_CAP_DFP] = {
2d1fb9bc
DG
496 .name = "dfp",
497 .description = "Allow Decimal Floating Point (DFP)",
4e5fe368
SJS
498 .index = SPAPR_CAP_DFP,
499 .get = spapr_cap_get_bool,
500 .set = spapr_cap_set_bool,
501 .type = "bool",
502 .apply = cap_dfp_apply,
2d1fb9bc 503 },
8f38eaf8
SJS
504 [SPAPR_CAP_CFPC] = {
505 .name = "cfpc",
506 .description = "Cache Flush on Privilege Change" VALUE_DESC_TRISTATE,
507 .index = SPAPR_CAP_CFPC,
f27aa81e
SJS
508 .get = spapr_cap_get_string,
509 .set = spapr_cap_set_string,
8f38eaf8 510 .type = "string",
f27aa81e 511 .possible = &cap_cfpc_possible,
8f38eaf8
SJS
512 .apply = cap_safe_cache_apply,
513 },
09114fd8
SJS
514 [SPAPR_CAP_SBBC] = {
515 .name = "sbbc",
516 .description = "Speculation Barrier Bounds Checking" VALUE_DESC_TRISTATE,
517 .index = SPAPR_CAP_SBBC,
aaf265ff
SJS
518 .get = spapr_cap_get_string,
519 .set = spapr_cap_set_string,
09114fd8 520 .type = "string",
aaf265ff 521 .possible = &cap_sbbc_possible,
09114fd8
SJS
522 .apply = cap_safe_bounds_check_apply,
523 },
4be8d4e7
SJS
524 [SPAPR_CAP_IBS] = {
525 .name = "ibs",
c76c0d30 526 .description =
399b2896
SJS
527 "Indirect Branch Speculation (broken, workaround, fixed-ibs,"
528 "fixed-ccd, fixed-na)",
4be8d4e7 529 .index = SPAPR_CAP_IBS,
c76c0d30
SJS
530 .get = spapr_cap_get_string,
531 .set = spapr_cap_set_string,
4be8d4e7 532 .type = "string",
c76c0d30 533 .possible = &cap_ibs_possible,
4be8d4e7
SJS
534 .apply = cap_safe_indirect_branch_apply,
535 },
2309832a
DG
536 [SPAPR_CAP_HPT_MAXPAGESIZE] = {
537 .name = "hpt-max-page-size",
538 .description = "Maximum page size for Hash Page Table guests",
539 .index = SPAPR_CAP_HPT_MAXPAGESIZE,
540 .get = spapr_cap_get_pagesize,
541 .set = spapr_cap_set_pagesize,
542 .type = "int",
543 .apply = cap_hpt_maxpagesize_apply,
9dceda5f 544 .cpu_apply = cap_hpt_maxpagesize_cpu_apply,
2309832a 545 },
b9a477b7
SJS
546 [SPAPR_CAP_NESTED_KVM_HV] = {
547 .name = "nested-hv",
548 .description = "Allow Nested KVM-HV",
549 .index = SPAPR_CAP_NESTED_KVM_HV,
550 .get = spapr_cap_get_bool,
551 .set = spapr_cap_set_bool,
552 .type = "bool",
553 .apply = cap_nested_kvm_hv_apply,
554 },
c982f5cf
SJS
555 [SPAPR_CAP_LARGE_DECREMENTER] = {
556 .name = "large-decr",
557 .description = "Allow Large Decrementer",
558 .index = SPAPR_CAP_LARGE_DECREMENTER,
559 .get = spapr_cap_get_bool,
560 .set = spapr_cap_set_bool,
561 .type = "bool",
562 .apply = cap_large_decr_apply,
a8dafa52 563 .cpu_apply = cap_large_decr_cpu_apply,
c982f5cf 564 },
8ff43ee4
SJS
565 [SPAPR_CAP_CCF_ASSIST] = {
566 .name = "ccf-assist",
567 .description = "Count Cache Flush Assist via HW Instruction",
568 .index = SPAPR_CAP_CCF_ASSIST,
569 .get = spapr_cap_get_bool,
570 .set = spapr_cap_set_bool,
571 .type = "bool",
572 .apply = cap_ccf_assist_apply,
573 },
33face6b
DG
574};
575
ce2918cb 576static SpaprCapabilities default_caps_with_cpu(SpaprMachineState *spapr,
ad99d04c 577 const char *cputype)
33face6b 578{
ce2918cb
DG
579 SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
580 SpaprCapabilities caps;
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DG
581
582 caps = smc->default_caps;
583
edaa7995
SJS
584 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_3_00,
585 0, spapr->max_compat_pvr)) {
586 caps.caps[SPAPR_CAP_LARGE_DECREMENTER] = SPAPR_CAP_OFF;
587 }
588
ad99d04c
DG
589 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_07,
590 0, spapr->max_compat_pvr)) {
4e5fe368 591 caps.caps[SPAPR_CAP_HTM] = SPAPR_CAP_OFF;
b2540203 592 caps.caps[SPAPR_CAP_CFPC] = SPAPR_CAP_BROKEN;
ee76a09f 593 }
33face6b 594
ad99d04c
DG
595 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06_PLUS,
596 0, spapr->max_compat_pvr)) {
813f3cf6
SJS
597 caps.caps[SPAPR_CAP_SBBC] = SPAPR_CAP_BROKEN;
598 }
599
ad99d04c
DG
600 if (!ppc_type_check_compat(cputype, CPU_POWERPC_LOGICAL_2_06,
601 0, spapr->max_compat_pvr)) {
4e5fe368
SJS
602 caps.caps[SPAPR_CAP_VSX] = SPAPR_CAP_OFF;
603 caps.caps[SPAPR_CAP_DFP] = SPAPR_CAP_OFF;
813f3cf6 604 caps.caps[SPAPR_CAP_IBS] = SPAPR_CAP_BROKEN;
29386642
DG
605 }
606
e8937295
GK
607 /* This is for pseries-2.12 and older */
608 if (smc->default_caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] == 0) {
609 uint8_t mps;
610
611 if (kvmppc_hpt_needs_host_contiguous_pages()) {
612 mps = ctz64(qemu_getrampagesize());
613 } else {
614 mps = 34; /* allow everything up to 16GiB, i.e. everything */
615 }
616
617 caps.caps[SPAPR_CAP_HPT_MAXPAGESIZE] = mps;
618 }
619
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DG
620 return caps;
621}
622
4e5fe368 623int spapr_caps_pre_load(void *opaque)
be85537d 624{
ce2918cb 625 SpaprMachineState *spapr = opaque;
be85537d 626
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SJS
627 /* Set to default so we can tell if this came in with the migration */
628 spapr->mig = spapr->def;
629 return 0;
630}
631
632int spapr_caps_pre_save(void *opaque)
633{
ce2918cb 634 SpaprMachineState *spapr = opaque;
4e5fe368
SJS
635
636 spapr->mig = spapr->eff;
637 return 0;
be85537d
DG
638}
639
640/* This has to be called from the top-level spapr post_load, not the
641 * caps specific one. Otherwise it wouldn't be called when the source
642 * caps are all defaults, which could still conflict with overridden
643 * caps on the destination */
ce2918cb 644int spapr_caps_post_migration(SpaprMachineState *spapr)
be85537d 645{
be85537d
DG
646 int i;
647 bool ok = true;
ce2918cb
DG
648 SpaprCapabilities dstcaps = spapr->eff;
649 SpaprCapabilities srccaps;
be85537d 650
ad99d04c 651 srccaps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
4e5fe368
SJS
652 for (i = 0; i < SPAPR_CAP_NUM; i++) {
653 /* If not default value then assume came in with the migration */
654 if (spapr->mig.caps[i] != spapr->def.caps[i]) {
655 srccaps.caps[i] = spapr->mig.caps[i];
656 }
657 }
be85537d 658
4e5fe368 659 for (i = 0; i < SPAPR_CAP_NUM; i++) {
ce2918cb 660 SpaprCapabilityInfo *info = &capability_table[i];
be85537d 661
4e5fe368
SJS
662 if (srccaps.caps[i] > dstcaps.caps[i]) {
663 error_report("cap-%s higher level (%d) in incoming stream than on destination (%d)",
664 info->name, srccaps.caps[i], dstcaps.caps[i]);
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DG
665 ok = false;
666 }
667
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SJS
668 if (srccaps.caps[i] < dstcaps.caps[i]) {
669 warn_report("cap-%s lower level (%d) in incoming stream than on destination (%d)",
670 info->name, srccaps.caps[i], dstcaps.caps[i]);
be85537d
DG
671 }
672 }
673
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DG
674 return ok ? 0 : -EINVAL;
675}
676
1f63ebaa 677/* Used to generate the migration field and needed function for a spapr cap */
8c5909c4
SJS
678#define SPAPR_CAP_MIG_STATE(sname, cap) \
679static bool spapr_cap_##sname##_needed(void *opaque) \
1f63ebaa 680{ \
ce2918cb 681 SpaprMachineState *spapr = opaque; \
1f63ebaa 682 \
8c5909c4
SJS
683 return spapr->cmd_line_caps[cap] && \
684 (spapr->eff.caps[cap] != \
685 spapr->def.caps[cap]); \
1f63ebaa
SJS
686} \
687 \
8c5909c4
SJS
688const VMStateDescription vmstate_spapr_cap_##sname = { \
689 .name = "spapr/cap/" #sname, \
1f63ebaa
SJS
690 .version_id = 1, \
691 .minimum_version_id = 1, \
8c5909c4 692 .needed = spapr_cap_##sname##_needed, \
1f63ebaa 693 .fields = (VMStateField[]) { \
8c5909c4 694 VMSTATE_UINT8(mig.caps[cap], \
ce2918cb 695 SpaprMachineState), \
1f63ebaa
SJS
696 VMSTATE_END_OF_LIST() \
697 }, \
be85537d
DG
698}
699
8c5909c4
SJS
700SPAPR_CAP_MIG_STATE(htm, SPAPR_CAP_HTM);
701SPAPR_CAP_MIG_STATE(vsx, SPAPR_CAP_VSX);
702SPAPR_CAP_MIG_STATE(dfp, SPAPR_CAP_DFP);
703SPAPR_CAP_MIG_STATE(cfpc, SPAPR_CAP_CFPC);
704SPAPR_CAP_MIG_STATE(sbbc, SPAPR_CAP_SBBC);
705SPAPR_CAP_MIG_STATE(ibs, SPAPR_CAP_IBS);
b9a477b7 706SPAPR_CAP_MIG_STATE(nested_kvm_hv, SPAPR_CAP_NESTED_KVM_HV);
c982f5cf 707SPAPR_CAP_MIG_STATE(large_decr, SPAPR_CAP_LARGE_DECREMENTER);
8ff43ee4 708SPAPR_CAP_MIG_STATE(ccf_assist, SPAPR_CAP_CCF_ASSIST);
33face6b 709
ce2918cb 710void spapr_caps_init(SpaprMachineState *spapr)
33face6b 711{
ce2918cb 712 SpaprCapabilities default_caps;
33face6b
DG
713 int i;
714
9f6edd06 715 /* Compute the actual set of caps we should run with */
ad99d04c 716 default_caps = default_caps_with_cpu(spapr, MACHINE(spapr)->cpu_type);
4e5fe368
SJS
717
718 for (i = 0; i < SPAPR_CAP_NUM; i++) {
719 /* Store the defaults */
720 spapr->def.caps[i] = default_caps.caps[i];
721 /* If not set on the command line then apply the default value */
722 if (!spapr->cmd_line_caps[i]) {
723 spapr->eff.caps[i] = default_caps.caps[i];
724 }
33face6b 725 }
9f6edd06 726}
33face6b 727
ce2918cb 728void spapr_caps_apply(SpaprMachineState *spapr)
9f6edd06
DG
729{
730 int i;
4e5fe368
SJS
731
732 for (i = 0; i < SPAPR_CAP_NUM; i++) {
ce2918cb 733 SpaprCapabilityInfo *info = &capability_table[i];
33face6b 734
4e5fe368
SJS
735 /*
736 * If the apply function can't set the desired level and thinks it's
737 * fatal, it should cause that.
738 */
739 info->apply(spapr, spapr->eff.caps[i], &error_fatal);
33face6b 740 }
33face6b
DG
741}
742
ce2918cb 743void spapr_caps_cpu_apply(SpaprMachineState *spapr, PowerPCCPU *cpu)
e2e4f641
DG
744{
745 int i;
746
747 for (i = 0; i < SPAPR_CAP_NUM; i++) {
ce2918cb 748 SpaprCapabilityInfo *info = &capability_table[i];
e2e4f641
DG
749
750 /*
751 * If the apply function can't set the desired level and thinks it's
752 * fatal, it should cause that.
753 */
754 if (info->cpu_apply) {
755 info->cpu_apply(spapr, cpu, spapr->eff.caps[i], &error_fatal);
756 }
757 }
758}
759
ce2918cb 760void spapr_caps_add_properties(SpaprMachineClass *smc, Error **errp)
33face6b
DG
761{
762 Error *local_err = NULL;
763 ObjectClass *klass = OBJECT_CLASS(smc);
764 int i;
765
766 for (i = 0; i < ARRAY_SIZE(capability_table); i++) {
ce2918cb 767 SpaprCapabilityInfo *cap = &capability_table[i];
33face6b 768 const char *name = g_strdup_printf("cap-%s", cap->name);
4e5fe368 769 char *desc;
33face6b 770
4e5fe368
SJS
771 object_class_property_add(klass, name, cap->type,
772 cap->get, cap->set,
773 NULL, cap, &local_err);
33face6b
DG
774 if (local_err) {
775 error_propagate(errp, local_err);
776 return;
777 }
778
895d5cd6 779 desc = g_strdup_printf("%s", cap->description);
4e5fe368
SJS
780 object_class_property_set_description(klass, name, desc, &local_err);
781 g_free(desc);
33face6b
DG
782 if (local_err) {
783 error_propagate(errp, local_err);
784 return;
785 }
786 }
787}