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Commit | Line | Data |
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bbf5c878 MR |
1 | /* |
2 | * QEMU SPAPR Dynamic Reconfiguration Connector Implementation | |
3 | * | |
4 | * Copyright IBM Corp. 2014 | |
5 | * | |
6 | * Authors: | |
7 | * Michael Roth <mdroth@linux.vnet.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
0d75590d | 13 | #include "qemu/osdep.h" |
da34e65c | 14 | #include "qapi/error.h" |
15280c36 | 15 | #include "qapi/qmp/qnull.h" |
4771d756 | 16 | #include "cpu.h" |
f348b6d1 | 17 | #include "qemu/cutils.h" |
bbf5c878 MR |
18 | #include "hw/ppc/spapr_drc.h" |
19 | #include "qom/object.h" | |
d6454270 | 20 | #include "migration/vmstate.h" |
bbf5c878 MR |
21 | #include "qapi/visitor.h" |
22 | #include "qemu/error-report.h" | |
0cb688d2 | 23 | #include "hw/ppc/spapr.h" /* for RTAS return codes */ |
31834723 | 24 | #include "hw/pci-host/spapr.h" /* spapr_phb_remove_pci_device_cb callback */ |
ee3a71e3 | 25 | #include "hw/ppc/spapr_nvdimm.h" |
d9c95c71 | 26 | #include "sysemu/device_tree.h" |
71e8a915 | 27 | #include "sysemu/reset.h" |
24ac7755 | 28 | #include "trace.h" |
bbf5c878 MR |
29 | |
30 | #define DRC_CONTAINER_PATH "/dr-connector" | |
31 | #define DRC_INDEX_TYPE_SHIFT 28 | |
627c2ef7 | 32 | #define DRC_INDEX_ID_MASK ((1ULL << DRC_INDEX_TYPE_SHIFT) - 1) |
bbf5c878 | 33 | |
ce2918cb | 34 | SpaprDrcType spapr_drc_type(SpaprDrc *drc) |
2d335818 | 35 | { |
ce2918cb | 36 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
2d335818 DG |
37 | |
38 | return 1 << drck->typeshift; | |
39 | } | |
40 | ||
ce2918cb | 41 | uint32_t spapr_drc_index(SpaprDrc *drc) |
bbf5c878 | 42 | { |
ce2918cb | 43 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
2d335818 | 44 | |
bbf5c878 MR |
45 | /* no set format for a drc index: it only needs to be globally |
46 | * unique. this is how we encode the DRC type on bare-metal | |
47 | * however, so might as well do that here | |
48 | */ | |
2d335818 DG |
49 | return (drck->typeshift << DRC_INDEX_TYPE_SHIFT) |
50 | | (drc->id & DRC_INDEX_ID_MASK); | |
bbf5c878 MR |
51 | } |
52 | ||
ce2918cb | 53 | static uint32_t drc_isolate_physical(SpaprDrc *drc) |
bbf5c878 | 54 | { |
9d4c0f4f DG |
55 | switch (drc->state) { |
56 | case SPAPR_DRC_STATE_PHYSICAL_POWERON: | |
57 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
58 | case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED: | |
59 | break; /* see below */ | |
60 | case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE: | |
61 | return RTAS_OUT_PARAM_ERROR; /* not allowed */ | |
62 | default: | |
63 | g_assert_not_reached(); | |
64 | } | |
65 | ||
9d4c0f4f | 66 | drc->state = SPAPR_DRC_STATE_PHYSICAL_POWERON; |
0dfabd39 | 67 | |
f1c52354 | 68 | if (drc->unplug_requested) { |
0dfabd39 | 69 | uint32_t drc_index = spapr_drc_index(drc); |
9d4c0f4f DG |
70 | trace_spapr_drc_set_isolation_state_finalizing(drc_index); |
71 | spapr_drc_detach(drc); | |
9d1852ce | 72 | } |
0dfabd39 DG |
73 | |
74 | return RTAS_OUT_SUCCESS; | |
75 | } | |
76 | ||
ce2918cb | 77 | static uint32_t drc_unisolate_physical(SpaprDrc *drc) |
0dfabd39 | 78 | { |
9d4c0f4f DG |
79 | switch (drc->state) { |
80 | case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE: | |
81 | case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED: | |
82 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
83 | case SPAPR_DRC_STATE_PHYSICAL_POWERON: | |
84 | break; /* see below */ | |
85 | default: | |
86 | g_assert_not_reached(); | |
87 | } | |
88 | ||
0dfabd39 DG |
89 | /* cannot unisolate a non-existent resource, and, or resources |
90 | * which are in an 'UNUSABLE' allocation state. (PAPR 2.7, | |
91 | * 13.5.3.5) | |
92 | */ | |
93 | if (!drc->dev) { | |
94 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
95 | } | |
96 | ||
9d4c0f4f | 97 | drc->state = SPAPR_DRC_STATE_PHYSICAL_UNISOLATE; |
4445b1d2 DG |
98 | drc->ccs_offset = drc->fdt_start_offset; |
99 | drc->ccs_depth = 0; | |
0dfabd39 DG |
100 | |
101 | return RTAS_OUT_SUCCESS; | |
102 | } | |
103 | ||
ce2918cb | 104 | static uint32_t drc_isolate_logical(SpaprDrc *drc) |
0dfabd39 | 105 | { |
9d4c0f4f DG |
106 | switch (drc->state) { |
107 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
108 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
109 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
110 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
111 | break; /* see below */ | |
112 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
113 | return RTAS_OUT_PARAM_ERROR; /* not allowed */ | |
114 | default: | |
115 | g_assert_not_reached(); | |
116 | } | |
117 | ||
cf632463 BR |
118 | /* |
119 | * Fail any requests to ISOLATE the LMB DRC if this LMB doesn't | |
120 | * belong to a DIMM device that is marked for removal. | |
121 | * | |
122 | * Currently the guest userspace tool drmgr that drives the memory | |
123 | * hotplug/unplug will just try to remove a set of 'removable' LMBs | |
124 | * in response to a hot unplug request that is based on drc-count. | |
125 | * If the LMB being removed doesn't belong to a DIMM device that is | |
126 | * actually being unplugged, fail the isolation request here. | |
127 | */ | |
0dfabd39 | 128 | if (spapr_drc_type(drc) == SPAPR_DR_CONNECTOR_TYPE_LMB |
f1c52354 | 129 | && !drc->unplug_requested) { |
0dfabd39 | 130 | return RTAS_OUT_HW_ERROR; |
cf632463 BR |
131 | } |
132 | ||
9d4c0f4f | 133 | drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE; |
bbf5c878 | 134 | |
0dfabd39 DG |
135 | /* if we're awaiting release, but still in an unconfigured state, |
136 | * it's likely the guest is still in the process of configuring | |
137 | * the device and is transitioning the devices to an ISOLATED | |
138 | * state as a part of that process. so we only complete the | |
139 | * removal when this transition happens for a device in a | |
140 | * configured state, as suggested by the state diagram from PAPR+ | |
141 | * 2.7, 13.4 | |
142 | */ | |
f1c52354 | 143 | if (drc->unplug_requested) { |
0dfabd39 | 144 | uint32_t drc_index = spapr_drc_index(drc); |
9d4c0f4f DG |
145 | trace_spapr_drc_set_isolation_state_finalizing(drc_index); |
146 | spapr_drc_detach(drc); | |
bbf5c878 | 147 | } |
0dfabd39 DG |
148 | return RTAS_OUT_SUCCESS; |
149 | } | |
150 | ||
ce2918cb | 151 | static uint32_t drc_unisolate_logical(SpaprDrc *drc) |
0dfabd39 | 152 | { |
9d4c0f4f DG |
153 | switch (drc->state) { |
154 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
155 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
156 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
157 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
158 | break; /* see below */ | |
159 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
160 | return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */ | |
161 | default: | |
162 | g_assert_not_reached(); | |
0dfabd39 DG |
163 | } |
164 | ||
9d4c0f4f DG |
165 | /* Move to AVAILABLE state should have ensured device was present */ |
166 | g_assert(drc->dev); | |
bbf5c878 | 167 | |
9d4c0f4f | 168 | drc->state = SPAPR_DRC_STATE_LOGICAL_UNISOLATE; |
4445b1d2 DG |
169 | drc->ccs_offset = drc->fdt_start_offset; |
170 | drc->ccs_depth = 0; | |
171 | ||
0cb688d2 | 172 | return RTAS_OUT_SUCCESS; |
bbf5c878 MR |
173 | } |
174 | ||
ce2918cb | 175 | static uint32_t drc_set_usable(SpaprDrc *drc) |
bbf5c878 | 176 | { |
9d4c0f4f DG |
177 | switch (drc->state) { |
178 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
179 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
180 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
181 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
182 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
183 | break; /* see below */ | |
184 | default: | |
185 | g_assert_not_reached(); | |
186 | } | |
187 | ||
61736732 DG |
188 | /* if there's no resource/device associated with the DRC, there's |
189 | * no way for us to put it in an allocation state consistent with | |
190 | * being 'USABLE'. PAPR 2.7, 13.5.3.4 documents that this should | |
191 | * result in an RTAS return code of -3 / "no such indicator" | |
192 | */ | |
193 | if (!drc->dev) { | |
194 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
195 | } | |
f1c52354 | 196 | if (drc->unplug_requested) { |
82a93a1d DG |
197 | /* Don't allow the guest to move a device away from UNUSABLE |
198 | * state when we want to unplug it */ | |
61736732 | 199 | return RTAS_OUT_NO_SUCH_INDICATOR; |
9d1852ce MR |
200 | } |
201 | ||
9d4c0f4f | 202 | drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE; |
61736732 DG |
203 | |
204 | return RTAS_OUT_SUCCESS; | |
205 | } | |
206 | ||
ce2918cb | 207 | static uint32_t drc_set_unusable(SpaprDrc *drc) |
61736732 | 208 | { |
9d4c0f4f DG |
209 | switch (drc->state) { |
210 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
211 | return RTAS_OUT_SUCCESS; /* Nothing to do */ | |
212 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: | |
213 | break; /* see below */ | |
214 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
215 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
216 | return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */ | |
217 | default: | |
218 | g_assert_not_reached(); | |
219 | } | |
220 | ||
221 | drc->state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE; | |
f1c52354 | 222 | if (drc->unplug_requested) { |
61736732 DG |
223 | uint32_t drc_index = spapr_drc_index(drc); |
224 | trace_spapr_drc_set_allocation_state_finalizing(drc_index); | |
a8dc47fd | 225 | spapr_drc_detach(drc); |
bbf5c878 | 226 | } |
61736732 | 227 | |
0cb688d2 | 228 | return RTAS_OUT_SUCCESS; |
bbf5c878 MR |
229 | } |
230 | ||
dbd26f2f | 231 | static char *spapr_drc_name(SpaprDrc *drc) |
bbf5c878 | 232 | { |
ce2918cb | 233 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
79808336 DG |
234 | |
235 | /* human-readable name for a DRC to encode into the DT | |
236 | * description. this is mainly only used within a guest in place | |
237 | * of the unique DRC index. | |
238 | * | |
239 | * in the case of VIO/PCI devices, it corresponds to a "location | |
240 | * code" that maps a logical device/function (DRC index) to a | |
241 | * physical (or virtual in the case of VIO) location in the system | |
242 | * by chaining together the "location label" for each | |
243 | * encapsulating component. | |
244 | * | |
245 | * since this is more to do with diagnosing physical hardware | |
246 | * issues than guest compatibility, we choose location codes/DRC | |
247 | * names that adhere to the documented format, but avoid encoding | |
248 | * the entire topology information into the label/code, instead | |
249 | * just using the location codes based on the labels for the | |
250 | * endpoints (VIO/PCI adaptor connectors), which is basically just | |
251 | * "C" followed by an integer ID. | |
252 | * | |
253 | * DRC names as documented by PAPR+ v2.7, 13.5.2.4 | |
254 | * location codes as documented by PAPR+ v2.7, 12.3.1.5 | |
255 | */ | |
256 | return g_strdup_printf("%s%d", drck->drc_name_prefix, drc->id); | |
bbf5c878 MR |
257 | } |
258 | ||
bbf5c878 MR |
259 | /* |
260 | * dr-entity-sense sensor value | |
261 | * returned via get-sensor-state RTAS calls | |
262 | * as expected by state diagram in PAPR+ 2.7, 13.4 | |
263 | * based on the current allocation/indicator/power states | |
264 | * for the DR connector. | |
265 | */ | |
ce2918cb | 266 | static SpaprDREntitySense physical_entity_sense(SpaprDrc *drc) |
bbf5c878 | 267 | { |
f224d35b DG |
268 | /* this assumes all PCI devices are assigned to a 'live insertion' |
269 | * power domain, where QEMU manages power state automatically as | |
270 | * opposed to the guest. present, non-PCI resources are unaffected | |
271 | * by power state. | |
272 | */ | |
273 | return drc->dev ? SPAPR_DR_ENTITY_SENSE_PRESENT | |
274 | : SPAPR_DR_ENTITY_SENSE_EMPTY; | |
275 | } | |
276 | ||
ce2918cb | 277 | static SpaprDREntitySense logical_entity_sense(SpaprDrc *drc) |
f224d35b | 278 | { |
9d4c0f4f DG |
279 | switch (drc->state) { |
280 | case SPAPR_DRC_STATE_LOGICAL_UNUSABLE: | |
f224d35b | 281 | return SPAPR_DR_ENTITY_SENSE_UNUSABLE; |
9d4c0f4f DG |
282 | case SPAPR_DRC_STATE_LOGICAL_AVAILABLE: |
283 | case SPAPR_DRC_STATE_LOGICAL_UNISOLATE: | |
284 | case SPAPR_DRC_STATE_LOGICAL_CONFIGURED: | |
285 | g_assert(drc->dev); | |
286 | return SPAPR_DR_ENTITY_SENSE_PRESENT; | |
287 | default: | |
288 | g_assert_not_reached(); | |
bbf5c878 | 289 | } |
bbf5c878 MR |
290 | } |
291 | ||
d7bce999 EB |
292 | static void prop_get_index(Object *obj, Visitor *v, const char *name, |
293 | void *opaque, Error **errp) | |
bbf5c878 | 294 | { |
ce2918cb | 295 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj); |
0b55aa91 | 296 | uint32_t value = spapr_drc_index(drc); |
51e72bc1 | 297 | visit_type_uint32(v, name, &value, errp); |
bbf5c878 MR |
298 | } |
299 | ||
d7bce999 EB |
300 | static void prop_get_fdt(Object *obj, Visitor *v, const char *name, |
301 | void *opaque, Error **errp) | |
bbf5c878 | 302 | { |
ce2918cb | 303 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj); |
d2f95f4d | 304 | QNull *null = NULL; |
c75304a1 | 305 | Error *err = NULL; |
bbf5c878 MR |
306 | int fdt_offset_next, fdt_offset, fdt_depth; |
307 | void *fdt; | |
308 | ||
309 | if (!drc->fdt) { | |
d2f95f4d | 310 | visit_type_null(v, NULL, &null, errp); |
cb3e7f08 | 311 | qobject_unref(null); |
bbf5c878 MR |
312 | return; |
313 | } | |
314 | ||
315 | fdt = drc->fdt; | |
316 | fdt_offset = drc->fdt_start_offset; | |
317 | fdt_depth = 0; | |
318 | ||
319 | do { | |
320 | const char *name = NULL; | |
321 | const struct fdt_property *prop = NULL; | |
322 | int prop_len = 0, name_len = 0; | |
323 | uint32_t tag; | |
324 | ||
325 | tag = fdt_next_tag(fdt, fdt_offset, &fdt_offset_next); | |
326 | switch (tag) { | |
327 | case FDT_BEGIN_NODE: | |
328 | fdt_depth++; | |
329 | name = fdt_get_name(fdt, fdt_offset, &name_len); | |
337283df | 330 | visit_start_struct(v, name, NULL, 0, &err); |
c75304a1 MA |
331 | if (err) { |
332 | error_propagate(errp, err); | |
333 | return; | |
334 | } | |
bbf5c878 MR |
335 | break; |
336 | case FDT_END_NODE: | |
337 | /* shouldn't ever see an FDT_END_NODE before FDT_BEGIN_NODE */ | |
338 | g_assert(fdt_depth > 0); | |
15c2f669 | 339 | visit_check_struct(v, &err); |
1158bb2a | 340 | visit_end_struct(v, NULL); |
c75304a1 MA |
341 | if (err) { |
342 | error_propagate(errp, err); | |
343 | return; | |
344 | } | |
bbf5c878 MR |
345 | fdt_depth--; |
346 | break; | |
347 | case FDT_PROP: { | |
348 | int i; | |
349 | prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len); | |
350 | name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff)); | |
d9f62dde | 351 | visit_start_list(v, name, NULL, 0, &err); |
c75304a1 MA |
352 | if (err) { |
353 | error_propagate(errp, err); | |
354 | return; | |
355 | } | |
bbf5c878 | 356 | for (i = 0; i < prop_len; i++) { |
51e72bc1 | 357 | visit_type_uint8(v, NULL, (uint8_t *)&prop->data[i], &err); |
c75304a1 MA |
358 | if (err) { |
359 | error_propagate(errp, err); | |
360 | return; | |
361 | } | |
362 | } | |
a4a1c70d | 363 | visit_check_list(v, &err); |
1158bb2a | 364 | visit_end_list(v, NULL); |
a4a1c70d MA |
365 | if (err) { |
366 | error_propagate(errp, err); | |
367 | return; | |
368 | } | |
bbf5c878 MR |
369 | break; |
370 | } | |
371 | default: | |
e20c6314 PMD |
372 | error_report("device FDT in unexpected state: %d", tag); |
373 | abort(); | |
bbf5c878 MR |
374 | } |
375 | fdt_offset = fdt_offset_next; | |
376 | } while (fdt_depth != 0); | |
377 | } | |
378 | ||
ce2918cb | 379 | void spapr_drc_attach(SpaprDrc *drc, DeviceState *d, Error **errp) |
bbf5c878 | 380 | { |
0b55aa91 | 381 | trace_spapr_drc_attach(spapr_drc_index(drc)); |
bbf5c878 | 382 | |
9d4c0f4f | 383 | if (drc->dev) { |
bbf5c878 MR |
384 | error_setg(errp, "an attached device is still awaiting release"); |
385 | return; | |
386 | } | |
9d4c0f4f DG |
387 | g_assert((drc->state == SPAPR_DRC_STATE_LOGICAL_UNUSABLE) |
388 | || (drc->state == SPAPR_DRC_STATE_PHYSICAL_POWERON)); | |
bbf5c878 | 389 | |
bbf5c878 | 390 | drc->dev = d; |
d9c95c71 | 391 | |
bbf5c878 MR |
392 | object_property_add_link(OBJECT(drc), "device", |
393 | object_get_typename(OBJECT(drc->dev)), | |
394 | (Object **)(&drc->dev), | |
d2623129 | 395 | NULL, 0); |
bbf5c878 MR |
396 | } |
397 | ||
ce2918cb | 398 | static void spapr_drc_release(SpaprDrc *drc) |
bbf5c878 | 399 | { |
ce2918cb | 400 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
6b762f29 DG |
401 | |
402 | drck->release(drc->dev); | |
bbf5c878 | 403 | |
f1c52354 | 404 | drc->unplug_requested = false; |
bbf5c878 MR |
405 | g_free(drc->fdt); |
406 | drc->fdt = NULL; | |
407 | drc->fdt_start_offset = 0; | |
df4fe0b2 | 408 | object_property_del(OBJECT(drc), "device"); |
bbf5c878 | 409 | drc->dev = NULL; |
bbf5c878 MR |
410 | } |
411 | ||
ce2918cb | 412 | void spapr_drc_detach(SpaprDrc *drc) |
9c914e53 | 413 | { |
ce2918cb | 414 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
9d4c0f4f | 415 | |
9c914e53 DG |
416 | trace_spapr_drc_detach(spapr_drc_index(drc)); |
417 | ||
9d4c0f4f | 418 | g_assert(drc->dev); |
a8dc47fd | 419 | |
9d4c0f4f | 420 | drc->unplug_requested = true; |
9c914e53 | 421 | |
9d4c0f4f DG |
422 | if (drc->state != drck->empty_state) { |
423 | trace_spapr_drc_awaiting_quiesce(spapr_drc_index(drc)); | |
9c914e53 DG |
424 | return; |
425 | } | |
426 | ||
9c914e53 DG |
427 | spapr_drc_release(drc); |
428 | } | |
429 | ||
ce2918cb | 430 | void spapr_drc_reset(SpaprDrc *drc) |
bbf5c878 | 431 | { |
ce2918cb | 432 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
9d4c0f4f | 433 | |
0b55aa91 | 434 | trace_spapr_drc_reset(spapr_drc_index(drc)); |
b8fdd530 | 435 | |
bbf5c878 | 436 | /* immediately upon reset we can safely assume DRCs whose devices |
4f9242fc | 437 | * are pending removal can be safely removed. |
bbf5c878 | 438 | */ |
f1c52354 | 439 | if (drc->unplug_requested) { |
4f9242fc DG |
440 | spapr_drc_release(drc); |
441 | } | |
442 | ||
4f9242fc | 443 | if (drc->dev) { |
9d4c0f4f DG |
444 | /* A device present at reset is ready to go, same as coldplugged */ |
445 | drc->state = drck->ready_state; | |
188bfe1b BR |
446 | /* |
447 | * Ensure that we are able to send the FDT fragment again | |
448 | * via configure-connector call if the guest requests. | |
449 | */ | |
450 | drc->ccs_offset = drc->fdt_start_offset; | |
451 | drc->ccs_depth = 0; | |
4f9242fc | 452 | } else { |
9d4c0f4f | 453 | drc->state = drck->empty_state; |
188bfe1b BR |
454 | drc->ccs_offset = -1; |
455 | drc->ccs_depth = -1; | |
bbf5c878 MR |
456 | } |
457 | } | |
458 | ||
ab858434 GK |
459 | static bool spapr_drc_unplug_requested_needed(void *opaque) |
460 | { | |
461 | return spapr_drc_unplug_requested(opaque); | |
462 | } | |
463 | ||
464 | static const VMStateDescription vmstate_spapr_drc_unplug_requested = { | |
465 | .name = "spapr_drc/unplug_requested", | |
466 | .version_id = 1, | |
467 | .minimum_version_id = 1, | |
468 | .needed = spapr_drc_unplug_requested_needed, | |
469 | .fields = (VMStateField []) { | |
470 | VMSTATE_BOOL(unplug_requested, SpaprDrc), | |
471 | VMSTATE_END_OF_LIST() | |
472 | } | |
473 | }; | |
474 | ||
4b63db12 | 475 | bool spapr_drc_transient(SpaprDrc *drc) |
a50919dd | 476 | { |
ce2918cb | 477 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
a50919dd | 478 | |
4b63db12 GK |
479 | /* |
480 | * If no dev is plugged in there is no need to migrate the DRC state | |
481 | * nor to reset the DRC at CAS. | |
482 | */ | |
c618e300 | 483 | if (!drc->dev) { |
a50919dd DHB |
484 | return false; |
485 | } | |
486 | ||
487 | /* | |
4b63db12 GK |
488 | * We need to reset the DRC at CAS or to migrate the DRC state if it's |
489 | * not equal to the expected long-term state, which is the same as the | |
ab858434 | 490 | * coldplugged initial state, or if an unplug request is pending. |
4b63db12 | 491 | */ |
ab858434 GK |
492 | return drc->state != drck->ready_state || |
493 | spapr_drc_unplug_requested(drc); | |
a50919dd DHB |
494 | } |
495 | ||
4b63db12 GK |
496 | static bool spapr_drc_needed(void *opaque) |
497 | { | |
498 | return spapr_drc_transient(opaque); | |
499 | } | |
500 | ||
a50919dd DHB |
501 | static const VMStateDescription vmstate_spapr_drc = { |
502 | .name = "spapr_drc", | |
503 | .version_id = 1, | |
504 | .minimum_version_id = 1, | |
505 | .needed = spapr_drc_needed, | |
506 | .fields = (VMStateField []) { | |
ce2918cb | 507 | VMSTATE_UINT32(state, SpaprDrc), |
a50919dd | 508 | VMSTATE_END_OF_LIST() |
ab858434 GK |
509 | }, |
510 | .subsections = (const VMStateDescription * []) { | |
511 | &vmstate_spapr_drc_unplug_requested, | |
512 | NULL | |
a50919dd DHB |
513 | } |
514 | }; | |
515 | ||
bbf5c878 MR |
516 | static void realize(DeviceState *d, Error **errp) |
517 | { | |
ce2918cb | 518 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(d); |
bbf5c878 | 519 | Object *root_container; |
f5babeac | 520 | gchar *link_name; |
ddfb0baa | 521 | char *child_name; |
bbf5c878 | 522 | |
0b55aa91 | 523 | trace_spapr_drc_realize(spapr_drc_index(drc)); |
bbf5c878 MR |
524 | /* NOTE: we do this as part of realize/unrealize due to the fact |
525 | * that the guest will communicate with the DRC via RTAS calls | |
526 | * referencing the global DRC index. By unlinking the DRC | |
527 | * from DRC_CONTAINER_PATH/<drc_index> we effectively make it | |
528 | * inaccessible by the guest, since lookups rely on this path | |
529 | * existing in the composition tree | |
530 | */ | |
531 | root_container = container_get(object_get_root(), DRC_CONTAINER_PATH); | |
f5babeac | 532 | link_name = g_strdup_printf("%x", spapr_drc_index(drc)); |
bbf5c878 | 533 | child_name = object_get_canonical_path_component(OBJECT(drc)); |
0b55aa91 | 534 | trace_spapr_drc_realize_child(spapr_drc_index(drc), child_name); |
bbf5c878 | 535 | object_property_add_alias(root_container, link_name, |
d2623129 | 536 | drc->owner, child_name); |
bf26ae32 | 537 | g_free(child_name); |
f5babeac | 538 | g_free(link_name); |
3cad405b | 539 | vmstate_register(VMSTATE_IF(drc), spapr_drc_index(drc), &vmstate_spapr_drc, |
a50919dd | 540 | drc); |
0b55aa91 | 541 | trace_spapr_drc_realize_complete(spapr_drc_index(drc)); |
bbf5c878 MR |
542 | } |
543 | ||
b69c3c21 | 544 | static void unrealize(DeviceState *d) |
bbf5c878 | 545 | { |
ce2918cb | 546 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(d); |
bbf5c878 | 547 | Object *root_container; |
f5babeac | 548 | gchar *name; |
bbf5c878 | 549 | |
0b55aa91 | 550 | trace_spapr_drc_unrealize(spapr_drc_index(drc)); |
3cad405b | 551 | vmstate_unregister(VMSTATE_IF(drc), &vmstate_spapr_drc, drc); |
bbf5c878 | 552 | root_container = container_get(object_get_root(), DRC_CONTAINER_PATH); |
f5babeac | 553 | name = g_strdup_printf("%x", spapr_drc_index(drc)); |
df4fe0b2 | 554 | object_property_del(root_container, name); |
f5babeac | 555 | g_free(name); |
bbf5c878 MR |
556 | } |
557 | ||
ce2918cb | 558 | SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type, |
bbf5c878 MR |
559 | uint32_t id) |
560 | { | |
ce2918cb | 561 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(object_new(type)); |
94649d42 | 562 | char *prop_name; |
bbf5c878 | 563 | |
bbf5c878 MR |
564 | drc->id = id; |
565 | drc->owner = owner; | |
0b55aa91 DG |
566 | prop_name = g_strdup_printf("dr-connector[%"PRIu32"]", |
567 | spapr_drc_index(drc)); | |
d2623129 | 568 | object_property_add_child(owner, prop_name, OBJECT(drc)); |
f3f41030 | 569 | object_unref(OBJECT(drc)); |
bbf5c878 | 570 | object_property_set_bool(OBJECT(drc), true, "realized", NULL); |
94649d42 | 571 | g_free(prop_name); |
bbf5c878 | 572 | |
bbf5c878 MR |
573 | return drc; |
574 | } | |
575 | ||
576 | static void spapr_dr_connector_instance_init(Object *obj) | |
577 | { | |
ce2918cb DG |
578 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj); |
579 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
bbf5c878 | 580 | |
d2623129 | 581 | object_property_add_uint32_ptr(obj, "id", &drc->id, OBJ_PROP_FLAG_READ); |
bbf5c878 | 582 | object_property_add(obj, "index", "uint32", prop_get_index, |
d2623129 | 583 | NULL, NULL, NULL); |
bbf5c878 | 584 | object_property_add(obj, "fdt", "struct", prop_get_fdt, |
d2623129 | 585 | NULL, NULL, NULL); |
9d4c0f4f | 586 | drc->state = drck->empty_state; |
bbf5c878 MR |
587 | } |
588 | ||
589 | static void spapr_dr_connector_class_init(ObjectClass *k, void *data) | |
590 | { | |
591 | DeviceClass *dk = DEVICE_CLASS(k); | |
bbf5c878 | 592 | |
bbf5c878 MR |
593 | dk->realize = realize; |
594 | dk->unrealize = unrealize; | |
c401ae8c MA |
595 | /* |
596 | * Reason: it crashes FIXME find and document the real reason | |
597 | */ | |
e90f2a8c | 598 | dk->user_creatable = false; |
bbf5c878 MR |
599 | } |
600 | ||
67fea71b DG |
601 | static bool drc_physical_needed(void *opaque) |
602 | { | |
ce2918cb DG |
603 | SpaprDrcPhysical *drcp = (SpaprDrcPhysical *)opaque; |
604 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(drcp); | |
67fea71b DG |
605 | |
606 | if ((drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_ACTIVE)) | |
607 | || (!drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_INACTIVE))) { | |
608 | return false; | |
609 | } | |
610 | return true; | |
611 | } | |
612 | ||
613 | static const VMStateDescription vmstate_spapr_drc_physical = { | |
614 | .name = "spapr_drc/physical", | |
615 | .version_id = 1, | |
616 | .minimum_version_id = 1, | |
617 | .needed = drc_physical_needed, | |
618 | .fields = (VMStateField []) { | |
ce2918cb | 619 | VMSTATE_UINT32(dr_indicator, SpaprDrcPhysical), |
67fea71b DG |
620 | VMSTATE_END_OF_LIST() |
621 | } | |
622 | }; | |
623 | ||
624 | static void drc_physical_reset(void *opaque) | |
625 | { | |
ce2918cb DG |
626 | SpaprDrc *drc = SPAPR_DR_CONNECTOR(opaque); |
627 | SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(drc); | |
67fea71b DG |
628 | |
629 | if (drc->dev) { | |
630 | drcp->dr_indicator = SPAPR_DR_INDICATOR_ACTIVE; | |
631 | } else { | |
632 | drcp->dr_indicator = SPAPR_DR_INDICATOR_INACTIVE; | |
633 | } | |
634 | } | |
635 | ||
636 | static void realize_physical(DeviceState *d, Error **errp) | |
637 | { | |
ce2918cb | 638 | SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d); |
67fea71b DG |
639 | Error *local_err = NULL; |
640 | ||
641 | realize(d, &local_err); | |
642 | if (local_err) { | |
643 | error_propagate(errp, local_err); | |
644 | return; | |
645 | } | |
646 | ||
3cad405b MAL |
647 | vmstate_register(VMSTATE_IF(drcp), |
648 | spapr_drc_index(SPAPR_DR_CONNECTOR(drcp)), | |
67fea71b DG |
649 | &vmstate_spapr_drc_physical, drcp); |
650 | qemu_register_reset(drc_physical_reset, drcp); | |
651 | } | |
652 | ||
b69c3c21 | 653 | static void unrealize_physical(DeviceState *d) |
379ae096 | 654 | { |
ce2918cb | 655 | SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d); |
379ae096 | 656 | |
b69c3c21 | 657 | unrealize(d); |
3cad405b | 658 | vmstate_unregister(VMSTATE_IF(drcp), &vmstate_spapr_drc_physical, drcp); |
379ae096 GK |
659 | qemu_unregister_reset(drc_physical_reset, drcp); |
660 | } | |
661 | ||
f224d35b DG |
662 | static void spapr_drc_physical_class_init(ObjectClass *k, void *data) |
663 | { | |
67fea71b | 664 | DeviceClass *dk = DEVICE_CLASS(k); |
ce2918cb | 665 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
f224d35b | 666 | |
67fea71b | 667 | dk->realize = realize_physical; |
379ae096 | 668 | dk->unrealize = unrealize_physical; |
f224d35b | 669 | drck->dr_entity_sense = physical_entity_sense; |
0dfabd39 DG |
670 | drck->isolate = drc_isolate_physical; |
671 | drck->unisolate = drc_unisolate_physical; | |
9d4c0f4f DG |
672 | drck->ready_state = SPAPR_DRC_STATE_PHYSICAL_CONFIGURED; |
673 | drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON; | |
f224d35b DG |
674 | } |
675 | ||
676 | static void spapr_drc_logical_class_init(ObjectClass *k, void *data) | |
677 | { | |
ce2918cb | 678 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
f224d35b DG |
679 | |
680 | drck->dr_entity_sense = logical_entity_sense; | |
0dfabd39 DG |
681 | drck->isolate = drc_isolate_logical; |
682 | drck->unisolate = drc_unisolate_logical; | |
9d4c0f4f DG |
683 | drck->ready_state = SPAPR_DRC_STATE_LOGICAL_CONFIGURED; |
684 | drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE; | |
f224d35b DG |
685 | } |
686 | ||
2d335818 DG |
687 | static void spapr_drc_cpu_class_init(ObjectClass *k, void *data) |
688 | { | |
ce2918cb | 689 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
2d335818 DG |
690 | |
691 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_CPU; | |
1693ea16 | 692 | drck->typename = "CPU"; |
79808336 | 693 | drck->drc_name_prefix = "CPU "; |
6b762f29 | 694 | drck->release = spapr_core_release; |
345b12b9 | 695 | drck->dt_populate = spapr_core_dt_populate; |
2d335818 DG |
696 | } |
697 | ||
698 | static void spapr_drc_pci_class_init(ObjectClass *k, void *data) | |
699 | { | |
ce2918cb | 700 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
2d335818 DG |
701 | |
702 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PCI; | |
1693ea16 | 703 | drck->typename = "28"; |
79808336 | 704 | drck->drc_name_prefix = "C"; |
6b762f29 | 705 | drck->release = spapr_phb_remove_pci_device_cb; |
46fd0299 | 706 | drck->dt_populate = spapr_pci_dt_populate; |
2d335818 DG |
707 | } |
708 | ||
709 | static void spapr_drc_lmb_class_init(ObjectClass *k, void *data) | |
710 | { | |
ce2918cb | 711 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
2d335818 DG |
712 | |
713 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_LMB; | |
1693ea16 | 714 | drck->typename = "MEM"; |
79808336 | 715 | drck->drc_name_prefix = "LMB "; |
6b762f29 | 716 | drck->release = spapr_lmb_release; |
62d38c9b | 717 | drck->dt_populate = spapr_lmb_dt_populate; |
2d335818 DG |
718 | } |
719 | ||
962b6c36 MR |
720 | static void spapr_drc_phb_class_init(ObjectClass *k, void *data) |
721 | { | |
ce2918cb | 722 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); |
962b6c36 MR |
723 | |
724 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PHB; | |
725 | drck->typename = "PHB"; | |
726 | drck->drc_name_prefix = "PHB "; | |
bb2bdd81 GK |
727 | drck->release = spapr_phb_release; |
728 | drck->dt_populate = spapr_phb_dt_populate; | |
962b6c36 MR |
729 | } |
730 | ||
ee3a71e3 SB |
731 | static void spapr_drc_pmem_class_init(ObjectClass *k, void *data) |
732 | { | |
733 | SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k); | |
734 | ||
735 | drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PMEM; | |
736 | drck->typename = "PMEM"; | |
737 | drck->drc_name_prefix = "PMEM "; | |
738 | drck->release = NULL; | |
739 | drck->dt_populate = spapr_pmem_dt_populate; | |
740 | } | |
741 | ||
bbf5c878 MR |
742 | static const TypeInfo spapr_dr_connector_info = { |
743 | .name = TYPE_SPAPR_DR_CONNECTOR, | |
744 | .parent = TYPE_DEVICE, | |
ce2918cb | 745 | .instance_size = sizeof(SpaprDrc), |
bbf5c878 | 746 | .instance_init = spapr_dr_connector_instance_init, |
ce2918cb | 747 | .class_size = sizeof(SpaprDrcClass), |
bbf5c878 | 748 | .class_init = spapr_dr_connector_class_init, |
2d335818 DG |
749 | .abstract = true, |
750 | }; | |
751 | ||
752 | static const TypeInfo spapr_drc_physical_info = { | |
753 | .name = TYPE_SPAPR_DRC_PHYSICAL, | |
754 | .parent = TYPE_SPAPR_DR_CONNECTOR, | |
ce2918cb | 755 | .instance_size = sizeof(SpaprDrcPhysical), |
f224d35b | 756 | .class_init = spapr_drc_physical_class_init, |
2d335818 DG |
757 | .abstract = true, |
758 | }; | |
759 | ||
760 | static const TypeInfo spapr_drc_logical_info = { | |
761 | .name = TYPE_SPAPR_DRC_LOGICAL, | |
762 | .parent = TYPE_SPAPR_DR_CONNECTOR, | |
f224d35b | 763 | .class_init = spapr_drc_logical_class_init, |
2d335818 DG |
764 | .abstract = true, |
765 | }; | |
766 | ||
767 | static const TypeInfo spapr_drc_cpu_info = { | |
768 | .name = TYPE_SPAPR_DRC_CPU, | |
769 | .parent = TYPE_SPAPR_DRC_LOGICAL, | |
2d335818 DG |
770 | .class_init = spapr_drc_cpu_class_init, |
771 | }; | |
772 | ||
773 | static const TypeInfo spapr_drc_pci_info = { | |
774 | .name = TYPE_SPAPR_DRC_PCI, | |
775 | .parent = TYPE_SPAPR_DRC_PHYSICAL, | |
2d335818 DG |
776 | .class_init = spapr_drc_pci_class_init, |
777 | }; | |
778 | ||
779 | static const TypeInfo spapr_drc_lmb_info = { | |
780 | .name = TYPE_SPAPR_DRC_LMB, | |
781 | .parent = TYPE_SPAPR_DRC_LOGICAL, | |
2d335818 | 782 | .class_init = spapr_drc_lmb_class_init, |
bbf5c878 MR |
783 | }; |
784 | ||
962b6c36 MR |
785 | static const TypeInfo spapr_drc_phb_info = { |
786 | .name = TYPE_SPAPR_DRC_PHB, | |
787 | .parent = TYPE_SPAPR_DRC_LOGICAL, | |
ce2918cb | 788 | .instance_size = sizeof(SpaprDrc), |
962b6c36 MR |
789 | .class_init = spapr_drc_phb_class_init, |
790 | }; | |
791 | ||
ee3a71e3 SB |
792 | static const TypeInfo spapr_drc_pmem_info = { |
793 | .name = TYPE_SPAPR_DRC_PMEM, | |
794 | .parent = TYPE_SPAPR_DRC_LOGICAL, | |
795 | .class_init = spapr_drc_pmem_class_init, | |
796 | }; | |
797 | ||
bbf5c878 MR |
798 | /* helper functions for external users */ |
799 | ||
ce2918cb | 800 | SpaprDrc *spapr_drc_by_index(uint32_t index) |
bbf5c878 MR |
801 | { |
802 | Object *obj; | |
f5babeac | 803 | gchar *name; |
bbf5c878 | 804 | |
f5babeac | 805 | name = g_strdup_printf("%s/%x", DRC_CONTAINER_PATH, index); |
bbf5c878 | 806 | obj = object_resolve_path(name, NULL); |
f5babeac | 807 | g_free(name); |
bbf5c878 MR |
808 | |
809 | return !obj ? NULL : SPAPR_DR_CONNECTOR(obj); | |
810 | } | |
811 | ||
ce2918cb | 812 | SpaprDrc *spapr_drc_by_id(const char *type, uint32_t id) |
bbf5c878 | 813 | { |
ce2918cb | 814 | SpaprDrcClass *drck |
fbf55397 DG |
815 | = SPAPR_DR_CONNECTOR_CLASS(object_class_by_name(type)); |
816 | ||
817 | return spapr_drc_by_index(drck->typeshift << DRC_INDEX_TYPE_SHIFT | |
818 | | (id & DRC_INDEX_ID_MASK)); | |
bbf5c878 | 819 | } |
e4b798bb | 820 | |
e4b798bb | 821 | /** |
9e7d38e8 | 822 | * spapr_dt_drc |
e4b798bb MR |
823 | * |
824 | * @fdt: libfdt device tree | |
825 | * @path: path in the DT to generate properties | |
826 | * @owner: parent Object/DeviceState for which to generate DRC | |
827 | * descriptions for | |
ce2918cb | 828 | * @drc_type_mask: mask of SpaprDrcType values corresponding |
e4b798bb MR |
829 | * to the types of DRCs to generate entries for |
830 | * | |
831 | * generate OF properties to describe DRC topology/indices to guests | |
832 | * | |
833 | * as documented in PAPR+ v2.1, 13.5.2 | |
834 | */ | |
9e7d38e8 | 835 | int spapr_dt_drc(void *fdt, int offset, Object *owner, uint32_t drc_type_mask) |
e4b798bb MR |
836 | { |
837 | Object *root_container; | |
838 | ObjectProperty *prop; | |
7746abd8 | 839 | ObjectPropertyIterator iter; |
e4b798bb MR |
840 | uint32_t drc_count = 0; |
841 | GArray *drc_indexes, *drc_power_domains; | |
842 | GString *drc_names, *drc_types; | |
843 | int ret; | |
844 | ||
845 | /* the first entry of each properties is a 32-bit integer encoding | |
846 | * the number of elements in the array. we won't know this until | |
847 | * we complete the iteration through all the matching DRCs, but | |
848 | * reserve the space now and set the offsets accordingly so we | |
849 | * can fill them in later. | |
850 | */ | |
851 | drc_indexes = g_array_new(false, true, sizeof(uint32_t)); | |
852 | drc_indexes = g_array_set_size(drc_indexes, 1); | |
853 | drc_power_domains = g_array_new(false, true, sizeof(uint32_t)); | |
854 | drc_power_domains = g_array_set_size(drc_power_domains, 1); | |
855 | drc_names = g_string_set_size(g_string_new(NULL), sizeof(uint32_t)); | |
856 | drc_types = g_string_set_size(g_string_new(NULL), sizeof(uint32_t)); | |
857 | ||
858 | /* aliases for all DRConnector objects will be rooted in QOM | |
859 | * composition tree at DRC_CONTAINER_PATH | |
860 | */ | |
861 | root_container = container_get(object_get_root(), DRC_CONTAINER_PATH); | |
862 | ||
7746abd8 DB |
863 | object_property_iter_init(&iter, root_container); |
864 | while ((prop = object_property_iter_next(&iter))) { | |
e4b798bb | 865 | Object *obj; |
ce2918cb DG |
866 | SpaprDrc *drc; |
867 | SpaprDrcClass *drck; | |
dbd26f2f | 868 | char *drc_name = NULL; |
e4b798bb MR |
869 | uint32_t drc_index, drc_power_domain; |
870 | ||
871 | if (!strstart(prop->type, "link<", NULL)) { | |
872 | continue; | |
873 | } | |
874 | ||
875 | obj = object_property_get_link(root_container, prop->name, NULL); | |
876 | drc = SPAPR_DR_CONNECTOR(obj); | |
877 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
878 | ||
879 | if (owner && (drc->owner != owner)) { | |
880 | continue; | |
881 | } | |
882 | ||
2d335818 | 883 | if ((spapr_drc_type(drc) & drc_type_mask) == 0) { |
e4b798bb MR |
884 | continue; |
885 | } | |
886 | ||
887 | drc_count++; | |
888 | ||
889 | /* ibm,drc-indexes */ | |
0b55aa91 | 890 | drc_index = cpu_to_be32(spapr_drc_index(drc)); |
e4b798bb MR |
891 | g_array_append_val(drc_indexes, drc_index); |
892 | ||
893 | /* ibm,drc-power-domains */ | |
894 | drc_power_domain = cpu_to_be32(-1); | |
895 | g_array_append_val(drc_power_domains, drc_power_domain); | |
896 | ||
897 | /* ibm,drc-names */ | |
dbd26f2f SB |
898 | drc_name = spapr_drc_name(drc); |
899 | drc_names = g_string_append(drc_names, drc_name); | |
e4b798bb | 900 | drc_names = g_string_insert_len(drc_names, -1, "\0", 1); |
dbd26f2f | 901 | g_free(drc_name); |
e4b798bb MR |
902 | |
903 | /* ibm,drc-types */ | |
1693ea16 | 904 | drc_types = g_string_append(drc_types, drck->typename); |
e4b798bb MR |
905 | drc_types = g_string_insert_len(drc_types, -1, "\0", 1); |
906 | } | |
907 | ||
908 | /* now write the drc count into the space we reserved at the | |
909 | * beginning of the arrays previously | |
910 | */ | |
911 | *(uint32_t *)drc_indexes->data = cpu_to_be32(drc_count); | |
912 | *(uint32_t *)drc_power_domains->data = cpu_to_be32(drc_count); | |
913 | *(uint32_t *)drc_names->str = cpu_to_be32(drc_count); | |
914 | *(uint32_t *)drc_types->str = cpu_to_be32(drc_count); | |
915 | ||
9e7d38e8 | 916 | ret = fdt_setprop(fdt, offset, "ibm,drc-indexes", |
e4b798bb MR |
917 | drc_indexes->data, |
918 | drc_indexes->len * sizeof(uint32_t)); | |
919 | if (ret) { | |
ce9863b7 | 920 | error_report("Couldn't create ibm,drc-indexes property"); |
e4b798bb MR |
921 | goto out; |
922 | } | |
923 | ||
9e7d38e8 | 924 | ret = fdt_setprop(fdt, offset, "ibm,drc-power-domains", |
e4b798bb MR |
925 | drc_power_domains->data, |
926 | drc_power_domains->len * sizeof(uint32_t)); | |
927 | if (ret) { | |
ce9863b7 | 928 | error_report("Couldn't finalize ibm,drc-power-domains property"); |
e4b798bb MR |
929 | goto out; |
930 | } | |
931 | ||
9e7d38e8 | 932 | ret = fdt_setprop(fdt, offset, "ibm,drc-names", |
e4b798bb MR |
933 | drc_names->str, drc_names->len); |
934 | if (ret) { | |
ce9863b7 | 935 | error_report("Couldn't finalize ibm,drc-names property"); |
e4b798bb MR |
936 | goto out; |
937 | } | |
938 | ||
9e7d38e8 | 939 | ret = fdt_setprop(fdt, offset, "ibm,drc-types", |
e4b798bb MR |
940 | drc_types->str, drc_types->len); |
941 | if (ret) { | |
ce9863b7 | 942 | error_report("Couldn't finalize ibm,drc-types property"); |
e4b798bb MR |
943 | goto out; |
944 | } | |
945 | ||
946 | out: | |
947 | g_array_free(drc_indexes, true); | |
948 | g_array_free(drc_power_domains, true); | |
949 | g_string_free(drc_names, true); | |
950 | g_string_free(drc_types, true); | |
951 | ||
952 | return ret; | |
953 | } | |
b89b3d39 DG |
954 | |
955 | /* | |
956 | * RTAS calls | |
957 | */ | |
958 | ||
7b7258f8 | 959 | static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state) |
b89b3d39 | 960 | { |
ce2918cb DG |
961 | SpaprDrc *drc = spapr_drc_by_index(idx); |
962 | SpaprDrcClass *drck; | |
7b7258f8 DG |
963 | |
964 | if (!drc) { | |
0dfabd39 | 965 | return RTAS_OUT_NO_SUCH_INDICATOR; |
b89b3d39 DG |
966 | } |
967 | ||
0dfabd39 DG |
968 | trace_spapr_drc_set_isolation_state(spapr_drc_index(drc), state); |
969 | ||
7b7258f8 | 970 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
0dfabd39 DG |
971 | |
972 | switch (state) { | |
973 | case SPAPR_DR_ISOLATION_STATE_ISOLATED: | |
974 | return drck->isolate(drc); | |
975 | ||
976 | case SPAPR_DR_ISOLATION_STATE_UNISOLATED: | |
977 | return drck->unisolate(drc); | |
978 | ||
979 | default: | |
980 | return RTAS_OUT_PARAM_ERROR; | |
981 | } | |
b89b3d39 DG |
982 | } |
983 | ||
7b7258f8 | 984 | static uint32_t rtas_set_allocation_state(uint32_t idx, uint32_t state) |
b89b3d39 | 985 | { |
ce2918cb | 986 | SpaprDrc *drc = spapr_drc_by_index(idx); |
b89b3d39 | 987 | |
61736732 DG |
988 | if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_LOGICAL)) { |
989 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
b89b3d39 DG |
990 | } |
991 | ||
61736732 DG |
992 | trace_spapr_drc_set_allocation_state(spapr_drc_index(drc), state); |
993 | ||
994 | switch (state) { | |
995 | case SPAPR_DR_ALLOCATION_STATE_USABLE: | |
996 | return drc_set_usable(drc); | |
997 | ||
998 | case SPAPR_DR_ALLOCATION_STATE_UNUSABLE: | |
999 | return drc_set_unusable(drc); | |
1000 | ||
1001 | default: | |
1002 | return RTAS_OUT_PARAM_ERROR; | |
1003 | } | |
7b7258f8 | 1004 | } |
b89b3d39 | 1005 | |
cd74d27e | 1006 | static uint32_t rtas_set_dr_indicator(uint32_t idx, uint32_t state) |
7b7258f8 | 1007 | { |
ce2918cb | 1008 | SpaprDrc *drc = spapr_drc_by_index(idx); |
b89b3d39 | 1009 | |
67fea71b DG |
1010 | if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_PHYSICAL)) { |
1011 | return RTAS_OUT_NO_SUCH_INDICATOR; | |
1012 | } | |
1013 | if ((state != SPAPR_DR_INDICATOR_INACTIVE) | |
1014 | && (state != SPAPR_DR_INDICATOR_ACTIVE) | |
1015 | && (state != SPAPR_DR_INDICATOR_IDENTIFY) | |
1016 | && (state != SPAPR_DR_INDICATOR_ACTION)) { | |
1017 | return RTAS_OUT_PARAM_ERROR; /* bad state parameter */ | |
7b7258f8 DG |
1018 | } |
1019 | ||
cd74d27e | 1020 | trace_spapr_drc_set_dr_indicator(idx, state); |
67fea71b | 1021 | SPAPR_DRC_PHYSICAL(drc)->dr_indicator = state; |
cd74d27e | 1022 | return RTAS_OUT_SUCCESS; |
7b7258f8 DG |
1023 | } |
1024 | ||
ce2918cb | 1025 | static void rtas_set_indicator(PowerPCCPU *cpu, SpaprMachineState *spapr, |
7b7258f8 DG |
1026 | uint32_t token, |
1027 | uint32_t nargs, target_ulong args, | |
1028 | uint32_t nret, target_ulong rets) | |
1029 | { | |
1030 | uint32_t type, idx, state; | |
1031 | uint32_t ret = RTAS_OUT_SUCCESS; | |
1032 | ||
1033 | if (nargs != 3 || nret != 1) { | |
b89b3d39 DG |
1034 | ret = RTAS_OUT_PARAM_ERROR; |
1035 | goto out; | |
1036 | } | |
b89b3d39 | 1037 | |
7b7258f8 DG |
1038 | type = rtas_ld(args, 0); |
1039 | idx = rtas_ld(args, 1); | |
1040 | state = rtas_ld(args, 2); | |
1041 | ||
1042 | switch (type) { | |
b89b3d39 | 1043 | case RTAS_SENSOR_TYPE_ISOLATION_STATE: |
7b7258f8 | 1044 | ret = rtas_set_isolation_state(idx, state); |
b89b3d39 DG |
1045 | break; |
1046 | case RTAS_SENSOR_TYPE_DR: | |
cd74d27e | 1047 | ret = rtas_set_dr_indicator(idx, state); |
b89b3d39 DG |
1048 | break; |
1049 | case RTAS_SENSOR_TYPE_ALLOCATION_STATE: | |
7b7258f8 | 1050 | ret = rtas_set_allocation_state(idx, state); |
b89b3d39 DG |
1051 | break; |
1052 | default: | |
7b7258f8 | 1053 | ret = RTAS_OUT_NOT_SUPPORTED; |
b89b3d39 DG |
1054 | } |
1055 | ||
1056 | out: | |
1057 | rtas_st(rets, 0, ret); | |
b89b3d39 DG |
1058 | } |
1059 | ||
ce2918cb | 1060 | static void rtas_get_sensor_state(PowerPCCPU *cpu, SpaprMachineState *spapr, |
b89b3d39 DG |
1061 | uint32_t token, uint32_t nargs, |
1062 | target_ulong args, uint32_t nret, | |
1063 | target_ulong rets) | |
1064 | { | |
1065 | uint32_t sensor_type; | |
1066 | uint32_t sensor_index; | |
1067 | uint32_t sensor_state = 0; | |
ce2918cb DG |
1068 | SpaprDrc *drc; |
1069 | SpaprDrcClass *drck; | |
b89b3d39 DG |
1070 | uint32_t ret = RTAS_OUT_SUCCESS; |
1071 | ||
1072 | if (nargs != 2 || nret != 2) { | |
1073 | ret = RTAS_OUT_PARAM_ERROR; | |
1074 | goto out; | |
1075 | } | |
1076 | ||
1077 | sensor_type = rtas_ld(args, 0); | |
1078 | sensor_index = rtas_ld(args, 1); | |
1079 | ||
1080 | if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) { | |
1081 | /* currently only DR-related sensors are implemented */ | |
1082 | trace_spapr_rtas_get_sensor_state_not_supported(sensor_index, | |
1083 | sensor_type); | |
1084 | ret = RTAS_OUT_NOT_SUPPORTED; | |
1085 | goto out; | |
1086 | } | |
1087 | ||
fbf55397 | 1088 | drc = spapr_drc_by_index(sensor_index); |
b89b3d39 DG |
1089 | if (!drc) { |
1090 | trace_spapr_rtas_get_sensor_state_invalid(sensor_index); | |
1091 | ret = RTAS_OUT_PARAM_ERROR; | |
1092 | goto out; | |
1093 | } | |
1094 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
f224d35b | 1095 | sensor_state = drck->dr_entity_sense(drc); |
b89b3d39 DG |
1096 | |
1097 | out: | |
1098 | rtas_st(rets, 0, ret); | |
1099 | rtas_st(rets, 1, sensor_state); | |
1100 | } | |
1101 | ||
1102 | /* configure-connector work area offsets, int32_t units for field | |
1103 | * indexes, bytes for field offset/len values. | |
1104 | * | |
1105 | * as documented by PAPR+ v2.7, 13.5.3.5 | |
1106 | */ | |
1107 | #define CC_IDX_NODE_NAME_OFFSET 2 | |
1108 | #define CC_IDX_PROP_NAME_OFFSET 2 | |
1109 | #define CC_IDX_PROP_LEN 3 | |
1110 | #define CC_IDX_PROP_DATA_OFFSET 4 | |
1111 | #define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4) | |
1112 | #define CC_WA_LEN 4096 | |
1113 | ||
1114 | static void configure_connector_st(target_ulong addr, target_ulong offset, | |
1115 | const void *buf, size_t len) | |
1116 | { | |
1117 | cpu_physical_memory_write(ppc64_phys_to_real(addr + offset), | |
1118 | buf, MIN(len, CC_WA_LEN - offset)); | |
1119 | } | |
1120 | ||
b89b3d39 | 1121 | static void rtas_ibm_configure_connector(PowerPCCPU *cpu, |
ce2918cb | 1122 | SpaprMachineState *spapr, |
b89b3d39 DG |
1123 | uint32_t token, uint32_t nargs, |
1124 | target_ulong args, uint32_t nret, | |
1125 | target_ulong rets) | |
1126 | { | |
1127 | uint64_t wa_addr; | |
1128 | uint64_t wa_offset; | |
1129 | uint32_t drc_index; | |
ce2918cb DG |
1130 | SpaprDrc *drc; |
1131 | SpaprDrcClass *drck; | |
1132 | SpaprDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE; | |
b89b3d39 | 1133 | int rc; |
b89b3d39 DG |
1134 | |
1135 | if (nargs != 2 || nret != 1) { | |
1136 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
1137 | return; | |
1138 | } | |
1139 | ||
1140 | wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0); | |
1141 | ||
1142 | drc_index = rtas_ld(wa_addr, 0); | |
fbf55397 | 1143 | drc = spapr_drc_by_index(drc_index); |
b89b3d39 DG |
1144 | if (!drc) { |
1145 | trace_spapr_rtas_ibm_configure_connector_invalid(drc_index); | |
1146 | rc = RTAS_OUT_PARAM_ERROR; | |
1147 | goto out; | |
1148 | } | |
1149 | ||
9d4c0f4f | 1150 | if ((drc->state != SPAPR_DRC_STATE_LOGICAL_UNISOLATE) |
188bfe1b BR |
1151 | && (drc->state != SPAPR_DRC_STATE_PHYSICAL_UNISOLATE) |
1152 | && (drc->state != SPAPR_DRC_STATE_LOGICAL_CONFIGURED) | |
1153 | && (drc->state != SPAPR_DRC_STATE_PHYSICAL_CONFIGURED)) { | |
1154 | /* | |
1155 | * Need to unisolate the device before configuring | |
1156 | * or it should already be in configured state to | |
1157 | * allow configure-connector be called repeatedly. | |
1158 | */ | |
b89b3d39 DG |
1159 | rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE; |
1160 | goto out; | |
1161 | } | |
1162 | ||
9d4c0f4f DG |
1163 | drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); |
1164 | ||
d9c95c71 GK |
1165 | if (!drc->fdt) { |
1166 | Error *local_err = NULL; | |
1167 | void *fdt; | |
1168 | int fdt_size; | |
1169 | ||
1170 | fdt = create_device_tree(&fdt_size); | |
1171 | ||
1172 | if (drck->dt_populate(drc, spapr, fdt, &drc->fdt_start_offset, | |
1173 | &local_err)) { | |
1174 | g_free(fdt); | |
1175 | error_free(local_err); | |
1176 | rc = SPAPR_DR_CC_RESPONSE_ERROR; | |
1177 | goto out; | |
1178 | } | |
1179 | ||
1180 | drc->fdt = fdt; | |
1181 | drc->ccs_offset = drc->fdt_start_offset; | |
1182 | drc->ccs_depth = 0; | |
1183 | } | |
1184 | ||
b89b3d39 DG |
1185 | do { |
1186 | uint32_t tag; | |
1187 | const char *name; | |
1188 | const struct fdt_property *prop; | |
1189 | int fdt_offset_next, prop_len; | |
1190 | ||
4445b1d2 | 1191 | tag = fdt_next_tag(drc->fdt, drc->ccs_offset, &fdt_offset_next); |
b89b3d39 DG |
1192 | |
1193 | switch (tag) { | |
1194 | case FDT_BEGIN_NODE: | |
4445b1d2 DG |
1195 | drc->ccs_depth++; |
1196 | name = fdt_get_name(drc->fdt, drc->ccs_offset, NULL); | |
b89b3d39 DG |
1197 | |
1198 | /* provide the name of the next OF node */ | |
1199 | wa_offset = CC_VAL_DATA_OFFSET; | |
1200 | rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset); | |
1201 | configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1); | |
1202 | resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD; | |
1203 | break; | |
1204 | case FDT_END_NODE: | |
4445b1d2 DG |
1205 | drc->ccs_depth--; |
1206 | if (drc->ccs_depth == 0) { | |
0b55aa91 | 1207 | uint32_t drc_index = spapr_drc_index(drc); |
9d4c0f4f DG |
1208 | |
1209 | /* done sending the device tree, move to configured state */ | |
0b55aa91 | 1210 | trace_spapr_drc_set_configured(drc_index); |
9d4c0f4f | 1211 | drc->state = drck->ready_state; |
188bfe1b BR |
1212 | /* |
1213 | * Ensure that we are able to send the FDT fragment | |
1214 | * again via configure-connector call if the guest requests. | |
1215 | */ | |
1216 | drc->ccs_offset = drc->fdt_start_offset; | |
1217 | drc->ccs_depth = 0; | |
1218 | fdt_offset_next = drc->fdt_start_offset; | |
b89b3d39 DG |
1219 | resp = SPAPR_DR_CC_RESPONSE_SUCCESS; |
1220 | } else { | |
1221 | resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT; | |
1222 | } | |
1223 | break; | |
1224 | case FDT_PROP: | |
4445b1d2 | 1225 | prop = fdt_get_property_by_offset(drc->fdt, drc->ccs_offset, |
b89b3d39 | 1226 | &prop_len); |
88af6ea5 | 1227 | name = fdt_string(drc->fdt, fdt32_to_cpu(prop->nameoff)); |
b89b3d39 DG |
1228 | |
1229 | /* provide the name of the next OF property */ | |
1230 | wa_offset = CC_VAL_DATA_OFFSET; | |
1231 | rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset); | |
1232 | configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1); | |
1233 | ||
1234 | /* provide the length and value of the OF property. data gets | |
1235 | * placed immediately after NULL terminator of the OF property's | |
1236 | * name string | |
1237 | */ | |
1238 | wa_offset += strlen(name) + 1, | |
1239 | rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len); | |
1240 | rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset); | |
1241 | configure_connector_st(wa_addr, wa_offset, prop->data, prop_len); | |
1242 | resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY; | |
1243 | break; | |
1244 | case FDT_END: | |
1245 | resp = SPAPR_DR_CC_RESPONSE_ERROR; | |
1246 | default: | |
1247 | /* keep seeking for an actionable tag */ | |
1248 | break; | |
1249 | } | |
4445b1d2 DG |
1250 | if (drc->ccs_offset >= 0) { |
1251 | drc->ccs_offset = fdt_offset_next; | |
b89b3d39 DG |
1252 | } |
1253 | } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE); | |
1254 | ||
1255 | rc = resp; | |
1256 | out: | |
1257 | rtas_st(rets, 0, rc); | |
1258 | } | |
1259 | ||
1260 | static void spapr_drc_register_types(void) | |
1261 | { | |
1262 | type_register_static(&spapr_dr_connector_info); | |
2d335818 DG |
1263 | type_register_static(&spapr_drc_physical_info); |
1264 | type_register_static(&spapr_drc_logical_info); | |
1265 | type_register_static(&spapr_drc_cpu_info); | |
1266 | type_register_static(&spapr_drc_pci_info); | |
1267 | type_register_static(&spapr_drc_lmb_info); | |
962b6c36 | 1268 | type_register_static(&spapr_drc_phb_info); |
ee3a71e3 | 1269 | type_register_static(&spapr_drc_pmem_info); |
b89b3d39 DG |
1270 | |
1271 | spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator", | |
1272 | rtas_set_indicator); | |
1273 | spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state", | |
1274 | rtas_get_sensor_state); | |
1275 | spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector", | |
1276 | rtas_ibm_configure_connector); | |
1277 | } | |
1278 | type_init(spapr_drc_register_types) |