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spapr: Add a return value to spapr_drc_attach()
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CommitLineData
bbf5c878
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1/*
2 * QEMU SPAPR Dynamic Reconfiguration Connector Implementation
3 *
4 * Copyright IBM Corp. 2014
5 *
6 * Authors:
7 * Michael Roth <mdroth@linux.vnet.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
0d75590d 13#include "qemu/osdep.h"
da34e65c 14#include "qapi/error.h"
15280c36 15#include "qapi/qmp/qnull.h"
4771d756 16#include "cpu.h"
f348b6d1 17#include "qemu/cutils.h"
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18#include "hw/ppc/spapr_drc.h"
19#include "qom/object.h"
d6454270 20#include "migration/vmstate.h"
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21#include "qapi/visitor.h"
22#include "qemu/error-report.h"
0cb688d2 23#include "hw/ppc/spapr.h" /* for RTAS return codes */
31834723 24#include "hw/pci-host/spapr.h" /* spapr_phb_remove_pci_device_cb callback */
ee3a71e3 25#include "hw/ppc/spapr_nvdimm.h"
d9c95c71 26#include "sysemu/device_tree.h"
71e8a915 27#include "sysemu/reset.h"
24ac7755 28#include "trace.h"
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29
30#define DRC_CONTAINER_PATH "/dr-connector"
31#define DRC_INDEX_TYPE_SHIFT 28
627c2ef7 32#define DRC_INDEX_ID_MASK ((1ULL << DRC_INDEX_TYPE_SHIFT) - 1)
bbf5c878 33
ce2918cb 34SpaprDrcType spapr_drc_type(SpaprDrc *drc)
2d335818 35{
ce2918cb 36 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818
DG
37
38 return 1 << drck->typeshift;
39}
40
ce2918cb 41uint32_t spapr_drc_index(SpaprDrc *drc)
bbf5c878 42{
ce2918cb 43 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818 44
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45 /* no set format for a drc index: it only needs to be globally
46 * unique. this is how we encode the DRC type on bare-metal
47 * however, so might as well do that here
48 */
2d335818
DG
49 return (drck->typeshift << DRC_INDEX_TYPE_SHIFT)
50 | (drc->id & DRC_INDEX_ID_MASK);
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51}
52
ce2918cb 53static uint32_t drc_isolate_physical(SpaprDrc *drc)
bbf5c878 54{
9d4c0f4f
DG
55 switch (drc->state) {
56 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
57 return RTAS_OUT_SUCCESS; /* Nothing to do */
58 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
59 break; /* see below */
60 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
61 return RTAS_OUT_PARAM_ERROR; /* not allowed */
62 default:
63 g_assert_not_reached();
64 }
65
9d4c0f4f 66 drc->state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
0dfabd39 67
f1c52354 68 if (drc->unplug_requested) {
0dfabd39 69 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
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70 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
71 spapr_drc_detach(drc);
9d1852ce 72 }
0dfabd39
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73
74 return RTAS_OUT_SUCCESS;
75}
76
ce2918cb 77static uint32_t drc_unisolate_physical(SpaprDrc *drc)
0dfabd39 78{
9d4c0f4f
DG
79 switch (drc->state) {
80 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
81 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
82 return RTAS_OUT_SUCCESS; /* Nothing to do */
83 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
84 break; /* see below */
85 default:
86 g_assert_not_reached();
87 }
88
0dfabd39
DG
89 /* cannot unisolate a non-existent resource, and, or resources
90 * which are in an 'UNUSABLE' allocation state. (PAPR 2.7,
91 * 13.5.3.5)
92 */
93 if (!drc->dev) {
94 return RTAS_OUT_NO_SUCH_INDICATOR;
95 }
96
9d4c0f4f 97 drc->state = SPAPR_DRC_STATE_PHYSICAL_UNISOLATE;
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98 drc->ccs_offset = drc->fdt_start_offset;
99 drc->ccs_depth = 0;
0dfabd39
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100
101 return RTAS_OUT_SUCCESS;
102}
103
ce2918cb 104static uint32_t drc_isolate_logical(SpaprDrc *drc)
0dfabd39 105{
9d4c0f4f
DG
106 switch (drc->state) {
107 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
108 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
109 return RTAS_OUT_SUCCESS; /* Nothing to do */
110 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
111 break; /* see below */
112 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
113 return RTAS_OUT_PARAM_ERROR; /* not allowed */
114 default:
115 g_assert_not_reached();
116 }
117
cf632463
BR
118 /*
119 * Fail any requests to ISOLATE the LMB DRC if this LMB doesn't
120 * belong to a DIMM device that is marked for removal.
121 *
122 * Currently the guest userspace tool drmgr that drives the memory
123 * hotplug/unplug will just try to remove a set of 'removable' LMBs
124 * in response to a hot unplug request that is based on drc-count.
125 * If the LMB being removed doesn't belong to a DIMM device that is
126 * actually being unplugged, fail the isolation request here.
127 */
0dfabd39 128 if (spapr_drc_type(drc) == SPAPR_DR_CONNECTOR_TYPE_LMB
f1c52354 129 && !drc->unplug_requested) {
0dfabd39 130 return RTAS_OUT_HW_ERROR;
cf632463
BR
131 }
132
9d4c0f4f 133 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
bbf5c878 134
0dfabd39
DG
135 /* if we're awaiting release, but still in an unconfigured state,
136 * it's likely the guest is still in the process of configuring
137 * the device and is transitioning the devices to an ISOLATED
138 * state as a part of that process. so we only complete the
139 * removal when this transition happens for a device in a
140 * configured state, as suggested by the state diagram from PAPR+
141 * 2.7, 13.4
142 */
f1c52354 143 if (drc->unplug_requested) {
0dfabd39 144 uint32_t drc_index = spapr_drc_index(drc);
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DG
145 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
146 spapr_drc_detach(drc);
bbf5c878 147 }
0dfabd39
DG
148 return RTAS_OUT_SUCCESS;
149}
150
ce2918cb 151static uint32_t drc_unisolate_logical(SpaprDrc *drc)
0dfabd39 152{
9d4c0f4f
DG
153 switch (drc->state) {
154 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
155 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
156 return RTAS_OUT_SUCCESS; /* Nothing to do */
157 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
158 break; /* see below */
159 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
160 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
161 default:
162 g_assert_not_reached();
0dfabd39
DG
163 }
164
9d4c0f4f
DG
165 /* Move to AVAILABLE state should have ensured device was present */
166 g_assert(drc->dev);
bbf5c878 167
9d4c0f4f 168 drc->state = SPAPR_DRC_STATE_LOGICAL_UNISOLATE;
4445b1d2
DG
169 drc->ccs_offset = drc->fdt_start_offset;
170 drc->ccs_depth = 0;
171
0cb688d2 172 return RTAS_OUT_SUCCESS;
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173}
174
ce2918cb 175static uint32_t drc_set_usable(SpaprDrc *drc)
bbf5c878 176{
9d4c0f4f
DG
177 switch (drc->state) {
178 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
179 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
180 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
181 return RTAS_OUT_SUCCESS; /* Nothing to do */
182 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
183 break; /* see below */
184 default:
185 g_assert_not_reached();
186 }
187
61736732
DG
188 /* if there's no resource/device associated with the DRC, there's
189 * no way for us to put it in an allocation state consistent with
190 * being 'USABLE'. PAPR 2.7, 13.5.3.4 documents that this should
191 * result in an RTAS return code of -3 / "no such indicator"
192 */
193 if (!drc->dev) {
194 return RTAS_OUT_NO_SUCH_INDICATOR;
195 }
f1c52354 196 if (drc->unplug_requested) {
82a93a1d
DG
197 /* Don't allow the guest to move a device away from UNUSABLE
198 * state when we want to unplug it */
61736732 199 return RTAS_OUT_NO_SUCH_INDICATOR;
9d1852ce
MR
200 }
201
9d4c0f4f 202 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
61736732
DG
203
204 return RTAS_OUT_SUCCESS;
205}
206
ce2918cb 207static uint32_t drc_set_unusable(SpaprDrc *drc)
61736732 208{
9d4c0f4f
DG
209 switch (drc->state) {
210 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
211 return RTAS_OUT_SUCCESS; /* Nothing to do */
212 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
213 break; /* see below */
214 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
215 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
216 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
217 default:
218 g_assert_not_reached();
219 }
220
221 drc->state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f1c52354 222 if (drc->unplug_requested) {
61736732
DG
223 uint32_t drc_index = spapr_drc_index(drc);
224 trace_spapr_drc_set_allocation_state_finalizing(drc_index);
a8dc47fd 225 spapr_drc_detach(drc);
bbf5c878 226 }
61736732 227
0cb688d2 228 return RTAS_OUT_SUCCESS;
bbf5c878
MR
229}
230
dbd26f2f 231static char *spapr_drc_name(SpaprDrc *drc)
bbf5c878 232{
ce2918cb 233 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
79808336
DG
234
235 /* human-readable name for a DRC to encode into the DT
236 * description. this is mainly only used within a guest in place
237 * of the unique DRC index.
238 *
239 * in the case of VIO/PCI devices, it corresponds to a "location
240 * code" that maps a logical device/function (DRC index) to a
241 * physical (or virtual in the case of VIO) location in the system
242 * by chaining together the "location label" for each
243 * encapsulating component.
244 *
245 * since this is more to do with diagnosing physical hardware
246 * issues than guest compatibility, we choose location codes/DRC
247 * names that adhere to the documented format, but avoid encoding
248 * the entire topology information into the label/code, instead
249 * just using the location codes based on the labels for the
250 * endpoints (VIO/PCI adaptor connectors), which is basically just
251 * "C" followed by an integer ID.
252 *
253 * DRC names as documented by PAPR+ v2.7, 13.5.2.4
254 * location codes as documented by PAPR+ v2.7, 12.3.1.5
255 */
256 return g_strdup_printf("%s%d", drck->drc_name_prefix, drc->id);
bbf5c878
MR
257}
258
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259/*
260 * dr-entity-sense sensor value
261 * returned via get-sensor-state RTAS calls
262 * as expected by state diagram in PAPR+ 2.7, 13.4
263 * based on the current allocation/indicator/power states
264 * for the DR connector.
265 */
ce2918cb 266static SpaprDREntitySense physical_entity_sense(SpaprDrc *drc)
bbf5c878 267{
f224d35b
DG
268 /* this assumes all PCI devices are assigned to a 'live insertion'
269 * power domain, where QEMU manages power state automatically as
270 * opposed to the guest. present, non-PCI resources are unaffected
271 * by power state.
272 */
273 return drc->dev ? SPAPR_DR_ENTITY_SENSE_PRESENT
274 : SPAPR_DR_ENTITY_SENSE_EMPTY;
275}
276
ce2918cb 277static SpaprDREntitySense logical_entity_sense(SpaprDrc *drc)
f224d35b 278{
9d4c0f4f
DG
279 switch (drc->state) {
280 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
f224d35b 281 return SPAPR_DR_ENTITY_SENSE_UNUSABLE;
9d4c0f4f
DG
282 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
283 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
284 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
285 g_assert(drc->dev);
286 return SPAPR_DR_ENTITY_SENSE_PRESENT;
287 default:
288 g_assert_not_reached();
bbf5c878 289 }
bbf5c878
MR
290}
291
d7bce999
EB
292static void prop_get_index(Object *obj, Visitor *v, const char *name,
293 void *opaque, Error **errp)
bbf5c878 294{
ce2918cb 295 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
0b55aa91 296 uint32_t value = spapr_drc_index(drc);
51e72bc1 297 visit_type_uint32(v, name, &value, errp);
bbf5c878
MR
298}
299
d7bce999
EB
300static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
301 void *opaque, Error **errp)
bbf5c878 302{
ce2918cb 303 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
d2f95f4d 304 QNull *null = NULL;
c75304a1 305 Error *err = NULL;
bbf5c878
MR
306 int fdt_offset_next, fdt_offset, fdt_depth;
307 void *fdt;
308
309 if (!drc->fdt) {
d2f95f4d 310 visit_type_null(v, NULL, &null, errp);
cb3e7f08 311 qobject_unref(null);
bbf5c878
MR
312 return;
313 }
314
315 fdt = drc->fdt;
316 fdt_offset = drc->fdt_start_offset;
317 fdt_depth = 0;
318
319 do {
320 const char *name = NULL;
321 const struct fdt_property *prop = NULL;
322 int prop_len = 0, name_len = 0;
323 uint32_t tag;
324
325 tag = fdt_next_tag(fdt, fdt_offset, &fdt_offset_next);
326 switch (tag) {
327 case FDT_BEGIN_NODE:
328 fdt_depth++;
329 name = fdt_get_name(fdt, fdt_offset, &name_len);
668f62ec 330 if (!visit_start_struct(v, name, NULL, 0, errp)) {
c75304a1
MA
331 return;
332 }
bbf5c878
MR
333 break;
334 case FDT_END_NODE:
335 /* shouldn't ever see an FDT_END_NODE before FDT_BEGIN_NODE */
336 g_assert(fdt_depth > 0);
15c2f669 337 visit_check_struct(v, &err);
1158bb2a 338 visit_end_struct(v, NULL);
c75304a1
MA
339 if (err) {
340 error_propagate(errp, err);
341 return;
342 }
bbf5c878
MR
343 fdt_depth--;
344 break;
345 case FDT_PROP: {
346 int i;
347 prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len);
348 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
668f62ec 349 if (!visit_start_list(v, name, NULL, 0, errp)) {
c75304a1
MA
350 return;
351 }
bbf5c878 352 for (i = 0; i < prop_len; i++) {
62a35aaa 353 if (!visit_type_uint8(v, NULL, (uint8_t *)&prop->data[i],
668f62ec 354 errp)) {
c75304a1
MA
355 return;
356 }
357 }
a4a1c70d 358 visit_check_list(v, &err);
1158bb2a 359 visit_end_list(v, NULL);
a4a1c70d
MA
360 if (err) {
361 error_propagate(errp, err);
362 return;
363 }
bbf5c878
MR
364 break;
365 }
366 default:
e20c6314
PMD
367 error_report("device FDT in unexpected state: %d", tag);
368 abort();
bbf5c878
MR
369 }
370 fdt_offset = fdt_offset_next;
371 } while (fdt_depth != 0);
372}
373
17548fe6 374bool spapr_drc_attach(SpaprDrc *drc, DeviceState *d, Error **errp)
bbf5c878 375{
0b55aa91 376 trace_spapr_drc_attach(spapr_drc_index(drc));
bbf5c878 377
9d4c0f4f 378 if (drc->dev) {
bbf5c878 379 error_setg(errp, "an attached device is still awaiting release");
17548fe6 380 return false;
bbf5c878 381 }
9d4c0f4f
DG
382 g_assert((drc->state == SPAPR_DRC_STATE_LOGICAL_UNUSABLE)
383 || (drc->state == SPAPR_DRC_STATE_PHYSICAL_POWERON));
bbf5c878 384
bbf5c878 385 drc->dev = d;
d9c95c71 386
bbf5c878
MR
387 object_property_add_link(OBJECT(drc), "device",
388 object_get_typename(OBJECT(drc->dev)),
389 (Object **)(&drc->dev),
d2623129 390 NULL, 0);
17548fe6 391 return true;
bbf5c878
MR
392}
393
ce2918cb 394static void spapr_drc_release(SpaprDrc *drc)
bbf5c878 395{
ce2918cb 396 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
6b762f29
DG
397
398 drck->release(drc->dev);
bbf5c878 399
f1c52354 400 drc->unplug_requested = false;
bbf5c878
MR
401 g_free(drc->fdt);
402 drc->fdt = NULL;
403 drc->fdt_start_offset = 0;
df4fe0b2 404 object_property_del(OBJECT(drc), "device");
bbf5c878 405 drc->dev = NULL;
bbf5c878
MR
406}
407
ce2918cb 408void spapr_drc_detach(SpaprDrc *drc)
9c914e53 409{
ce2918cb 410 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 411
9c914e53
DG
412 trace_spapr_drc_detach(spapr_drc_index(drc));
413
9d4c0f4f 414 g_assert(drc->dev);
a8dc47fd 415
9d4c0f4f 416 drc->unplug_requested = true;
9c914e53 417
9d4c0f4f
DG
418 if (drc->state != drck->empty_state) {
419 trace_spapr_drc_awaiting_quiesce(spapr_drc_index(drc));
9c914e53
DG
420 return;
421 }
422
9c914e53
DG
423 spapr_drc_release(drc);
424}
425
ce2918cb 426void spapr_drc_reset(SpaprDrc *drc)
bbf5c878 427{
ce2918cb 428 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 429
0b55aa91 430 trace_spapr_drc_reset(spapr_drc_index(drc));
b8fdd530 431
bbf5c878 432 /* immediately upon reset we can safely assume DRCs whose devices
4f9242fc 433 * are pending removal can be safely removed.
bbf5c878 434 */
f1c52354 435 if (drc->unplug_requested) {
4f9242fc
DG
436 spapr_drc_release(drc);
437 }
438
4f9242fc 439 if (drc->dev) {
9d4c0f4f
DG
440 /* A device present at reset is ready to go, same as coldplugged */
441 drc->state = drck->ready_state;
188bfe1b
BR
442 /*
443 * Ensure that we are able to send the FDT fragment again
444 * via configure-connector call if the guest requests.
445 */
446 drc->ccs_offset = drc->fdt_start_offset;
447 drc->ccs_depth = 0;
4f9242fc 448 } else {
9d4c0f4f 449 drc->state = drck->empty_state;
188bfe1b
BR
450 drc->ccs_offset = -1;
451 drc->ccs_depth = -1;
bbf5c878
MR
452 }
453}
454
ab858434
GK
455static bool spapr_drc_unplug_requested_needed(void *opaque)
456{
457 return spapr_drc_unplug_requested(opaque);
458}
459
460static const VMStateDescription vmstate_spapr_drc_unplug_requested = {
461 .name = "spapr_drc/unplug_requested",
462 .version_id = 1,
463 .minimum_version_id = 1,
464 .needed = spapr_drc_unplug_requested_needed,
465 .fields = (VMStateField []) {
466 VMSTATE_BOOL(unplug_requested, SpaprDrc),
467 VMSTATE_END_OF_LIST()
468 }
469};
470
4b63db12 471bool spapr_drc_transient(SpaprDrc *drc)
a50919dd 472{
ce2918cb 473 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
a50919dd 474
4b63db12
GK
475 /*
476 * If no dev is plugged in there is no need to migrate the DRC state
477 * nor to reset the DRC at CAS.
478 */
c618e300 479 if (!drc->dev) {
a50919dd
DHB
480 return false;
481 }
482
483 /*
4b63db12
GK
484 * We need to reset the DRC at CAS or to migrate the DRC state if it's
485 * not equal to the expected long-term state, which is the same as the
ab858434 486 * coldplugged initial state, or if an unplug request is pending.
4b63db12 487 */
ab858434
GK
488 return drc->state != drck->ready_state ||
489 spapr_drc_unplug_requested(drc);
a50919dd
DHB
490}
491
4b63db12
GK
492static bool spapr_drc_needed(void *opaque)
493{
494 return spapr_drc_transient(opaque);
495}
496
a50919dd
DHB
497static const VMStateDescription vmstate_spapr_drc = {
498 .name = "spapr_drc",
499 .version_id = 1,
500 .minimum_version_id = 1,
501 .needed = spapr_drc_needed,
502 .fields = (VMStateField []) {
ce2918cb 503 VMSTATE_UINT32(state, SpaprDrc),
a50919dd 504 VMSTATE_END_OF_LIST()
ab858434
GK
505 },
506 .subsections = (const VMStateDescription * []) {
507 &vmstate_spapr_drc_unplug_requested,
508 NULL
a50919dd
DHB
509 }
510};
511
bbf5c878
MR
512static void realize(DeviceState *d, Error **errp)
513{
ce2918cb 514 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 515 Object *root_container;
f5babeac 516 gchar *link_name;
7a309cc9 517 const char *child_name;
bbf5c878 518
0b55aa91 519 trace_spapr_drc_realize(spapr_drc_index(drc));
bbf5c878
MR
520 /* NOTE: we do this as part of realize/unrealize due to the fact
521 * that the guest will communicate with the DRC via RTAS calls
522 * referencing the global DRC index. By unlinking the DRC
523 * from DRC_CONTAINER_PATH/<drc_index> we effectively make it
524 * inaccessible by the guest, since lookups rely on this path
525 * existing in the composition tree
526 */
527 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 528 link_name = g_strdup_printf("%x", spapr_drc_index(drc));
bbf5c878 529 child_name = object_get_canonical_path_component(OBJECT(drc));
0b55aa91 530 trace_spapr_drc_realize_child(spapr_drc_index(drc), child_name);
bbf5c878 531 object_property_add_alias(root_container, link_name,
d2623129 532 drc->owner, child_name);
f5babeac 533 g_free(link_name);
3cad405b 534 vmstate_register(VMSTATE_IF(drc), spapr_drc_index(drc), &vmstate_spapr_drc,
a50919dd 535 drc);
0b55aa91 536 trace_spapr_drc_realize_complete(spapr_drc_index(drc));
bbf5c878
MR
537}
538
b69c3c21 539static void unrealize(DeviceState *d)
bbf5c878 540{
ce2918cb 541 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 542 Object *root_container;
f5babeac 543 gchar *name;
bbf5c878 544
0b55aa91 545 trace_spapr_drc_unrealize(spapr_drc_index(drc));
3cad405b 546 vmstate_unregister(VMSTATE_IF(drc), &vmstate_spapr_drc, drc);
bbf5c878 547 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 548 name = g_strdup_printf("%x", spapr_drc_index(drc));
df4fe0b2 549 object_property_del(root_container, name);
f5babeac 550 g_free(name);
bbf5c878
MR
551}
552
ce2918cb 553SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type,
bbf5c878
MR
554 uint32_t id)
555{
ce2918cb 556 SpaprDrc *drc = SPAPR_DR_CONNECTOR(object_new(type));
94649d42 557 char *prop_name;
bbf5c878 558
bbf5c878
MR
559 drc->id = id;
560 drc->owner = owner;
0b55aa91
DG
561 prop_name = g_strdup_printf("dr-connector[%"PRIu32"]",
562 spapr_drc_index(drc));
d2623129 563 object_property_add_child(owner, prop_name, OBJECT(drc));
f3f41030 564 object_unref(OBJECT(drc));
ce189ab2 565 qdev_realize(DEVICE(drc), NULL, NULL);
94649d42 566 g_free(prop_name);
bbf5c878 567
bbf5c878
MR
568 return drc;
569}
570
571static void spapr_dr_connector_instance_init(Object *obj)
572{
ce2918cb
DG
573 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
574 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
bbf5c878 575
d2623129 576 object_property_add_uint32_ptr(obj, "id", &drc->id, OBJ_PROP_FLAG_READ);
bbf5c878 577 object_property_add(obj, "index", "uint32", prop_get_index,
d2623129 578 NULL, NULL, NULL);
bbf5c878 579 object_property_add(obj, "fdt", "struct", prop_get_fdt,
d2623129 580 NULL, NULL, NULL);
9d4c0f4f 581 drc->state = drck->empty_state;
bbf5c878
MR
582}
583
584static void spapr_dr_connector_class_init(ObjectClass *k, void *data)
585{
586 DeviceClass *dk = DEVICE_CLASS(k);
bbf5c878 587
bbf5c878
MR
588 dk->realize = realize;
589 dk->unrealize = unrealize;
c401ae8c
MA
590 /*
591 * Reason: it crashes FIXME find and document the real reason
592 */
e90f2a8c 593 dk->user_creatable = false;
bbf5c878
MR
594}
595
67fea71b
DG
596static bool drc_physical_needed(void *opaque)
597{
ce2918cb
DG
598 SpaprDrcPhysical *drcp = (SpaprDrcPhysical *)opaque;
599 SpaprDrc *drc = SPAPR_DR_CONNECTOR(drcp);
67fea71b
DG
600
601 if ((drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_ACTIVE))
602 || (!drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_INACTIVE))) {
603 return false;
604 }
605 return true;
606}
607
608static const VMStateDescription vmstate_spapr_drc_physical = {
609 .name = "spapr_drc/physical",
610 .version_id = 1,
611 .minimum_version_id = 1,
612 .needed = drc_physical_needed,
613 .fields = (VMStateField []) {
ce2918cb 614 VMSTATE_UINT32(dr_indicator, SpaprDrcPhysical),
67fea71b
DG
615 VMSTATE_END_OF_LIST()
616 }
617};
618
619static void drc_physical_reset(void *opaque)
620{
ce2918cb
DG
621 SpaprDrc *drc = SPAPR_DR_CONNECTOR(opaque);
622 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(drc);
67fea71b
DG
623
624 if (drc->dev) {
625 drcp->dr_indicator = SPAPR_DR_INDICATOR_ACTIVE;
626 } else {
627 drcp->dr_indicator = SPAPR_DR_INDICATOR_INACTIVE;
628 }
629}
630
631static void realize_physical(DeviceState *d, Error **errp)
632{
ce2918cb 633 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
67fea71b
DG
634 Error *local_err = NULL;
635
636 realize(d, &local_err);
637 if (local_err) {
638 error_propagate(errp, local_err);
639 return;
640 }
641
3cad405b
MAL
642 vmstate_register(VMSTATE_IF(drcp),
643 spapr_drc_index(SPAPR_DR_CONNECTOR(drcp)),
67fea71b
DG
644 &vmstate_spapr_drc_physical, drcp);
645 qemu_register_reset(drc_physical_reset, drcp);
646}
647
b69c3c21 648static void unrealize_physical(DeviceState *d)
379ae096 649{
ce2918cb 650 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
379ae096 651
b69c3c21 652 unrealize(d);
3cad405b 653 vmstate_unregister(VMSTATE_IF(drcp), &vmstate_spapr_drc_physical, drcp);
379ae096
GK
654 qemu_unregister_reset(drc_physical_reset, drcp);
655}
656
f224d35b
DG
657static void spapr_drc_physical_class_init(ObjectClass *k, void *data)
658{
67fea71b 659 DeviceClass *dk = DEVICE_CLASS(k);
ce2918cb 660 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b 661
67fea71b 662 dk->realize = realize_physical;
379ae096 663 dk->unrealize = unrealize_physical;
f224d35b 664 drck->dr_entity_sense = physical_entity_sense;
0dfabd39
DG
665 drck->isolate = drc_isolate_physical;
666 drck->unisolate = drc_unisolate_physical;
9d4c0f4f
DG
667 drck->ready_state = SPAPR_DRC_STATE_PHYSICAL_CONFIGURED;
668 drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
f224d35b
DG
669}
670
671static void spapr_drc_logical_class_init(ObjectClass *k, void *data)
672{
ce2918cb 673 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b
DG
674
675 drck->dr_entity_sense = logical_entity_sense;
0dfabd39
DG
676 drck->isolate = drc_isolate_logical;
677 drck->unisolate = drc_unisolate_logical;
9d4c0f4f
DG
678 drck->ready_state = SPAPR_DRC_STATE_LOGICAL_CONFIGURED;
679 drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f224d35b
DG
680}
681
2d335818
DG
682static void spapr_drc_cpu_class_init(ObjectClass *k, void *data)
683{
ce2918cb 684 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
685
686 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_CPU;
1693ea16 687 drck->typename = "CPU";
79808336 688 drck->drc_name_prefix = "CPU ";
6b762f29 689 drck->release = spapr_core_release;
345b12b9 690 drck->dt_populate = spapr_core_dt_populate;
2d335818
DG
691}
692
693static void spapr_drc_pci_class_init(ObjectClass *k, void *data)
694{
ce2918cb 695 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
696
697 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PCI;
1693ea16 698 drck->typename = "28";
79808336 699 drck->drc_name_prefix = "C";
6b762f29 700 drck->release = spapr_phb_remove_pci_device_cb;
46fd0299 701 drck->dt_populate = spapr_pci_dt_populate;
2d335818
DG
702}
703
704static void spapr_drc_lmb_class_init(ObjectClass *k, void *data)
705{
ce2918cb 706 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
707
708 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_LMB;
1693ea16 709 drck->typename = "MEM";
79808336 710 drck->drc_name_prefix = "LMB ";
6b762f29 711 drck->release = spapr_lmb_release;
62d38c9b 712 drck->dt_populate = spapr_lmb_dt_populate;
2d335818
DG
713}
714
962b6c36
MR
715static void spapr_drc_phb_class_init(ObjectClass *k, void *data)
716{
ce2918cb 717 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
962b6c36
MR
718
719 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PHB;
720 drck->typename = "PHB";
721 drck->drc_name_prefix = "PHB ";
bb2bdd81
GK
722 drck->release = spapr_phb_release;
723 drck->dt_populate = spapr_phb_dt_populate;
962b6c36
MR
724}
725
ee3a71e3
SB
726static void spapr_drc_pmem_class_init(ObjectClass *k, void *data)
727{
728 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
729
730 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PMEM;
731 drck->typename = "PMEM";
732 drck->drc_name_prefix = "PMEM ";
733 drck->release = NULL;
734 drck->dt_populate = spapr_pmem_dt_populate;
735}
736
bbf5c878
MR
737static const TypeInfo spapr_dr_connector_info = {
738 .name = TYPE_SPAPR_DR_CONNECTOR,
739 .parent = TYPE_DEVICE,
ce2918cb 740 .instance_size = sizeof(SpaprDrc),
bbf5c878 741 .instance_init = spapr_dr_connector_instance_init,
ce2918cb 742 .class_size = sizeof(SpaprDrcClass),
bbf5c878 743 .class_init = spapr_dr_connector_class_init,
2d335818
DG
744 .abstract = true,
745};
746
747static const TypeInfo spapr_drc_physical_info = {
748 .name = TYPE_SPAPR_DRC_PHYSICAL,
749 .parent = TYPE_SPAPR_DR_CONNECTOR,
ce2918cb 750 .instance_size = sizeof(SpaprDrcPhysical),
f224d35b 751 .class_init = spapr_drc_physical_class_init,
2d335818
DG
752 .abstract = true,
753};
754
755static const TypeInfo spapr_drc_logical_info = {
756 .name = TYPE_SPAPR_DRC_LOGICAL,
757 .parent = TYPE_SPAPR_DR_CONNECTOR,
f224d35b 758 .class_init = spapr_drc_logical_class_init,
2d335818
DG
759 .abstract = true,
760};
761
762static const TypeInfo spapr_drc_cpu_info = {
763 .name = TYPE_SPAPR_DRC_CPU,
764 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818
DG
765 .class_init = spapr_drc_cpu_class_init,
766};
767
768static const TypeInfo spapr_drc_pci_info = {
769 .name = TYPE_SPAPR_DRC_PCI,
770 .parent = TYPE_SPAPR_DRC_PHYSICAL,
2d335818
DG
771 .class_init = spapr_drc_pci_class_init,
772};
773
774static const TypeInfo spapr_drc_lmb_info = {
775 .name = TYPE_SPAPR_DRC_LMB,
776 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818 777 .class_init = spapr_drc_lmb_class_init,
bbf5c878
MR
778};
779
962b6c36
MR
780static const TypeInfo spapr_drc_phb_info = {
781 .name = TYPE_SPAPR_DRC_PHB,
782 .parent = TYPE_SPAPR_DRC_LOGICAL,
ce2918cb 783 .instance_size = sizeof(SpaprDrc),
962b6c36
MR
784 .class_init = spapr_drc_phb_class_init,
785};
786
ee3a71e3
SB
787static const TypeInfo spapr_drc_pmem_info = {
788 .name = TYPE_SPAPR_DRC_PMEM,
789 .parent = TYPE_SPAPR_DRC_LOGICAL,
790 .class_init = spapr_drc_pmem_class_init,
791};
792
bbf5c878
MR
793/* helper functions for external users */
794
ce2918cb 795SpaprDrc *spapr_drc_by_index(uint32_t index)
bbf5c878
MR
796{
797 Object *obj;
f5babeac 798 gchar *name;
bbf5c878 799
f5babeac 800 name = g_strdup_printf("%s/%x", DRC_CONTAINER_PATH, index);
bbf5c878 801 obj = object_resolve_path(name, NULL);
f5babeac 802 g_free(name);
bbf5c878
MR
803
804 return !obj ? NULL : SPAPR_DR_CONNECTOR(obj);
805}
806
ce2918cb 807SpaprDrc *spapr_drc_by_id(const char *type, uint32_t id)
bbf5c878 808{
ce2918cb 809 SpaprDrcClass *drck
fbf55397
DG
810 = SPAPR_DR_CONNECTOR_CLASS(object_class_by_name(type));
811
812 return spapr_drc_by_index(drck->typeshift << DRC_INDEX_TYPE_SHIFT
813 | (id & DRC_INDEX_ID_MASK));
bbf5c878 814}
e4b798bb 815
e4b798bb 816/**
9e7d38e8 817 * spapr_dt_drc
e4b798bb
MR
818 *
819 * @fdt: libfdt device tree
820 * @path: path in the DT to generate properties
821 * @owner: parent Object/DeviceState for which to generate DRC
822 * descriptions for
ce2918cb 823 * @drc_type_mask: mask of SpaprDrcType values corresponding
e4b798bb
MR
824 * to the types of DRCs to generate entries for
825 *
826 * generate OF properties to describe DRC topology/indices to guests
827 *
828 * as documented in PAPR+ v2.1, 13.5.2
829 */
9e7d38e8 830int spapr_dt_drc(void *fdt, int offset, Object *owner, uint32_t drc_type_mask)
e4b798bb
MR
831{
832 Object *root_container;
833 ObjectProperty *prop;
7746abd8 834 ObjectPropertyIterator iter;
e4b798bb
MR
835 uint32_t drc_count = 0;
836 GArray *drc_indexes, *drc_power_domains;
837 GString *drc_names, *drc_types;
838 int ret;
839
840 /* the first entry of each properties is a 32-bit integer encoding
841 * the number of elements in the array. we won't know this until
842 * we complete the iteration through all the matching DRCs, but
843 * reserve the space now and set the offsets accordingly so we
844 * can fill them in later.
845 */
846 drc_indexes = g_array_new(false, true, sizeof(uint32_t));
847 drc_indexes = g_array_set_size(drc_indexes, 1);
848 drc_power_domains = g_array_new(false, true, sizeof(uint32_t));
849 drc_power_domains = g_array_set_size(drc_power_domains, 1);
850 drc_names = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
851 drc_types = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
852
853 /* aliases for all DRConnector objects will be rooted in QOM
854 * composition tree at DRC_CONTAINER_PATH
855 */
856 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
857
7746abd8
DB
858 object_property_iter_init(&iter, root_container);
859 while ((prop = object_property_iter_next(&iter))) {
e4b798bb 860 Object *obj;
ce2918cb
DG
861 SpaprDrc *drc;
862 SpaprDrcClass *drck;
dbd26f2f 863 char *drc_name = NULL;
e4b798bb
MR
864 uint32_t drc_index, drc_power_domain;
865
866 if (!strstart(prop->type, "link<", NULL)) {
867 continue;
868 }
869
552d7f49
MA
870 obj = object_property_get_link(root_container, prop->name,
871 &error_abort);
e4b798bb
MR
872 drc = SPAPR_DR_CONNECTOR(obj);
873 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
874
875 if (owner && (drc->owner != owner)) {
876 continue;
877 }
878
2d335818 879 if ((spapr_drc_type(drc) & drc_type_mask) == 0) {
e4b798bb
MR
880 continue;
881 }
882
883 drc_count++;
884
885 /* ibm,drc-indexes */
0b55aa91 886 drc_index = cpu_to_be32(spapr_drc_index(drc));
e4b798bb
MR
887 g_array_append_val(drc_indexes, drc_index);
888
889 /* ibm,drc-power-domains */
890 drc_power_domain = cpu_to_be32(-1);
891 g_array_append_val(drc_power_domains, drc_power_domain);
892
893 /* ibm,drc-names */
dbd26f2f
SB
894 drc_name = spapr_drc_name(drc);
895 drc_names = g_string_append(drc_names, drc_name);
e4b798bb 896 drc_names = g_string_insert_len(drc_names, -1, "\0", 1);
dbd26f2f 897 g_free(drc_name);
e4b798bb
MR
898
899 /* ibm,drc-types */
1693ea16 900 drc_types = g_string_append(drc_types, drck->typename);
e4b798bb
MR
901 drc_types = g_string_insert_len(drc_types, -1, "\0", 1);
902 }
903
904 /* now write the drc count into the space we reserved at the
905 * beginning of the arrays previously
906 */
907 *(uint32_t *)drc_indexes->data = cpu_to_be32(drc_count);
908 *(uint32_t *)drc_power_domains->data = cpu_to_be32(drc_count);
909 *(uint32_t *)drc_names->str = cpu_to_be32(drc_count);
910 *(uint32_t *)drc_types->str = cpu_to_be32(drc_count);
911
9e7d38e8 912 ret = fdt_setprop(fdt, offset, "ibm,drc-indexes",
e4b798bb
MR
913 drc_indexes->data,
914 drc_indexes->len * sizeof(uint32_t));
915 if (ret) {
ce9863b7 916 error_report("Couldn't create ibm,drc-indexes property");
e4b798bb
MR
917 goto out;
918 }
919
9e7d38e8 920 ret = fdt_setprop(fdt, offset, "ibm,drc-power-domains",
e4b798bb
MR
921 drc_power_domains->data,
922 drc_power_domains->len * sizeof(uint32_t));
923 if (ret) {
ce9863b7 924 error_report("Couldn't finalize ibm,drc-power-domains property");
e4b798bb
MR
925 goto out;
926 }
927
9e7d38e8 928 ret = fdt_setprop(fdt, offset, "ibm,drc-names",
e4b798bb
MR
929 drc_names->str, drc_names->len);
930 if (ret) {
ce9863b7 931 error_report("Couldn't finalize ibm,drc-names property");
e4b798bb
MR
932 goto out;
933 }
934
9e7d38e8 935 ret = fdt_setprop(fdt, offset, "ibm,drc-types",
e4b798bb
MR
936 drc_types->str, drc_types->len);
937 if (ret) {
ce9863b7 938 error_report("Couldn't finalize ibm,drc-types property");
e4b798bb
MR
939 goto out;
940 }
941
942out:
943 g_array_free(drc_indexes, true);
944 g_array_free(drc_power_domains, true);
945 g_string_free(drc_names, true);
946 g_string_free(drc_types, true);
947
948 return ret;
949}
b89b3d39
DG
950
951/*
952 * RTAS calls
953 */
954
7b7258f8 955static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state)
b89b3d39 956{
ce2918cb
DG
957 SpaprDrc *drc = spapr_drc_by_index(idx);
958 SpaprDrcClass *drck;
7b7258f8
DG
959
960 if (!drc) {
0dfabd39 961 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
962 }
963
0dfabd39
DG
964 trace_spapr_drc_set_isolation_state(spapr_drc_index(drc), state);
965
7b7258f8 966 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
0dfabd39
DG
967
968 switch (state) {
969 case SPAPR_DR_ISOLATION_STATE_ISOLATED:
970 return drck->isolate(drc);
971
972 case SPAPR_DR_ISOLATION_STATE_UNISOLATED:
973 return drck->unisolate(drc);
974
975 default:
976 return RTAS_OUT_PARAM_ERROR;
977 }
b89b3d39
DG
978}
979
7b7258f8 980static uint32_t rtas_set_allocation_state(uint32_t idx, uint32_t state)
b89b3d39 981{
ce2918cb 982 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 983
61736732
DG
984 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_LOGICAL)) {
985 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
986 }
987
61736732
DG
988 trace_spapr_drc_set_allocation_state(spapr_drc_index(drc), state);
989
990 switch (state) {
991 case SPAPR_DR_ALLOCATION_STATE_USABLE:
992 return drc_set_usable(drc);
993
994 case SPAPR_DR_ALLOCATION_STATE_UNUSABLE:
995 return drc_set_unusable(drc);
996
997 default:
998 return RTAS_OUT_PARAM_ERROR;
999 }
7b7258f8 1000}
b89b3d39 1001
cd74d27e 1002static uint32_t rtas_set_dr_indicator(uint32_t idx, uint32_t state)
7b7258f8 1003{
ce2918cb 1004 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 1005
67fea71b
DG
1006 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_PHYSICAL)) {
1007 return RTAS_OUT_NO_SUCH_INDICATOR;
1008 }
1009 if ((state != SPAPR_DR_INDICATOR_INACTIVE)
1010 && (state != SPAPR_DR_INDICATOR_ACTIVE)
1011 && (state != SPAPR_DR_INDICATOR_IDENTIFY)
1012 && (state != SPAPR_DR_INDICATOR_ACTION)) {
1013 return RTAS_OUT_PARAM_ERROR; /* bad state parameter */
7b7258f8
DG
1014 }
1015
cd74d27e 1016 trace_spapr_drc_set_dr_indicator(idx, state);
67fea71b 1017 SPAPR_DRC_PHYSICAL(drc)->dr_indicator = state;
cd74d27e 1018 return RTAS_OUT_SUCCESS;
7b7258f8
DG
1019}
1020
ce2918cb 1021static void rtas_set_indicator(PowerPCCPU *cpu, SpaprMachineState *spapr,
7b7258f8
DG
1022 uint32_t token,
1023 uint32_t nargs, target_ulong args,
1024 uint32_t nret, target_ulong rets)
1025{
1026 uint32_t type, idx, state;
1027 uint32_t ret = RTAS_OUT_SUCCESS;
1028
1029 if (nargs != 3 || nret != 1) {
b89b3d39
DG
1030 ret = RTAS_OUT_PARAM_ERROR;
1031 goto out;
1032 }
b89b3d39 1033
7b7258f8
DG
1034 type = rtas_ld(args, 0);
1035 idx = rtas_ld(args, 1);
1036 state = rtas_ld(args, 2);
1037
1038 switch (type) {
b89b3d39 1039 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
7b7258f8 1040 ret = rtas_set_isolation_state(idx, state);
b89b3d39
DG
1041 break;
1042 case RTAS_SENSOR_TYPE_DR:
cd74d27e 1043 ret = rtas_set_dr_indicator(idx, state);
b89b3d39
DG
1044 break;
1045 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
7b7258f8 1046 ret = rtas_set_allocation_state(idx, state);
b89b3d39
DG
1047 break;
1048 default:
7b7258f8 1049 ret = RTAS_OUT_NOT_SUPPORTED;
b89b3d39
DG
1050 }
1051
1052out:
1053 rtas_st(rets, 0, ret);
b89b3d39
DG
1054}
1055
ce2918cb 1056static void rtas_get_sensor_state(PowerPCCPU *cpu, SpaprMachineState *spapr,
b89b3d39
DG
1057 uint32_t token, uint32_t nargs,
1058 target_ulong args, uint32_t nret,
1059 target_ulong rets)
1060{
1061 uint32_t sensor_type;
1062 uint32_t sensor_index;
1063 uint32_t sensor_state = 0;
ce2918cb
DG
1064 SpaprDrc *drc;
1065 SpaprDrcClass *drck;
b89b3d39
DG
1066 uint32_t ret = RTAS_OUT_SUCCESS;
1067
1068 if (nargs != 2 || nret != 2) {
1069 ret = RTAS_OUT_PARAM_ERROR;
1070 goto out;
1071 }
1072
1073 sensor_type = rtas_ld(args, 0);
1074 sensor_index = rtas_ld(args, 1);
1075
1076 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) {
1077 /* currently only DR-related sensors are implemented */
1078 trace_spapr_rtas_get_sensor_state_not_supported(sensor_index,
1079 sensor_type);
1080 ret = RTAS_OUT_NOT_SUPPORTED;
1081 goto out;
1082 }
1083
fbf55397 1084 drc = spapr_drc_by_index(sensor_index);
b89b3d39
DG
1085 if (!drc) {
1086 trace_spapr_rtas_get_sensor_state_invalid(sensor_index);
1087 ret = RTAS_OUT_PARAM_ERROR;
1088 goto out;
1089 }
1090 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
f224d35b 1091 sensor_state = drck->dr_entity_sense(drc);
b89b3d39
DG
1092
1093out:
1094 rtas_st(rets, 0, ret);
1095 rtas_st(rets, 1, sensor_state);
1096}
1097
1098/* configure-connector work area offsets, int32_t units for field
1099 * indexes, bytes for field offset/len values.
1100 *
1101 * as documented by PAPR+ v2.7, 13.5.3.5
1102 */
1103#define CC_IDX_NODE_NAME_OFFSET 2
1104#define CC_IDX_PROP_NAME_OFFSET 2
1105#define CC_IDX_PROP_LEN 3
1106#define CC_IDX_PROP_DATA_OFFSET 4
1107#define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4)
1108#define CC_WA_LEN 4096
1109
1110static void configure_connector_st(target_ulong addr, target_ulong offset,
1111 const void *buf, size_t len)
1112{
1113 cpu_physical_memory_write(ppc64_phys_to_real(addr + offset),
1114 buf, MIN(len, CC_WA_LEN - offset));
1115}
1116
b89b3d39 1117static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
ce2918cb 1118 SpaprMachineState *spapr,
b89b3d39
DG
1119 uint32_t token, uint32_t nargs,
1120 target_ulong args, uint32_t nret,
1121 target_ulong rets)
1122{
1123 uint64_t wa_addr;
1124 uint64_t wa_offset;
1125 uint32_t drc_index;
ce2918cb
DG
1126 SpaprDrc *drc;
1127 SpaprDrcClass *drck;
1128 SpaprDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE;
b89b3d39 1129 int rc;
b89b3d39
DG
1130
1131 if (nargs != 2 || nret != 1) {
1132 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
1133 return;
1134 }
1135
1136 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0);
1137
1138 drc_index = rtas_ld(wa_addr, 0);
fbf55397 1139 drc = spapr_drc_by_index(drc_index);
b89b3d39
DG
1140 if (!drc) {
1141 trace_spapr_rtas_ibm_configure_connector_invalid(drc_index);
1142 rc = RTAS_OUT_PARAM_ERROR;
1143 goto out;
1144 }
1145
9d4c0f4f 1146 if ((drc->state != SPAPR_DRC_STATE_LOGICAL_UNISOLATE)
188bfe1b
BR
1147 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_UNISOLATE)
1148 && (drc->state != SPAPR_DRC_STATE_LOGICAL_CONFIGURED)
1149 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_CONFIGURED)) {
1150 /*
1151 * Need to unisolate the device before configuring
1152 * or it should already be in configured state to
1153 * allow configure-connector be called repeatedly.
1154 */
b89b3d39
DG
1155 rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE;
1156 goto out;
1157 }
1158
9d4c0f4f
DG
1159 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
1160
d9c95c71 1161 if (!drc->fdt) {
d9c95c71
GK
1162 void *fdt;
1163 int fdt_size;
1164
1165 fdt = create_device_tree(&fdt_size);
1166
1167 if (drck->dt_populate(drc, spapr, fdt, &drc->fdt_start_offset,
9261ef5e 1168 NULL)) {
d9c95c71 1169 g_free(fdt);
d9c95c71
GK
1170 rc = SPAPR_DR_CC_RESPONSE_ERROR;
1171 goto out;
1172 }
1173
1174 drc->fdt = fdt;
1175 drc->ccs_offset = drc->fdt_start_offset;
1176 drc->ccs_depth = 0;
1177 }
1178
b89b3d39
DG
1179 do {
1180 uint32_t tag;
1181 const char *name;
1182 const struct fdt_property *prop;
1183 int fdt_offset_next, prop_len;
1184
4445b1d2 1185 tag = fdt_next_tag(drc->fdt, drc->ccs_offset, &fdt_offset_next);
b89b3d39
DG
1186
1187 switch (tag) {
1188 case FDT_BEGIN_NODE:
4445b1d2
DG
1189 drc->ccs_depth++;
1190 name = fdt_get_name(drc->fdt, drc->ccs_offset, NULL);
b89b3d39
DG
1191
1192 /* provide the name of the next OF node */
1193 wa_offset = CC_VAL_DATA_OFFSET;
1194 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset);
1195 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1196 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD;
1197 break;
1198 case FDT_END_NODE:
4445b1d2
DG
1199 drc->ccs_depth--;
1200 if (drc->ccs_depth == 0) {
0b55aa91 1201 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
1202
1203 /* done sending the device tree, move to configured state */
0b55aa91 1204 trace_spapr_drc_set_configured(drc_index);
9d4c0f4f 1205 drc->state = drck->ready_state;
188bfe1b
BR
1206 /*
1207 * Ensure that we are able to send the FDT fragment
1208 * again via configure-connector call if the guest requests.
1209 */
1210 drc->ccs_offset = drc->fdt_start_offset;
1211 drc->ccs_depth = 0;
1212 fdt_offset_next = drc->fdt_start_offset;
b89b3d39
DG
1213 resp = SPAPR_DR_CC_RESPONSE_SUCCESS;
1214 } else {
1215 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT;
1216 }
1217 break;
1218 case FDT_PROP:
4445b1d2 1219 prop = fdt_get_property_by_offset(drc->fdt, drc->ccs_offset,
b89b3d39 1220 &prop_len);
88af6ea5 1221 name = fdt_string(drc->fdt, fdt32_to_cpu(prop->nameoff));
b89b3d39
DG
1222
1223 /* provide the name of the next OF property */
1224 wa_offset = CC_VAL_DATA_OFFSET;
1225 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset);
1226 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1227
1228 /* provide the length and value of the OF property. data gets
1229 * placed immediately after NULL terminator of the OF property's
1230 * name string
1231 */
1232 wa_offset += strlen(name) + 1,
1233 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len);
1234 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset);
1235 configure_connector_st(wa_addr, wa_offset, prop->data, prop_len);
1236 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY;
1237 break;
1238 case FDT_END:
1239 resp = SPAPR_DR_CC_RESPONSE_ERROR;
1240 default:
1241 /* keep seeking for an actionable tag */
1242 break;
1243 }
4445b1d2
DG
1244 if (drc->ccs_offset >= 0) {
1245 drc->ccs_offset = fdt_offset_next;
b89b3d39
DG
1246 }
1247 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE);
1248
1249 rc = resp;
1250out:
1251 rtas_st(rets, 0, rc);
1252}
1253
1254static void spapr_drc_register_types(void)
1255{
1256 type_register_static(&spapr_dr_connector_info);
2d335818
DG
1257 type_register_static(&spapr_drc_physical_info);
1258 type_register_static(&spapr_drc_logical_info);
1259 type_register_static(&spapr_drc_cpu_info);
1260 type_register_static(&spapr_drc_pci_info);
1261 type_register_static(&spapr_drc_lmb_info);
962b6c36 1262 type_register_static(&spapr_drc_phb_info);
ee3a71e3 1263 type_register_static(&spapr_drc_pmem_info);
b89b3d39
DG
1264
1265 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator",
1266 rtas_set_indicator);
1267 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state",
1268 rtas_get_sensor_state);
1269 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector",
1270 rtas_ibm_configure_connector);
1271}
1272type_init(spapr_drc_register_types)