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spapr: Clean up dt creation for PCI buses
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CommitLineData
bbf5c878
MR
1/*
2 * QEMU SPAPR Dynamic Reconfiguration Connector Implementation
3 *
4 * Copyright IBM Corp. 2014
5 *
6 * Authors:
7 * Michael Roth <mdroth@linux.vnet.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
0d75590d 13#include "qemu/osdep.h"
da34e65c 14#include "qapi/error.h"
15280c36 15#include "qapi/qmp/qnull.h"
4771d756 16#include "cpu.h"
f348b6d1 17#include "qemu/cutils.h"
bbf5c878
MR
18#include "hw/ppc/spapr_drc.h"
19#include "qom/object.h"
20#include "hw/qdev.h"
21#include "qapi/visitor.h"
22#include "qemu/error-report.h"
0cb688d2 23#include "hw/ppc/spapr.h" /* for RTAS return codes */
31834723 24#include "hw/pci-host/spapr.h" /* spapr_phb_remove_pci_device_cb callback */
d9c95c71 25#include "sysemu/device_tree.h"
24ac7755 26#include "trace.h"
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MR
27
28#define DRC_CONTAINER_PATH "/dr-connector"
29#define DRC_INDEX_TYPE_SHIFT 28
627c2ef7 30#define DRC_INDEX_ID_MASK ((1ULL << DRC_INDEX_TYPE_SHIFT) - 1)
bbf5c878 31
ce2918cb 32SpaprDrcType spapr_drc_type(SpaprDrc *drc)
2d335818 33{
ce2918cb 34 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818
DG
35
36 return 1 << drck->typeshift;
37}
38
ce2918cb 39uint32_t spapr_drc_index(SpaprDrc *drc)
bbf5c878 40{
ce2918cb 41 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818 42
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MR
43 /* no set format for a drc index: it only needs to be globally
44 * unique. this is how we encode the DRC type on bare-metal
45 * however, so might as well do that here
46 */
2d335818
DG
47 return (drck->typeshift << DRC_INDEX_TYPE_SHIFT)
48 | (drc->id & DRC_INDEX_ID_MASK);
bbf5c878
MR
49}
50
ce2918cb 51static uint32_t drc_isolate_physical(SpaprDrc *drc)
bbf5c878 52{
9d4c0f4f
DG
53 switch (drc->state) {
54 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
55 return RTAS_OUT_SUCCESS; /* Nothing to do */
56 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
57 break; /* see below */
58 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
59 return RTAS_OUT_PARAM_ERROR; /* not allowed */
60 default:
61 g_assert_not_reached();
62 }
63
9d4c0f4f 64 drc->state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
0dfabd39 65
f1c52354 66 if (drc->unplug_requested) {
0dfabd39 67 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
68 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
69 spapr_drc_detach(drc);
9d1852ce 70 }
0dfabd39
DG
71
72 return RTAS_OUT_SUCCESS;
73}
74
ce2918cb 75static uint32_t drc_unisolate_physical(SpaprDrc *drc)
0dfabd39 76{
9d4c0f4f
DG
77 switch (drc->state) {
78 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
79 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
80 return RTAS_OUT_SUCCESS; /* Nothing to do */
81 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
82 break; /* see below */
83 default:
84 g_assert_not_reached();
85 }
86
0dfabd39
DG
87 /* cannot unisolate a non-existent resource, and, or resources
88 * which are in an 'UNUSABLE' allocation state. (PAPR 2.7,
89 * 13.5.3.5)
90 */
91 if (!drc->dev) {
92 return RTAS_OUT_NO_SUCH_INDICATOR;
93 }
94
9d4c0f4f 95 drc->state = SPAPR_DRC_STATE_PHYSICAL_UNISOLATE;
4445b1d2
DG
96 drc->ccs_offset = drc->fdt_start_offset;
97 drc->ccs_depth = 0;
0dfabd39
DG
98
99 return RTAS_OUT_SUCCESS;
100}
101
ce2918cb 102static uint32_t drc_isolate_logical(SpaprDrc *drc)
0dfabd39 103{
9d4c0f4f
DG
104 switch (drc->state) {
105 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
106 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
107 return RTAS_OUT_SUCCESS; /* Nothing to do */
108 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
109 break; /* see below */
110 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
111 return RTAS_OUT_PARAM_ERROR; /* not allowed */
112 default:
113 g_assert_not_reached();
114 }
115
cf632463
BR
116 /*
117 * Fail any requests to ISOLATE the LMB DRC if this LMB doesn't
118 * belong to a DIMM device that is marked for removal.
119 *
120 * Currently the guest userspace tool drmgr that drives the memory
121 * hotplug/unplug will just try to remove a set of 'removable' LMBs
122 * in response to a hot unplug request that is based on drc-count.
123 * If the LMB being removed doesn't belong to a DIMM device that is
124 * actually being unplugged, fail the isolation request here.
125 */
0dfabd39 126 if (spapr_drc_type(drc) == SPAPR_DR_CONNECTOR_TYPE_LMB
f1c52354 127 && !drc->unplug_requested) {
0dfabd39 128 return RTAS_OUT_HW_ERROR;
cf632463
BR
129 }
130
9d4c0f4f 131 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
bbf5c878 132
0dfabd39
DG
133 /* if we're awaiting release, but still in an unconfigured state,
134 * it's likely the guest is still in the process of configuring
135 * the device and is transitioning the devices to an ISOLATED
136 * state as a part of that process. so we only complete the
137 * removal when this transition happens for a device in a
138 * configured state, as suggested by the state diagram from PAPR+
139 * 2.7, 13.4
140 */
f1c52354 141 if (drc->unplug_requested) {
0dfabd39 142 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
143 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
144 spapr_drc_detach(drc);
bbf5c878 145 }
0dfabd39
DG
146 return RTAS_OUT_SUCCESS;
147}
148
ce2918cb 149static uint32_t drc_unisolate_logical(SpaprDrc *drc)
0dfabd39 150{
9d4c0f4f
DG
151 switch (drc->state) {
152 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
153 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
154 return RTAS_OUT_SUCCESS; /* Nothing to do */
155 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
156 break; /* see below */
157 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
158 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
159 default:
160 g_assert_not_reached();
0dfabd39
DG
161 }
162
9d4c0f4f
DG
163 /* Move to AVAILABLE state should have ensured device was present */
164 g_assert(drc->dev);
bbf5c878 165
9d4c0f4f 166 drc->state = SPAPR_DRC_STATE_LOGICAL_UNISOLATE;
4445b1d2
DG
167 drc->ccs_offset = drc->fdt_start_offset;
168 drc->ccs_depth = 0;
169
0cb688d2 170 return RTAS_OUT_SUCCESS;
bbf5c878
MR
171}
172
ce2918cb 173static uint32_t drc_set_usable(SpaprDrc *drc)
bbf5c878 174{
9d4c0f4f
DG
175 switch (drc->state) {
176 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
177 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
178 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
179 return RTAS_OUT_SUCCESS; /* Nothing to do */
180 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
181 break; /* see below */
182 default:
183 g_assert_not_reached();
184 }
185
61736732
DG
186 /* if there's no resource/device associated with the DRC, there's
187 * no way for us to put it in an allocation state consistent with
188 * being 'USABLE'. PAPR 2.7, 13.5.3.4 documents that this should
189 * result in an RTAS return code of -3 / "no such indicator"
190 */
191 if (!drc->dev) {
192 return RTAS_OUT_NO_SUCH_INDICATOR;
193 }
f1c52354 194 if (drc->unplug_requested) {
82a93a1d
DG
195 /* Don't allow the guest to move a device away from UNUSABLE
196 * state when we want to unplug it */
61736732 197 return RTAS_OUT_NO_SUCH_INDICATOR;
9d1852ce
MR
198 }
199
9d4c0f4f 200 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
61736732
DG
201
202 return RTAS_OUT_SUCCESS;
203}
204
ce2918cb 205static uint32_t drc_set_unusable(SpaprDrc *drc)
61736732 206{
9d4c0f4f
DG
207 switch (drc->state) {
208 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
209 return RTAS_OUT_SUCCESS; /* Nothing to do */
210 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
211 break; /* see below */
212 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
213 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
214 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
215 default:
216 g_assert_not_reached();
217 }
218
219 drc->state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f1c52354 220 if (drc->unplug_requested) {
61736732
DG
221 uint32_t drc_index = spapr_drc_index(drc);
222 trace_spapr_drc_set_allocation_state_finalizing(drc_index);
a8dc47fd 223 spapr_drc_detach(drc);
bbf5c878 224 }
61736732 225
0cb688d2 226 return RTAS_OUT_SUCCESS;
bbf5c878
MR
227}
228
ce2918cb 229static const char *spapr_drc_name(SpaprDrc *drc)
bbf5c878 230{
ce2918cb 231 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
79808336
DG
232
233 /* human-readable name for a DRC to encode into the DT
234 * description. this is mainly only used within a guest in place
235 * of the unique DRC index.
236 *
237 * in the case of VIO/PCI devices, it corresponds to a "location
238 * code" that maps a logical device/function (DRC index) to a
239 * physical (or virtual in the case of VIO) location in the system
240 * by chaining together the "location label" for each
241 * encapsulating component.
242 *
243 * since this is more to do with diagnosing physical hardware
244 * issues than guest compatibility, we choose location codes/DRC
245 * names that adhere to the documented format, but avoid encoding
246 * the entire topology information into the label/code, instead
247 * just using the location codes based on the labels for the
248 * endpoints (VIO/PCI adaptor connectors), which is basically just
249 * "C" followed by an integer ID.
250 *
251 * DRC names as documented by PAPR+ v2.7, 13.5.2.4
252 * location codes as documented by PAPR+ v2.7, 12.3.1.5
253 */
254 return g_strdup_printf("%s%d", drck->drc_name_prefix, drc->id);
bbf5c878
MR
255}
256
bbf5c878
MR
257/*
258 * dr-entity-sense sensor value
259 * returned via get-sensor-state RTAS calls
260 * as expected by state diagram in PAPR+ 2.7, 13.4
261 * based on the current allocation/indicator/power states
262 * for the DR connector.
263 */
ce2918cb 264static SpaprDREntitySense physical_entity_sense(SpaprDrc *drc)
bbf5c878 265{
f224d35b
DG
266 /* this assumes all PCI devices are assigned to a 'live insertion'
267 * power domain, where QEMU manages power state automatically as
268 * opposed to the guest. present, non-PCI resources are unaffected
269 * by power state.
270 */
271 return drc->dev ? SPAPR_DR_ENTITY_SENSE_PRESENT
272 : SPAPR_DR_ENTITY_SENSE_EMPTY;
273}
274
ce2918cb 275static SpaprDREntitySense logical_entity_sense(SpaprDrc *drc)
f224d35b 276{
9d4c0f4f
DG
277 switch (drc->state) {
278 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
f224d35b 279 return SPAPR_DR_ENTITY_SENSE_UNUSABLE;
9d4c0f4f
DG
280 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
281 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
282 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
283 g_assert(drc->dev);
284 return SPAPR_DR_ENTITY_SENSE_PRESENT;
285 default:
286 g_assert_not_reached();
bbf5c878 287 }
bbf5c878
MR
288}
289
d7bce999
EB
290static void prop_get_index(Object *obj, Visitor *v, const char *name,
291 void *opaque, Error **errp)
bbf5c878 292{
ce2918cb 293 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
0b55aa91 294 uint32_t value = spapr_drc_index(drc);
51e72bc1 295 visit_type_uint32(v, name, &value, errp);
bbf5c878
MR
296}
297
d7bce999
EB
298static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
299 void *opaque, Error **errp)
bbf5c878 300{
ce2918cb 301 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
d2f95f4d 302 QNull *null = NULL;
c75304a1 303 Error *err = NULL;
bbf5c878
MR
304 int fdt_offset_next, fdt_offset, fdt_depth;
305 void *fdt;
306
307 if (!drc->fdt) {
d2f95f4d 308 visit_type_null(v, NULL, &null, errp);
cb3e7f08 309 qobject_unref(null);
bbf5c878
MR
310 return;
311 }
312
313 fdt = drc->fdt;
314 fdt_offset = drc->fdt_start_offset;
315 fdt_depth = 0;
316
317 do {
318 const char *name = NULL;
319 const struct fdt_property *prop = NULL;
320 int prop_len = 0, name_len = 0;
321 uint32_t tag;
322
323 tag = fdt_next_tag(fdt, fdt_offset, &fdt_offset_next);
324 switch (tag) {
325 case FDT_BEGIN_NODE:
326 fdt_depth++;
327 name = fdt_get_name(fdt, fdt_offset, &name_len);
337283df 328 visit_start_struct(v, name, NULL, 0, &err);
c75304a1
MA
329 if (err) {
330 error_propagate(errp, err);
331 return;
332 }
bbf5c878
MR
333 break;
334 case FDT_END_NODE:
335 /* shouldn't ever see an FDT_END_NODE before FDT_BEGIN_NODE */
336 g_assert(fdt_depth > 0);
15c2f669 337 visit_check_struct(v, &err);
1158bb2a 338 visit_end_struct(v, NULL);
c75304a1
MA
339 if (err) {
340 error_propagate(errp, err);
341 return;
342 }
bbf5c878
MR
343 fdt_depth--;
344 break;
345 case FDT_PROP: {
346 int i;
347 prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len);
348 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
d9f62dde 349 visit_start_list(v, name, NULL, 0, &err);
c75304a1
MA
350 if (err) {
351 error_propagate(errp, err);
352 return;
353 }
bbf5c878 354 for (i = 0; i < prop_len; i++) {
51e72bc1 355 visit_type_uint8(v, NULL, (uint8_t *)&prop->data[i], &err);
c75304a1
MA
356 if (err) {
357 error_propagate(errp, err);
358 return;
359 }
360 }
a4a1c70d 361 visit_check_list(v, &err);
1158bb2a 362 visit_end_list(v, NULL);
a4a1c70d
MA
363 if (err) {
364 error_propagate(errp, err);
365 return;
366 }
bbf5c878
MR
367 break;
368 }
369 default:
e20c6314
PMD
370 error_report("device FDT in unexpected state: %d", tag);
371 abort();
bbf5c878
MR
372 }
373 fdt_offset = fdt_offset_next;
374 } while (fdt_depth != 0);
375}
376
ce2918cb 377void spapr_drc_attach(SpaprDrc *drc, DeviceState *d, Error **errp)
bbf5c878 378{
0b55aa91 379 trace_spapr_drc_attach(spapr_drc_index(drc));
bbf5c878 380
9d4c0f4f 381 if (drc->dev) {
bbf5c878
MR
382 error_setg(errp, "an attached device is still awaiting release");
383 return;
384 }
9d4c0f4f
DG
385 g_assert((drc->state == SPAPR_DRC_STATE_LOGICAL_UNUSABLE)
386 || (drc->state == SPAPR_DRC_STATE_PHYSICAL_POWERON));
bbf5c878 387
bbf5c878 388 drc->dev = d;
d9c95c71 389
bbf5c878
MR
390 object_property_add_link(OBJECT(drc), "device",
391 object_get_typename(OBJECT(drc->dev)),
392 (Object **)(&drc->dev),
393 NULL, 0, NULL);
394}
395
ce2918cb 396static void spapr_drc_release(SpaprDrc *drc)
bbf5c878 397{
ce2918cb 398 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
6b762f29
DG
399
400 drck->release(drc->dev);
bbf5c878 401
f1c52354 402 drc->unplug_requested = false;
bbf5c878
MR
403 g_free(drc->fdt);
404 drc->fdt = NULL;
405 drc->fdt_start_offset = 0;
ba50822f 406 object_property_del(OBJECT(drc), "device", &error_abort);
bbf5c878 407 drc->dev = NULL;
bbf5c878
MR
408}
409
ce2918cb 410void spapr_drc_detach(SpaprDrc *drc)
9c914e53 411{
ce2918cb 412 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 413
9c914e53
DG
414 trace_spapr_drc_detach(spapr_drc_index(drc));
415
9d4c0f4f 416 g_assert(drc->dev);
a8dc47fd 417
9d4c0f4f 418 drc->unplug_requested = true;
9c914e53 419
9d4c0f4f
DG
420 if (drc->state != drck->empty_state) {
421 trace_spapr_drc_awaiting_quiesce(spapr_drc_index(drc));
9c914e53
DG
422 return;
423 }
424
9c914e53
DG
425 spapr_drc_release(drc);
426}
427
ce2918cb 428void spapr_drc_reset(SpaprDrc *drc)
bbf5c878 429{
ce2918cb 430 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 431
0b55aa91 432 trace_spapr_drc_reset(spapr_drc_index(drc));
b8fdd530 433
bbf5c878 434 /* immediately upon reset we can safely assume DRCs whose devices
4f9242fc 435 * are pending removal can be safely removed.
bbf5c878 436 */
f1c52354 437 if (drc->unplug_requested) {
4f9242fc
DG
438 spapr_drc_release(drc);
439 }
440
4f9242fc 441 if (drc->dev) {
9d4c0f4f
DG
442 /* A device present at reset is ready to go, same as coldplugged */
443 drc->state = drck->ready_state;
188bfe1b
BR
444 /*
445 * Ensure that we are able to send the FDT fragment again
446 * via configure-connector call if the guest requests.
447 */
448 drc->ccs_offset = drc->fdt_start_offset;
449 drc->ccs_depth = 0;
4f9242fc 450 } else {
9d4c0f4f 451 drc->state = drck->empty_state;
188bfe1b
BR
452 drc->ccs_offset = -1;
453 drc->ccs_depth = -1;
bbf5c878
MR
454 }
455}
456
10f12e64 457bool spapr_drc_needed(void *opaque)
a50919dd 458{
ce2918cb
DG
459 SpaprDrc *drc = (SpaprDrc *)opaque;
460 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
a50919dd
DHB
461
462 /* If no dev is plugged in there is no need to migrate the DRC state */
c618e300 463 if (!drc->dev) {
a50919dd
DHB
464 return false;
465 }
466
467 /*
9d4c0f4f
DG
468 * We need to migrate the state if it's not equal to the expected
469 * long-term state, which is the same as the coldplugged initial
470 * state */
471 return (drc->state != drck->ready_state);
a50919dd
DHB
472}
473
474static const VMStateDescription vmstate_spapr_drc = {
475 .name = "spapr_drc",
476 .version_id = 1,
477 .minimum_version_id = 1,
478 .needed = spapr_drc_needed,
479 .fields = (VMStateField []) {
ce2918cb 480 VMSTATE_UINT32(state, SpaprDrc),
a50919dd
DHB
481 VMSTATE_END_OF_LIST()
482 }
483};
484
bbf5c878
MR
485static void realize(DeviceState *d, Error **errp)
486{
ce2918cb 487 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 488 Object *root_container;
f5babeac 489 gchar *link_name;
bbf5c878
MR
490 gchar *child_name;
491 Error *err = NULL;
492
0b55aa91 493 trace_spapr_drc_realize(spapr_drc_index(drc));
bbf5c878
MR
494 /* NOTE: we do this as part of realize/unrealize due to the fact
495 * that the guest will communicate with the DRC via RTAS calls
496 * referencing the global DRC index. By unlinking the DRC
497 * from DRC_CONTAINER_PATH/<drc_index> we effectively make it
498 * inaccessible by the guest, since lookups rely on this path
499 * existing in the composition tree
500 */
501 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 502 link_name = g_strdup_printf("%x", spapr_drc_index(drc));
bbf5c878 503 child_name = object_get_canonical_path_component(OBJECT(drc));
0b55aa91 504 trace_spapr_drc_realize_child(spapr_drc_index(drc), child_name);
bbf5c878
MR
505 object_property_add_alias(root_container, link_name,
506 drc->owner, child_name, &err);
bf26ae32 507 g_free(child_name);
f5babeac 508 g_free(link_name);
bbf5c878 509 if (err) {
bf26ae32
GK
510 error_propagate(errp, err);
511 return;
bbf5c878 512 }
0b55aa91 513 vmstate_register(DEVICE(drc), spapr_drc_index(drc), &vmstate_spapr_drc,
a50919dd 514 drc);
0b55aa91 515 trace_spapr_drc_realize_complete(spapr_drc_index(drc));
bbf5c878
MR
516}
517
518static void unrealize(DeviceState *d, Error **errp)
519{
ce2918cb 520 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 521 Object *root_container;
f5babeac 522 gchar *name;
bbf5c878 523
0b55aa91 524 trace_spapr_drc_unrealize(spapr_drc_index(drc));
bf26ae32 525 vmstate_unregister(DEVICE(drc), &vmstate_spapr_drc, drc);
bbf5c878 526 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 527 name = g_strdup_printf("%x", spapr_drc_index(drc));
bf26ae32 528 object_property_del(root_container, name, errp);
f5babeac 529 g_free(name);
bbf5c878
MR
530}
531
ce2918cb 532SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type,
bbf5c878
MR
533 uint32_t id)
534{
ce2918cb 535 SpaprDrc *drc = SPAPR_DR_CONNECTOR(object_new(type));
94649d42 536 char *prop_name;
bbf5c878 537
bbf5c878
MR
538 drc->id = id;
539 drc->owner = owner;
0b55aa91
DG
540 prop_name = g_strdup_printf("dr-connector[%"PRIu32"]",
541 spapr_drc_index(drc));
325837ca 542 object_property_add_child(owner, prop_name, OBJECT(drc), &error_abort);
f3f41030 543 object_unref(OBJECT(drc));
bbf5c878 544 object_property_set_bool(OBJECT(drc), true, "realized", NULL);
94649d42 545 g_free(prop_name);
bbf5c878 546
bbf5c878
MR
547 return drc;
548}
549
550static void spapr_dr_connector_instance_init(Object *obj)
551{
ce2918cb
DG
552 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
553 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
bbf5c878 554
bbf5c878
MR
555 object_property_add_uint32_ptr(obj, "id", &drc->id, NULL);
556 object_property_add(obj, "index", "uint32", prop_get_index,
557 NULL, NULL, NULL, NULL);
bbf5c878
MR
558 object_property_add(obj, "fdt", "struct", prop_get_fdt,
559 NULL, NULL, NULL, NULL);
9d4c0f4f 560 drc->state = drck->empty_state;
bbf5c878
MR
561}
562
563static void spapr_dr_connector_class_init(ObjectClass *k, void *data)
564{
565 DeviceClass *dk = DEVICE_CLASS(k);
bbf5c878 566
bbf5c878
MR
567 dk->realize = realize;
568 dk->unrealize = unrealize;
c401ae8c
MA
569 /*
570 * Reason: it crashes FIXME find and document the real reason
571 */
e90f2a8c 572 dk->user_creatable = false;
bbf5c878
MR
573}
574
67fea71b
DG
575static bool drc_physical_needed(void *opaque)
576{
ce2918cb
DG
577 SpaprDrcPhysical *drcp = (SpaprDrcPhysical *)opaque;
578 SpaprDrc *drc = SPAPR_DR_CONNECTOR(drcp);
67fea71b
DG
579
580 if ((drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_ACTIVE))
581 || (!drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_INACTIVE))) {
582 return false;
583 }
584 return true;
585}
586
587static const VMStateDescription vmstate_spapr_drc_physical = {
588 .name = "spapr_drc/physical",
589 .version_id = 1,
590 .minimum_version_id = 1,
591 .needed = drc_physical_needed,
592 .fields = (VMStateField []) {
ce2918cb 593 VMSTATE_UINT32(dr_indicator, SpaprDrcPhysical),
67fea71b
DG
594 VMSTATE_END_OF_LIST()
595 }
596};
597
598static void drc_physical_reset(void *opaque)
599{
ce2918cb
DG
600 SpaprDrc *drc = SPAPR_DR_CONNECTOR(opaque);
601 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(drc);
67fea71b
DG
602
603 if (drc->dev) {
604 drcp->dr_indicator = SPAPR_DR_INDICATOR_ACTIVE;
605 } else {
606 drcp->dr_indicator = SPAPR_DR_INDICATOR_INACTIVE;
607 }
608}
609
610static void realize_physical(DeviceState *d, Error **errp)
611{
ce2918cb 612 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
67fea71b
DG
613 Error *local_err = NULL;
614
615 realize(d, &local_err);
616 if (local_err) {
617 error_propagate(errp, local_err);
618 return;
619 }
620
621 vmstate_register(DEVICE(drcp), spapr_drc_index(SPAPR_DR_CONNECTOR(drcp)),
622 &vmstate_spapr_drc_physical, drcp);
623 qemu_register_reset(drc_physical_reset, drcp);
624}
625
379ae096
GK
626static void unrealize_physical(DeviceState *d, Error **errp)
627{
ce2918cb 628 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
379ae096
GK
629 Error *local_err = NULL;
630
631 unrealize(d, &local_err);
632 if (local_err) {
633 error_propagate(errp, local_err);
634 return;
635 }
636
637 vmstate_unregister(DEVICE(drcp), &vmstate_spapr_drc_physical, drcp);
638 qemu_unregister_reset(drc_physical_reset, drcp);
639}
640
f224d35b
DG
641static void spapr_drc_physical_class_init(ObjectClass *k, void *data)
642{
67fea71b 643 DeviceClass *dk = DEVICE_CLASS(k);
ce2918cb 644 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b 645
67fea71b 646 dk->realize = realize_physical;
379ae096 647 dk->unrealize = unrealize_physical;
f224d35b 648 drck->dr_entity_sense = physical_entity_sense;
0dfabd39
DG
649 drck->isolate = drc_isolate_physical;
650 drck->unisolate = drc_unisolate_physical;
9d4c0f4f
DG
651 drck->ready_state = SPAPR_DRC_STATE_PHYSICAL_CONFIGURED;
652 drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
f224d35b
DG
653}
654
655static void spapr_drc_logical_class_init(ObjectClass *k, void *data)
656{
ce2918cb 657 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b
DG
658
659 drck->dr_entity_sense = logical_entity_sense;
0dfabd39
DG
660 drck->isolate = drc_isolate_logical;
661 drck->unisolate = drc_unisolate_logical;
9d4c0f4f
DG
662 drck->ready_state = SPAPR_DRC_STATE_LOGICAL_CONFIGURED;
663 drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f224d35b
DG
664}
665
2d335818
DG
666static void spapr_drc_cpu_class_init(ObjectClass *k, void *data)
667{
ce2918cb 668 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
669
670 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_CPU;
1693ea16 671 drck->typename = "CPU";
79808336 672 drck->drc_name_prefix = "CPU ";
6b762f29 673 drck->release = spapr_core_release;
345b12b9 674 drck->dt_populate = spapr_core_dt_populate;
2d335818
DG
675}
676
677static void spapr_drc_pci_class_init(ObjectClass *k, void *data)
678{
ce2918cb 679 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
680
681 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PCI;
1693ea16 682 drck->typename = "28";
79808336 683 drck->drc_name_prefix = "C";
6b762f29 684 drck->release = spapr_phb_remove_pci_device_cb;
46fd0299 685 drck->dt_populate = spapr_pci_dt_populate;
2d335818
DG
686}
687
688static void spapr_drc_lmb_class_init(ObjectClass *k, void *data)
689{
ce2918cb 690 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
691
692 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_LMB;
1693ea16 693 drck->typename = "MEM";
79808336 694 drck->drc_name_prefix = "LMB ";
6b762f29 695 drck->release = spapr_lmb_release;
62d38c9b 696 drck->dt_populate = spapr_lmb_dt_populate;
2d335818
DG
697}
698
962b6c36
MR
699static void spapr_drc_phb_class_init(ObjectClass *k, void *data)
700{
ce2918cb 701 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
962b6c36
MR
702
703 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PHB;
704 drck->typename = "PHB";
705 drck->drc_name_prefix = "PHB ";
bb2bdd81
GK
706 drck->release = spapr_phb_release;
707 drck->dt_populate = spapr_phb_dt_populate;
962b6c36
MR
708}
709
bbf5c878
MR
710static const TypeInfo spapr_dr_connector_info = {
711 .name = TYPE_SPAPR_DR_CONNECTOR,
712 .parent = TYPE_DEVICE,
ce2918cb 713 .instance_size = sizeof(SpaprDrc),
bbf5c878 714 .instance_init = spapr_dr_connector_instance_init,
ce2918cb 715 .class_size = sizeof(SpaprDrcClass),
bbf5c878 716 .class_init = spapr_dr_connector_class_init,
2d335818
DG
717 .abstract = true,
718};
719
720static const TypeInfo spapr_drc_physical_info = {
721 .name = TYPE_SPAPR_DRC_PHYSICAL,
722 .parent = TYPE_SPAPR_DR_CONNECTOR,
ce2918cb 723 .instance_size = sizeof(SpaprDrcPhysical),
f224d35b 724 .class_init = spapr_drc_physical_class_init,
2d335818
DG
725 .abstract = true,
726};
727
728static const TypeInfo spapr_drc_logical_info = {
729 .name = TYPE_SPAPR_DRC_LOGICAL,
730 .parent = TYPE_SPAPR_DR_CONNECTOR,
f224d35b 731 .class_init = spapr_drc_logical_class_init,
2d335818
DG
732 .abstract = true,
733};
734
735static const TypeInfo spapr_drc_cpu_info = {
736 .name = TYPE_SPAPR_DRC_CPU,
737 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818
DG
738 .class_init = spapr_drc_cpu_class_init,
739};
740
741static const TypeInfo spapr_drc_pci_info = {
742 .name = TYPE_SPAPR_DRC_PCI,
743 .parent = TYPE_SPAPR_DRC_PHYSICAL,
2d335818
DG
744 .class_init = spapr_drc_pci_class_init,
745};
746
747static const TypeInfo spapr_drc_lmb_info = {
748 .name = TYPE_SPAPR_DRC_LMB,
749 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818 750 .class_init = spapr_drc_lmb_class_init,
bbf5c878
MR
751};
752
962b6c36
MR
753static const TypeInfo spapr_drc_phb_info = {
754 .name = TYPE_SPAPR_DRC_PHB,
755 .parent = TYPE_SPAPR_DRC_LOGICAL,
ce2918cb 756 .instance_size = sizeof(SpaprDrc),
962b6c36
MR
757 .class_init = spapr_drc_phb_class_init,
758};
759
bbf5c878
MR
760/* helper functions for external users */
761
ce2918cb 762SpaprDrc *spapr_drc_by_index(uint32_t index)
bbf5c878
MR
763{
764 Object *obj;
f5babeac 765 gchar *name;
bbf5c878 766
f5babeac 767 name = g_strdup_printf("%s/%x", DRC_CONTAINER_PATH, index);
bbf5c878 768 obj = object_resolve_path(name, NULL);
f5babeac 769 g_free(name);
bbf5c878
MR
770
771 return !obj ? NULL : SPAPR_DR_CONNECTOR(obj);
772}
773
ce2918cb 774SpaprDrc *spapr_drc_by_id(const char *type, uint32_t id)
bbf5c878 775{
ce2918cb 776 SpaprDrcClass *drck
fbf55397
DG
777 = SPAPR_DR_CONNECTOR_CLASS(object_class_by_name(type));
778
779 return spapr_drc_by_index(drck->typeshift << DRC_INDEX_TYPE_SHIFT
780 | (id & DRC_INDEX_ID_MASK));
bbf5c878 781}
e4b798bb 782
e4b798bb
MR
783/**
784 * spapr_drc_populate_dt
785 *
786 * @fdt: libfdt device tree
787 * @path: path in the DT to generate properties
788 * @owner: parent Object/DeviceState for which to generate DRC
789 * descriptions for
ce2918cb 790 * @drc_type_mask: mask of SpaprDrcType values corresponding
e4b798bb
MR
791 * to the types of DRCs to generate entries for
792 *
793 * generate OF properties to describe DRC topology/indices to guests
794 *
795 * as documented in PAPR+ v2.1, 13.5.2
796 */
797int spapr_drc_populate_dt(void *fdt, int fdt_offset, Object *owner,
798 uint32_t drc_type_mask)
799{
800 Object *root_container;
801 ObjectProperty *prop;
7746abd8 802 ObjectPropertyIterator iter;
e4b798bb
MR
803 uint32_t drc_count = 0;
804 GArray *drc_indexes, *drc_power_domains;
805 GString *drc_names, *drc_types;
806 int ret;
807
808 /* the first entry of each properties is a 32-bit integer encoding
809 * the number of elements in the array. we won't know this until
810 * we complete the iteration through all the matching DRCs, but
811 * reserve the space now and set the offsets accordingly so we
812 * can fill them in later.
813 */
814 drc_indexes = g_array_new(false, true, sizeof(uint32_t));
815 drc_indexes = g_array_set_size(drc_indexes, 1);
816 drc_power_domains = g_array_new(false, true, sizeof(uint32_t));
817 drc_power_domains = g_array_set_size(drc_power_domains, 1);
818 drc_names = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
819 drc_types = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
820
821 /* aliases for all DRConnector objects will be rooted in QOM
822 * composition tree at DRC_CONTAINER_PATH
823 */
824 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
825
7746abd8
DB
826 object_property_iter_init(&iter, root_container);
827 while ((prop = object_property_iter_next(&iter))) {
e4b798bb 828 Object *obj;
ce2918cb
DG
829 SpaprDrc *drc;
830 SpaprDrcClass *drck;
e4b798bb
MR
831 uint32_t drc_index, drc_power_domain;
832
833 if (!strstart(prop->type, "link<", NULL)) {
834 continue;
835 }
836
837 obj = object_property_get_link(root_container, prop->name, NULL);
838 drc = SPAPR_DR_CONNECTOR(obj);
839 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
840
841 if (owner && (drc->owner != owner)) {
842 continue;
843 }
844
2d335818 845 if ((spapr_drc_type(drc) & drc_type_mask) == 0) {
e4b798bb
MR
846 continue;
847 }
848
849 drc_count++;
850
851 /* ibm,drc-indexes */
0b55aa91 852 drc_index = cpu_to_be32(spapr_drc_index(drc));
e4b798bb
MR
853 g_array_append_val(drc_indexes, drc_index);
854
855 /* ibm,drc-power-domains */
856 drc_power_domain = cpu_to_be32(-1);
857 g_array_append_val(drc_power_domains, drc_power_domain);
858
859 /* ibm,drc-names */
79808336 860 drc_names = g_string_append(drc_names, spapr_drc_name(drc));
e4b798bb
MR
861 drc_names = g_string_insert_len(drc_names, -1, "\0", 1);
862
863 /* ibm,drc-types */
1693ea16 864 drc_types = g_string_append(drc_types, drck->typename);
e4b798bb
MR
865 drc_types = g_string_insert_len(drc_types, -1, "\0", 1);
866 }
867
868 /* now write the drc count into the space we reserved at the
869 * beginning of the arrays previously
870 */
871 *(uint32_t *)drc_indexes->data = cpu_to_be32(drc_count);
872 *(uint32_t *)drc_power_domains->data = cpu_to_be32(drc_count);
873 *(uint32_t *)drc_names->str = cpu_to_be32(drc_count);
874 *(uint32_t *)drc_types->str = cpu_to_be32(drc_count);
875
876 ret = fdt_setprop(fdt, fdt_offset, "ibm,drc-indexes",
877 drc_indexes->data,
878 drc_indexes->len * sizeof(uint32_t));
879 if (ret) {
ce9863b7 880 error_report("Couldn't create ibm,drc-indexes property");
e4b798bb
MR
881 goto out;
882 }
883
884 ret = fdt_setprop(fdt, fdt_offset, "ibm,drc-power-domains",
885 drc_power_domains->data,
886 drc_power_domains->len * sizeof(uint32_t));
887 if (ret) {
ce9863b7 888 error_report("Couldn't finalize ibm,drc-power-domains property");
e4b798bb
MR
889 goto out;
890 }
891
892 ret = fdt_setprop(fdt, fdt_offset, "ibm,drc-names",
893 drc_names->str, drc_names->len);
894 if (ret) {
ce9863b7 895 error_report("Couldn't finalize ibm,drc-names property");
e4b798bb
MR
896 goto out;
897 }
898
899 ret = fdt_setprop(fdt, fdt_offset, "ibm,drc-types",
900 drc_types->str, drc_types->len);
901 if (ret) {
ce9863b7 902 error_report("Couldn't finalize ibm,drc-types property");
e4b798bb
MR
903 goto out;
904 }
905
906out:
907 g_array_free(drc_indexes, true);
908 g_array_free(drc_power_domains, true);
909 g_string_free(drc_names, true);
910 g_string_free(drc_types, true);
911
912 return ret;
913}
b89b3d39
DG
914
915/*
916 * RTAS calls
917 */
918
7b7258f8 919static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state)
b89b3d39 920{
ce2918cb
DG
921 SpaprDrc *drc = spapr_drc_by_index(idx);
922 SpaprDrcClass *drck;
7b7258f8
DG
923
924 if (!drc) {
0dfabd39 925 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
926 }
927
0dfabd39
DG
928 trace_spapr_drc_set_isolation_state(spapr_drc_index(drc), state);
929
7b7258f8 930 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
0dfabd39
DG
931
932 switch (state) {
933 case SPAPR_DR_ISOLATION_STATE_ISOLATED:
934 return drck->isolate(drc);
935
936 case SPAPR_DR_ISOLATION_STATE_UNISOLATED:
937 return drck->unisolate(drc);
938
939 default:
940 return RTAS_OUT_PARAM_ERROR;
941 }
b89b3d39
DG
942}
943
7b7258f8 944static uint32_t rtas_set_allocation_state(uint32_t idx, uint32_t state)
b89b3d39 945{
ce2918cb 946 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 947
61736732
DG
948 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_LOGICAL)) {
949 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
950 }
951
61736732
DG
952 trace_spapr_drc_set_allocation_state(spapr_drc_index(drc), state);
953
954 switch (state) {
955 case SPAPR_DR_ALLOCATION_STATE_USABLE:
956 return drc_set_usable(drc);
957
958 case SPAPR_DR_ALLOCATION_STATE_UNUSABLE:
959 return drc_set_unusable(drc);
960
961 default:
962 return RTAS_OUT_PARAM_ERROR;
963 }
7b7258f8 964}
b89b3d39 965
cd74d27e 966static uint32_t rtas_set_dr_indicator(uint32_t idx, uint32_t state)
7b7258f8 967{
ce2918cb 968 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 969
67fea71b
DG
970 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_PHYSICAL)) {
971 return RTAS_OUT_NO_SUCH_INDICATOR;
972 }
973 if ((state != SPAPR_DR_INDICATOR_INACTIVE)
974 && (state != SPAPR_DR_INDICATOR_ACTIVE)
975 && (state != SPAPR_DR_INDICATOR_IDENTIFY)
976 && (state != SPAPR_DR_INDICATOR_ACTION)) {
977 return RTAS_OUT_PARAM_ERROR; /* bad state parameter */
7b7258f8
DG
978 }
979
cd74d27e 980 trace_spapr_drc_set_dr_indicator(idx, state);
67fea71b 981 SPAPR_DRC_PHYSICAL(drc)->dr_indicator = state;
cd74d27e 982 return RTAS_OUT_SUCCESS;
7b7258f8
DG
983}
984
ce2918cb 985static void rtas_set_indicator(PowerPCCPU *cpu, SpaprMachineState *spapr,
7b7258f8
DG
986 uint32_t token,
987 uint32_t nargs, target_ulong args,
988 uint32_t nret, target_ulong rets)
989{
990 uint32_t type, idx, state;
991 uint32_t ret = RTAS_OUT_SUCCESS;
992
993 if (nargs != 3 || nret != 1) {
b89b3d39
DG
994 ret = RTAS_OUT_PARAM_ERROR;
995 goto out;
996 }
b89b3d39 997
7b7258f8
DG
998 type = rtas_ld(args, 0);
999 idx = rtas_ld(args, 1);
1000 state = rtas_ld(args, 2);
1001
1002 switch (type) {
b89b3d39 1003 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
7b7258f8 1004 ret = rtas_set_isolation_state(idx, state);
b89b3d39
DG
1005 break;
1006 case RTAS_SENSOR_TYPE_DR:
cd74d27e 1007 ret = rtas_set_dr_indicator(idx, state);
b89b3d39
DG
1008 break;
1009 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
7b7258f8 1010 ret = rtas_set_allocation_state(idx, state);
b89b3d39
DG
1011 break;
1012 default:
7b7258f8 1013 ret = RTAS_OUT_NOT_SUPPORTED;
b89b3d39
DG
1014 }
1015
1016out:
1017 rtas_st(rets, 0, ret);
b89b3d39
DG
1018}
1019
ce2918cb 1020static void rtas_get_sensor_state(PowerPCCPU *cpu, SpaprMachineState *spapr,
b89b3d39
DG
1021 uint32_t token, uint32_t nargs,
1022 target_ulong args, uint32_t nret,
1023 target_ulong rets)
1024{
1025 uint32_t sensor_type;
1026 uint32_t sensor_index;
1027 uint32_t sensor_state = 0;
ce2918cb
DG
1028 SpaprDrc *drc;
1029 SpaprDrcClass *drck;
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DG
1030 uint32_t ret = RTAS_OUT_SUCCESS;
1031
1032 if (nargs != 2 || nret != 2) {
1033 ret = RTAS_OUT_PARAM_ERROR;
1034 goto out;
1035 }
1036
1037 sensor_type = rtas_ld(args, 0);
1038 sensor_index = rtas_ld(args, 1);
1039
1040 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) {
1041 /* currently only DR-related sensors are implemented */
1042 trace_spapr_rtas_get_sensor_state_not_supported(sensor_index,
1043 sensor_type);
1044 ret = RTAS_OUT_NOT_SUPPORTED;
1045 goto out;
1046 }
1047
fbf55397 1048 drc = spapr_drc_by_index(sensor_index);
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DG
1049 if (!drc) {
1050 trace_spapr_rtas_get_sensor_state_invalid(sensor_index);
1051 ret = RTAS_OUT_PARAM_ERROR;
1052 goto out;
1053 }
1054 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
f224d35b 1055 sensor_state = drck->dr_entity_sense(drc);
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DG
1056
1057out:
1058 rtas_st(rets, 0, ret);
1059 rtas_st(rets, 1, sensor_state);
1060}
1061
1062/* configure-connector work area offsets, int32_t units for field
1063 * indexes, bytes for field offset/len values.
1064 *
1065 * as documented by PAPR+ v2.7, 13.5.3.5
1066 */
1067#define CC_IDX_NODE_NAME_OFFSET 2
1068#define CC_IDX_PROP_NAME_OFFSET 2
1069#define CC_IDX_PROP_LEN 3
1070#define CC_IDX_PROP_DATA_OFFSET 4
1071#define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4)
1072#define CC_WA_LEN 4096
1073
1074static void configure_connector_st(target_ulong addr, target_ulong offset,
1075 const void *buf, size_t len)
1076{
1077 cpu_physical_memory_write(ppc64_phys_to_real(addr + offset),
1078 buf, MIN(len, CC_WA_LEN - offset));
1079}
1080
b89b3d39 1081static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
ce2918cb 1082 SpaprMachineState *spapr,
b89b3d39
DG
1083 uint32_t token, uint32_t nargs,
1084 target_ulong args, uint32_t nret,
1085 target_ulong rets)
1086{
1087 uint64_t wa_addr;
1088 uint64_t wa_offset;
1089 uint32_t drc_index;
ce2918cb
DG
1090 SpaprDrc *drc;
1091 SpaprDrcClass *drck;
1092 SpaprDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE;
b89b3d39 1093 int rc;
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DG
1094
1095 if (nargs != 2 || nret != 1) {
1096 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
1097 return;
1098 }
1099
1100 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0);
1101
1102 drc_index = rtas_ld(wa_addr, 0);
fbf55397 1103 drc = spapr_drc_by_index(drc_index);
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DG
1104 if (!drc) {
1105 trace_spapr_rtas_ibm_configure_connector_invalid(drc_index);
1106 rc = RTAS_OUT_PARAM_ERROR;
1107 goto out;
1108 }
1109
9d4c0f4f 1110 if ((drc->state != SPAPR_DRC_STATE_LOGICAL_UNISOLATE)
188bfe1b
BR
1111 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_UNISOLATE)
1112 && (drc->state != SPAPR_DRC_STATE_LOGICAL_CONFIGURED)
1113 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_CONFIGURED)) {
1114 /*
1115 * Need to unisolate the device before configuring
1116 * or it should already be in configured state to
1117 * allow configure-connector be called repeatedly.
1118 */
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1119 rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE;
1120 goto out;
1121 }
1122
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1123 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
1124
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1125 if (!drc->fdt) {
1126 Error *local_err = NULL;
1127 void *fdt;
1128 int fdt_size;
1129
1130 fdt = create_device_tree(&fdt_size);
1131
1132 if (drck->dt_populate(drc, spapr, fdt, &drc->fdt_start_offset,
1133 &local_err)) {
1134 g_free(fdt);
1135 error_free(local_err);
1136 rc = SPAPR_DR_CC_RESPONSE_ERROR;
1137 goto out;
1138 }
1139
1140 drc->fdt = fdt;
1141 drc->ccs_offset = drc->fdt_start_offset;
1142 drc->ccs_depth = 0;
1143 }
1144
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DG
1145 do {
1146 uint32_t tag;
1147 const char *name;
1148 const struct fdt_property *prop;
1149 int fdt_offset_next, prop_len;
1150
4445b1d2 1151 tag = fdt_next_tag(drc->fdt, drc->ccs_offset, &fdt_offset_next);
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DG
1152
1153 switch (tag) {
1154 case FDT_BEGIN_NODE:
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DG
1155 drc->ccs_depth++;
1156 name = fdt_get_name(drc->fdt, drc->ccs_offset, NULL);
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DG
1157
1158 /* provide the name of the next OF node */
1159 wa_offset = CC_VAL_DATA_OFFSET;
1160 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset);
1161 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1162 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD;
1163 break;
1164 case FDT_END_NODE:
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DG
1165 drc->ccs_depth--;
1166 if (drc->ccs_depth == 0) {
0b55aa91 1167 uint32_t drc_index = spapr_drc_index(drc);
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DG
1168
1169 /* done sending the device tree, move to configured state */
0b55aa91 1170 trace_spapr_drc_set_configured(drc_index);
9d4c0f4f 1171 drc->state = drck->ready_state;
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BR
1172 /*
1173 * Ensure that we are able to send the FDT fragment
1174 * again via configure-connector call if the guest requests.
1175 */
1176 drc->ccs_offset = drc->fdt_start_offset;
1177 drc->ccs_depth = 0;
1178 fdt_offset_next = drc->fdt_start_offset;
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DG
1179 resp = SPAPR_DR_CC_RESPONSE_SUCCESS;
1180 } else {
1181 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT;
1182 }
1183 break;
1184 case FDT_PROP:
4445b1d2 1185 prop = fdt_get_property_by_offset(drc->fdt, drc->ccs_offset,
b89b3d39 1186 &prop_len);
88af6ea5 1187 name = fdt_string(drc->fdt, fdt32_to_cpu(prop->nameoff));
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DG
1188
1189 /* provide the name of the next OF property */
1190 wa_offset = CC_VAL_DATA_OFFSET;
1191 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset);
1192 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1193
1194 /* provide the length and value of the OF property. data gets
1195 * placed immediately after NULL terminator of the OF property's
1196 * name string
1197 */
1198 wa_offset += strlen(name) + 1,
1199 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len);
1200 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset);
1201 configure_connector_st(wa_addr, wa_offset, prop->data, prop_len);
1202 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY;
1203 break;
1204 case FDT_END:
1205 resp = SPAPR_DR_CC_RESPONSE_ERROR;
1206 default:
1207 /* keep seeking for an actionable tag */
1208 break;
1209 }
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DG
1210 if (drc->ccs_offset >= 0) {
1211 drc->ccs_offset = fdt_offset_next;
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DG
1212 }
1213 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE);
1214
1215 rc = resp;
1216out:
1217 rtas_st(rets, 0, rc);
1218}
1219
1220static void spapr_drc_register_types(void)
1221{
1222 type_register_static(&spapr_dr_connector_info);
2d335818
DG
1223 type_register_static(&spapr_drc_physical_info);
1224 type_register_static(&spapr_drc_logical_info);
1225 type_register_static(&spapr_drc_cpu_info);
1226 type_register_static(&spapr_drc_pci_info);
1227 type_register_static(&spapr_drc_lmb_info);
962b6c36 1228 type_register_static(&spapr_drc_phb_info);
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DG
1229
1230 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator",
1231 rtas_set_indicator);
1232 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state",
1233 rtas_get_sensor_state);
1234 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector",
1235 rtas_ibm_configure_connector);
1236}
1237type_init(spapr_drc_register_types)