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CommitLineData
bbf5c878
MR
1/*
2 * QEMU SPAPR Dynamic Reconfiguration Connector Implementation
3 *
4 * Copyright IBM Corp. 2014
5 *
6 * Authors:
7 * Michael Roth <mdroth@linux.vnet.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
0d75590d 13#include "qemu/osdep.h"
da34e65c 14#include "qapi/error.h"
15280c36 15#include "qapi/qmp/qnull.h"
4771d756 16#include "cpu.h"
f348b6d1 17#include "qemu/cutils.h"
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18#include "hw/ppc/spapr_drc.h"
19#include "qom/object.h"
d6454270 20#include "migration/vmstate.h"
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21#include "qapi/visitor.h"
22#include "qemu/error-report.h"
0cb688d2 23#include "hw/ppc/spapr.h" /* for RTAS return codes */
31834723 24#include "hw/pci-host/spapr.h" /* spapr_phb_remove_pci_device_cb callback */
ee3a71e3 25#include "hw/ppc/spapr_nvdimm.h"
d9c95c71 26#include "sysemu/device_tree.h"
71e8a915 27#include "sysemu/reset.h"
24ac7755 28#include "trace.h"
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29
30#define DRC_CONTAINER_PATH "/dr-connector"
31#define DRC_INDEX_TYPE_SHIFT 28
627c2ef7 32#define DRC_INDEX_ID_MASK ((1ULL << DRC_INDEX_TYPE_SHIFT) - 1)
bbf5c878 33
ce2918cb 34SpaprDrcType spapr_drc_type(SpaprDrc *drc)
2d335818 35{
ce2918cb 36 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818
DG
37
38 return 1 << drck->typeshift;
39}
40
ce2918cb 41uint32_t spapr_drc_index(SpaprDrc *drc)
bbf5c878 42{
ce2918cb 43 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818 44
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MR
45 /* no set format for a drc index: it only needs to be globally
46 * unique. this is how we encode the DRC type on bare-metal
47 * however, so might as well do that here
48 */
2d335818
DG
49 return (drck->typeshift << DRC_INDEX_TYPE_SHIFT)
50 | (drc->id & DRC_INDEX_ID_MASK);
bbf5c878
MR
51}
52
ce2918cb 53static uint32_t drc_isolate_physical(SpaprDrc *drc)
bbf5c878 54{
9d4c0f4f
DG
55 switch (drc->state) {
56 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
57 return RTAS_OUT_SUCCESS; /* Nothing to do */
58 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
59 break; /* see below */
60 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
61 return RTAS_OUT_PARAM_ERROR; /* not allowed */
62 default:
63 g_assert_not_reached();
64 }
65
9d4c0f4f 66 drc->state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
0dfabd39 67
f1c52354 68 if (drc->unplug_requested) {
0dfabd39 69 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
70 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
71 spapr_drc_detach(drc);
9d1852ce 72 }
0dfabd39
DG
73
74 return RTAS_OUT_SUCCESS;
75}
76
ce2918cb 77static uint32_t drc_unisolate_physical(SpaprDrc *drc)
0dfabd39 78{
9d4c0f4f
DG
79 switch (drc->state) {
80 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
81 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
82 return RTAS_OUT_SUCCESS; /* Nothing to do */
83 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
84 break; /* see below */
85 default:
86 g_assert_not_reached();
87 }
88
0dfabd39
DG
89 /* cannot unisolate a non-existent resource, and, or resources
90 * which are in an 'UNUSABLE' allocation state. (PAPR 2.7,
91 * 13.5.3.5)
92 */
93 if (!drc->dev) {
94 return RTAS_OUT_NO_SUCH_INDICATOR;
95 }
96
9d4c0f4f 97 drc->state = SPAPR_DRC_STATE_PHYSICAL_UNISOLATE;
4445b1d2
DG
98 drc->ccs_offset = drc->fdt_start_offset;
99 drc->ccs_depth = 0;
0dfabd39
DG
100
101 return RTAS_OUT_SUCCESS;
102}
103
ce2918cb 104static uint32_t drc_isolate_logical(SpaprDrc *drc)
0dfabd39 105{
9d4c0f4f
DG
106 switch (drc->state) {
107 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
108 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
109 return RTAS_OUT_SUCCESS; /* Nothing to do */
110 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
111 break; /* see below */
112 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
113 return RTAS_OUT_PARAM_ERROR; /* not allowed */
114 default:
115 g_assert_not_reached();
116 }
117
cf632463
BR
118 /*
119 * Fail any requests to ISOLATE the LMB DRC if this LMB doesn't
120 * belong to a DIMM device that is marked for removal.
121 *
122 * Currently the guest userspace tool drmgr that drives the memory
123 * hotplug/unplug will just try to remove a set of 'removable' LMBs
124 * in response to a hot unplug request that is based on drc-count.
125 * If the LMB being removed doesn't belong to a DIMM device that is
126 * actually being unplugged, fail the isolation request here.
127 */
0dfabd39 128 if (spapr_drc_type(drc) == SPAPR_DR_CONNECTOR_TYPE_LMB
f1c52354 129 && !drc->unplug_requested) {
0dfabd39 130 return RTAS_OUT_HW_ERROR;
cf632463
BR
131 }
132
9d4c0f4f 133 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
bbf5c878 134
0dfabd39
DG
135 /* if we're awaiting release, but still in an unconfigured state,
136 * it's likely the guest is still in the process of configuring
137 * the device and is transitioning the devices to an ISOLATED
138 * state as a part of that process. so we only complete the
139 * removal when this transition happens for a device in a
140 * configured state, as suggested by the state diagram from PAPR+
141 * 2.7, 13.4
142 */
f1c52354 143 if (drc->unplug_requested) {
0dfabd39 144 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
145 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
146 spapr_drc_detach(drc);
bbf5c878 147 }
0dfabd39
DG
148 return RTAS_OUT_SUCCESS;
149}
150
ce2918cb 151static uint32_t drc_unisolate_logical(SpaprDrc *drc)
0dfabd39 152{
9d4c0f4f
DG
153 switch (drc->state) {
154 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
155 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
156 return RTAS_OUT_SUCCESS; /* Nothing to do */
157 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
158 break; /* see below */
159 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
160 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
161 default:
162 g_assert_not_reached();
0dfabd39
DG
163 }
164
9d4c0f4f
DG
165 /* Move to AVAILABLE state should have ensured device was present */
166 g_assert(drc->dev);
bbf5c878 167
9d4c0f4f 168 drc->state = SPAPR_DRC_STATE_LOGICAL_UNISOLATE;
4445b1d2
DG
169 drc->ccs_offset = drc->fdt_start_offset;
170 drc->ccs_depth = 0;
171
0cb688d2 172 return RTAS_OUT_SUCCESS;
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MR
173}
174
ce2918cb 175static uint32_t drc_set_usable(SpaprDrc *drc)
bbf5c878 176{
9d4c0f4f
DG
177 switch (drc->state) {
178 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
179 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
180 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
181 return RTAS_OUT_SUCCESS; /* Nothing to do */
182 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
183 break; /* see below */
184 default:
185 g_assert_not_reached();
186 }
187
61736732
DG
188 /* if there's no resource/device associated with the DRC, there's
189 * no way for us to put it in an allocation state consistent with
190 * being 'USABLE'. PAPR 2.7, 13.5.3.4 documents that this should
191 * result in an RTAS return code of -3 / "no such indicator"
192 */
193 if (!drc->dev) {
194 return RTAS_OUT_NO_SUCH_INDICATOR;
195 }
f1c52354 196 if (drc->unplug_requested) {
82a93a1d
DG
197 /* Don't allow the guest to move a device away from UNUSABLE
198 * state when we want to unplug it */
61736732 199 return RTAS_OUT_NO_SUCH_INDICATOR;
9d1852ce
MR
200 }
201
9d4c0f4f 202 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
61736732
DG
203
204 return RTAS_OUT_SUCCESS;
205}
206
ce2918cb 207static uint32_t drc_set_unusable(SpaprDrc *drc)
61736732 208{
9d4c0f4f
DG
209 switch (drc->state) {
210 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
211 return RTAS_OUT_SUCCESS; /* Nothing to do */
212 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
213 break; /* see below */
214 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
215 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
216 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
217 default:
218 g_assert_not_reached();
219 }
220
221 drc->state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f1c52354 222 if (drc->unplug_requested) {
61736732
DG
223 uint32_t drc_index = spapr_drc_index(drc);
224 trace_spapr_drc_set_allocation_state_finalizing(drc_index);
a8dc47fd 225 spapr_drc_detach(drc);
bbf5c878 226 }
61736732 227
0cb688d2 228 return RTAS_OUT_SUCCESS;
bbf5c878
MR
229}
230
dbd26f2f 231static char *spapr_drc_name(SpaprDrc *drc)
bbf5c878 232{
ce2918cb 233 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
79808336
DG
234
235 /* human-readable name for a DRC to encode into the DT
236 * description. this is mainly only used within a guest in place
237 * of the unique DRC index.
238 *
239 * in the case of VIO/PCI devices, it corresponds to a "location
240 * code" that maps a logical device/function (DRC index) to a
241 * physical (or virtual in the case of VIO) location in the system
242 * by chaining together the "location label" for each
243 * encapsulating component.
244 *
245 * since this is more to do with diagnosing physical hardware
246 * issues than guest compatibility, we choose location codes/DRC
247 * names that adhere to the documented format, but avoid encoding
248 * the entire topology information into the label/code, instead
249 * just using the location codes based on the labels for the
250 * endpoints (VIO/PCI adaptor connectors), which is basically just
251 * "C" followed by an integer ID.
252 *
253 * DRC names as documented by PAPR+ v2.7, 13.5.2.4
254 * location codes as documented by PAPR+ v2.7, 12.3.1.5
255 */
256 return g_strdup_printf("%s%d", drck->drc_name_prefix, drc->id);
bbf5c878
MR
257}
258
bbf5c878
MR
259/*
260 * dr-entity-sense sensor value
261 * returned via get-sensor-state RTAS calls
262 * as expected by state diagram in PAPR+ 2.7, 13.4
263 * based on the current allocation/indicator/power states
264 * for the DR connector.
265 */
ce2918cb 266static SpaprDREntitySense physical_entity_sense(SpaprDrc *drc)
bbf5c878 267{
f224d35b
DG
268 /* this assumes all PCI devices are assigned to a 'live insertion'
269 * power domain, where QEMU manages power state automatically as
270 * opposed to the guest. present, non-PCI resources are unaffected
271 * by power state.
272 */
273 return drc->dev ? SPAPR_DR_ENTITY_SENSE_PRESENT
274 : SPAPR_DR_ENTITY_SENSE_EMPTY;
275}
276
ce2918cb 277static SpaprDREntitySense logical_entity_sense(SpaprDrc *drc)
f224d35b 278{
9d4c0f4f
DG
279 switch (drc->state) {
280 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
f224d35b 281 return SPAPR_DR_ENTITY_SENSE_UNUSABLE;
9d4c0f4f
DG
282 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
283 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
284 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
285 g_assert(drc->dev);
286 return SPAPR_DR_ENTITY_SENSE_PRESENT;
287 default:
288 g_assert_not_reached();
bbf5c878 289 }
bbf5c878
MR
290}
291
d7bce999
EB
292static void prop_get_index(Object *obj, Visitor *v, const char *name,
293 void *opaque, Error **errp)
bbf5c878 294{
ce2918cb 295 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
0b55aa91 296 uint32_t value = spapr_drc_index(drc);
51e72bc1 297 visit_type_uint32(v, name, &value, errp);
bbf5c878
MR
298}
299
d7bce999
EB
300static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
301 void *opaque, Error **errp)
bbf5c878 302{
ce2918cb 303 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
d2f95f4d 304 QNull *null = NULL;
c75304a1 305 Error *err = NULL;
bbf5c878
MR
306 int fdt_offset_next, fdt_offset, fdt_depth;
307 void *fdt;
308
309 if (!drc->fdt) {
d2f95f4d 310 visit_type_null(v, NULL, &null, errp);
cb3e7f08 311 qobject_unref(null);
bbf5c878
MR
312 return;
313 }
314
315 fdt = drc->fdt;
316 fdt_offset = drc->fdt_start_offset;
317 fdt_depth = 0;
318
319 do {
320 const char *name = NULL;
321 const struct fdt_property *prop = NULL;
322 int prop_len = 0, name_len = 0;
323 uint32_t tag;
324
325 tag = fdt_next_tag(fdt, fdt_offset, &fdt_offset_next);
326 switch (tag) {
327 case FDT_BEGIN_NODE:
328 fdt_depth++;
329 name = fdt_get_name(fdt, fdt_offset, &name_len);
337283df 330 visit_start_struct(v, name, NULL, 0, &err);
c75304a1
MA
331 if (err) {
332 error_propagate(errp, err);
333 return;
334 }
bbf5c878
MR
335 break;
336 case FDT_END_NODE:
337 /* shouldn't ever see an FDT_END_NODE before FDT_BEGIN_NODE */
338 g_assert(fdt_depth > 0);
15c2f669 339 visit_check_struct(v, &err);
1158bb2a 340 visit_end_struct(v, NULL);
c75304a1
MA
341 if (err) {
342 error_propagate(errp, err);
343 return;
344 }
bbf5c878
MR
345 fdt_depth--;
346 break;
347 case FDT_PROP: {
348 int i;
349 prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len);
350 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
d9f62dde 351 visit_start_list(v, name, NULL, 0, &err);
c75304a1
MA
352 if (err) {
353 error_propagate(errp, err);
354 return;
355 }
bbf5c878 356 for (i = 0; i < prop_len; i++) {
51e72bc1 357 visit_type_uint8(v, NULL, (uint8_t *)&prop->data[i], &err);
c75304a1
MA
358 if (err) {
359 error_propagate(errp, err);
360 return;
361 }
362 }
a4a1c70d 363 visit_check_list(v, &err);
1158bb2a 364 visit_end_list(v, NULL);
a4a1c70d
MA
365 if (err) {
366 error_propagate(errp, err);
367 return;
368 }
bbf5c878
MR
369 break;
370 }
371 default:
e20c6314
PMD
372 error_report("device FDT in unexpected state: %d", tag);
373 abort();
bbf5c878
MR
374 }
375 fdt_offset = fdt_offset_next;
376 } while (fdt_depth != 0);
377}
378
ce2918cb 379void spapr_drc_attach(SpaprDrc *drc, DeviceState *d, Error **errp)
bbf5c878 380{
0b55aa91 381 trace_spapr_drc_attach(spapr_drc_index(drc));
bbf5c878 382
9d4c0f4f 383 if (drc->dev) {
bbf5c878
MR
384 error_setg(errp, "an attached device is still awaiting release");
385 return;
386 }
9d4c0f4f
DG
387 g_assert((drc->state == SPAPR_DRC_STATE_LOGICAL_UNUSABLE)
388 || (drc->state == SPAPR_DRC_STATE_PHYSICAL_POWERON));
bbf5c878 389
bbf5c878 390 drc->dev = d;
d9c95c71 391
bbf5c878
MR
392 object_property_add_link(OBJECT(drc), "device",
393 object_get_typename(OBJECT(drc->dev)),
394 (Object **)(&drc->dev),
395 NULL, 0, NULL);
396}
397
ce2918cb 398static void spapr_drc_release(SpaprDrc *drc)
bbf5c878 399{
ce2918cb 400 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
6b762f29
DG
401
402 drck->release(drc->dev);
bbf5c878 403
f1c52354 404 drc->unplug_requested = false;
bbf5c878
MR
405 g_free(drc->fdt);
406 drc->fdt = NULL;
407 drc->fdt_start_offset = 0;
ba50822f 408 object_property_del(OBJECT(drc), "device", &error_abort);
bbf5c878 409 drc->dev = NULL;
bbf5c878
MR
410}
411
ce2918cb 412void spapr_drc_detach(SpaprDrc *drc)
9c914e53 413{
ce2918cb 414 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 415
9c914e53
DG
416 trace_spapr_drc_detach(spapr_drc_index(drc));
417
9d4c0f4f 418 g_assert(drc->dev);
a8dc47fd 419
9d4c0f4f 420 drc->unplug_requested = true;
9c914e53 421
9d4c0f4f
DG
422 if (drc->state != drck->empty_state) {
423 trace_spapr_drc_awaiting_quiesce(spapr_drc_index(drc));
9c914e53
DG
424 return;
425 }
426
9c914e53
DG
427 spapr_drc_release(drc);
428}
429
ce2918cb 430void spapr_drc_reset(SpaprDrc *drc)
bbf5c878 431{
ce2918cb 432 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 433
0b55aa91 434 trace_spapr_drc_reset(spapr_drc_index(drc));
b8fdd530 435
bbf5c878 436 /* immediately upon reset we can safely assume DRCs whose devices
4f9242fc 437 * are pending removal can be safely removed.
bbf5c878 438 */
f1c52354 439 if (drc->unplug_requested) {
4f9242fc
DG
440 spapr_drc_release(drc);
441 }
442
4f9242fc 443 if (drc->dev) {
9d4c0f4f
DG
444 /* A device present at reset is ready to go, same as coldplugged */
445 drc->state = drck->ready_state;
188bfe1b
BR
446 /*
447 * Ensure that we are able to send the FDT fragment again
448 * via configure-connector call if the guest requests.
449 */
450 drc->ccs_offset = drc->fdt_start_offset;
451 drc->ccs_depth = 0;
4f9242fc 452 } else {
9d4c0f4f 453 drc->state = drck->empty_state;
188bfe1b
BR
454 drc->ccs_offset = -1;
455 drc->ccs_depth = -1;
bbf5c878
MR
456 }
457}
458
ab858434
GK
459static bool spapr_drc_unplug_requested_needed(void *opaque)
460{
461 return spapr_drc_unplug_requested(opaque);
462}
463
464static const VMStateDescription vmstate_spapr_drc_unplug_requested = {
465 .name = "spapr_drc/unplug_requested",
466 .version_id = 1,
467 .minimum_version_id = 1,
468 .needed = spapr_drc_unplug_requested_needed,
469 .fields = (VMStateField []) {
470 VMSTATE_BOOL(unplug_requested, SpaprDrc),
471 VMSTATE_END_OF_LIST()
472 }
473};
474
4b63db12 475bool spapr_drc_transient(SpaprDrc *drc)
a50919dd 476{
ce2918cb 477 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
a50919dd 478
4b63db12
GK
479 /*
480 * If no dev is plugged in there is no need to migrate the DRC state
481 * nor to reset the DRC at CAS.
482 */
c618e300 483 if (!drc->dev) {
a50919dd
DHB
484 return false;
485 }
486
487 /*
4b63db12
GK
488 * We need to reset the DRC at CAS or to migrate the DRC state if it's
489 * not equal to the expected long-term state, which is the same as the
ab858434 490 * coldplugged initial state, or if an unplug request is pending.
4b63db12 491 */
ab858434
GK
492 return drc->state != drck->ready_state ||
493 spapr_drc_unplug_requested(drc);
a50919dd
DHB
494}
495
4b63db12
GK
496static bool spapr_drc_needed(void *opaque)
497{
498 return spapr_drc_transient(opaque);
499}
500
a50919dd
DHB
501static const VMStateDescription vmstate_spapr_drc = {
502 .name = "spapr_drc",
503 .version_id = 1,
504 .minimum_version_id = 1,
505 .needed = spapr_drc_needed,
506 .fields = (VMStateField []) {
ce2918cb 507 VMSTATE_UINT32(state, SpaprDrc),
a50919dd 508 VMSTATE_END_OF_LIST()
ab858434
GK
509 },
510 .subsections = (const VMStateDescription * []) {
511 &vmstate_spapr_drc_unplug_requested,
512 NULL
a50919dd
DHB
513 }
514};
515
bbf5c878
MR
516static void realize(DeviceState *d, Error **errp)
517{
ce2918cb 518 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 519 Object *root_container;
f5babeac 520 gchar *link_name;
ddfb0baa 521 char *child_name;
bbf5c878
MR
522 Error *err = NULL;
523
0b55aa91 524 trace_spapr_drc_realize(spapr_drc_index(drc));
bbf5c878
MR
525 /* NOTE: we do this as part of realize/unrealize due to the fact
526 * that the guest will communicate with the DRC via RTAS calls
527 * referencing the global DRC index. By unlinking the DRC
528 * from DRC_CONTAINER_PATH/<drc_index> we effectively make it
529 * inaccessible by the guest, since lookups rely on this path
530 * existing in the composition tree
531 */
532 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 533 link_name = g_strdup_printf("%x", spapr_drc_index(drc));
bbf5c878 534 child_name = object_get_canonical_path_component(OBJECT(drc));
0b55aa91 535 trace_spapr_drc_realize_child(spapr_drc_index(drc), child_name);
bbf5c878
MR
536 object_property_add_alias(root_container, link_name,
537 drc->owner, child_name, &err);
bf26ae32 538 g_free(child_name);
f5babeac 539 g_free(link_name);
bbf5c878 540 if (err) {
bf26ae32
GK
541 error_propagate(errp, err);
542 return;
bbf5c878 543 }
3cad405b 544 vmstate_register(VMSTATE_IF(drc), spapr_drc_index(drc), &vmstate_spapr_drc,
a50919dd 545 drc);
0b55aa91 546 trace_spapr_drc_realize_complete(spapr_drc_index(drc));
bbf5c878
MR
547}
548
549static void unrealize(DeviceState *d, Error **errp)
550{
ce2918cb 551 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 552 Object *root_container;
f5babeac 553 gchar *name;
bbf5c878 554
0b55aa91 555 trace_spapr_drc_unrealize(spapr_drc_index(drc));
3cad405b 556 vmstate_unregister(VMSTATE_IF(drc), &vmstate_spapr_drc, drc);
bbf5c878 557 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 558 name = g_strdup_printf("%x", spapr_drc_index(drc));
bf26ae32 559 object_property_del(root_container, name, errp);
f5babeac 560 g_free(name);
bbf5c878
MR
561}
562
ce2918cb 563SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type,
bbf5c878
MR
564 uint32_t id)
565{
ce2918cb 566 SpaprDrc *drc = SPAPR_DR_CONNECTOR(object_new(type));
94649d42 567 char *prop_name;
bbf5c878 568
bbf5c878
MR
569 drc->id = id;
570 drc->owner = owner;
0b55aa91
DG
571 prop_name = g_strdup_printf("dr-connector[%"PRIu32"]",
572 spapr_drc_index(drc));
325837ca 573 object_property_add_child(owner, prop_name, OBJECT(drc), &error_abort);
f3f41030 574 object_unref(OBJECT(drc));
bbf5c878 575 object_property_set_bool(OBJECT(drc), true, "realized", NULL);
94649d42 576 g_free(prop_name);
bbf5c878 577
bbf5c878
MR
578 return drc;
579}
580
581static void spapr_dr_connector_instance_init(Object *obj)
582{
ce2918cb
DG
583 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
584 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
bbf5c878 585
836e1b38
FF
586 object_property_add_uint32_ptr(obj, "id", &drc->id, OBJ_PROP_FLAG_READ,
587 NULL);
bbf5c878
MR
588 object_property_add(obj, "index", "uint32", prop_get_index,
589 NULL, NULL, NULL, NULL);
bbf5c878
MR
590 object_property_add(obj, "fdt", "struct", prop_get_fdt,
591 NULL, NULL, NULL, NULL);
9d4c0f4f 592 drc->state = drck->empty_state;
bbf5c878
MR
593}
594
595static void spapr_dr_connector_class_init(ObjectClass *k, void *data)
596{
597 DeviceClass *dk = DEVICE_CLASS(k);
bbf5c878 598
bbf5c878
MR
599 dk->realize = realize;
600 dk->unrealize = unrealize;
c401ae8c
MA
601 /*
602 * Reason: it crashes FIXME find and document the real reason
603 */
e90f2a8c 604 dk->user_creatable = false;
bbf5c878
MR
605}
606
67fea71b
DG
607static bool drc_physical_needed(void *opaque)
608{
ce2918cb
DG
609 SpaprDrcPhysical *drcp = (SpaprDrcPhysical *)opaque;
610 SpaprDrc *drc = SPAPR_DR_CONNECTOR(drcp);
67fea71b
DG
611
612 if ((drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_ACTIVE))
613 || (!drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_INACTIVE))) {
614 return false;
615 }
616 return true;
617}
618
619static const VMStateDescription vmstate_spapr_drc_physical = {
620 .name = "spapr_drc/physical",
621 .version_id = 1,
622 .minimum_version_id = 1,
623 .needed = drc_physical_needed,
624 .fields = (VMStateField []) {
ce2918cb 625 VMSTATE_UINT32(dr_indicator, SpaprDrcPhysical),
67fea71b
DG
626 VMSTATE_END_OF_LIST()
627 }
628};
629
630static void drc_physical_reset(void *opaque)
631{
ce2918cb
DG
632 SpaprDrc *drc = SPAPR_DR_CONNECTOR(opaque);
633 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(drc);
67fea71b
DG
634
635 if (drc->dev) {
636 drcp->dr_indicator = SPAPR_DR_INDICATOR_ACTIVE;
637 } else {
638 drcp->dr_indicator = SPAPR_DR_INDICATOR_INACTIVE;
639 }
640}
641
642static void realize_physical(DeviceState *d, Error **errp)
643{
ce2918cb 644 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
67fea71b
DG
645 Error *local_err = NULL;
646
647 realize(d, &local_err);
648 if (local_err) {
649 error_propagate(errp, local_err);
650 return;
651 }
652
3cad405b
MAL
653 vmstate_register(VMSTATE_IF(drcp),
654 spapr_drc_index(SPAPR_DR_CONNECTOR(drcp)),
67fea71b
DG
655 &vmstate_spapr_drc_physical, drcp);
656 qemu_register_reset(drc_physical_reset, drcp);
657}
658
379ae096
GK
659static void unrealize_physical(DeviceState *d, Error **errp)
660{
ce2918cb 661 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
379ae096
GK
662 Error *local_err = NULL;
663
664 unrealize(d, &local_err);
665 if (local_err) {
666 error_propagate(errp, local_err);
667 return;
668 }
669
3cad405b 670 vmstate_unregister(VMSTATE_IF(drcp), &vmstate_spapr_drc_physical, drcp);
379ae096
GK
671 qemu_unregister_reset(drc_physical_reset, drcp);
672}
673
f224d35b
DG
674static void spapr_drc_physical_class_init(ObjectClass *k, void *data)
675{
67fea71b 676 DeviceClass *dk = DEVICE_CLASS(k);
ce2918cb 677 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b 678
67fea71b 679 dk->realize = realize_physical;
379ae096 680 dk->unrealize = unrealize_physical;
f224d35b 681 drck->dr_entity_sense = physical_entity_sense;
0dfabd39
DG
682 drck->isolate = drc_isolate_physical;
683 drck->unisolate = drc_unisolate_physical;
9d4c0f4f
DG
684 drck->ready_state = SPAPR_DRC_STATE_PHYSICAL_CONFIGURED;
685 drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
f224d35b
DG
686}
687
688static void spapr_drc_logical_class_init(ObjectClass *k, void *data)
689{
ce2918cb 690 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b
DG
691
692 drck->dr_entity_sense = logical_entity_sense;
0dfabd39
DG
693 drck->isolate = drc_isolate_logical;
694 drck->unisolate = drc_unisolate_logical;
9d4c0f4f
DG
695 drck->ready_state = SPAPR_DRC_STATE_LOGICAL_CONFIGURED;
696 drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f224d35b
DG
697}
698
2d335818
DG
699static void spapr_drc_cpu_class_init(ObjectClass *k, void *data)
700{
ce2918cb 701 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
702
703 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_CPU;
1693ea16 704 drck->typename = "CPU";
79808336 705 drck->drc_name_prefix = "CPU ";
6b762f29 706 drck->release = spapr_core_release;
345b12b9 707 drck->dt_populate = spapr_core_dt_populate;
2d335818
DG
708}
709
710static void spapr_drc_pci_class_init(ObjectClass *k, void *data)
711{
ce2918cb 712 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
713
714 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PCI;
1693ea16 715 drck->typename = "28";
79808336 716 drck->drc_name_prefix = "C";
6b762f29 717 drck->release = spapr_phb_remove_pci_device_cb;
46fd0299 718 drck->dt_populate = spapr_pci_dt_populate;
2d335818
DG
719}
720
721static void spapr_drc_lmb_class_init(ObjectClass *k, void *data)
722{
ce2918cb 723 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
724
725 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_LMB;
1693ea16 726 drck->typename = "MEM";
79808336 727 drck->drc_name_prefix = "LMB ";
6b762f29 728 drck->release = spapr_lmb_release;
62d38c9b 729 drck->dt_populate = spapr_lmb_dt_populate;
2d335818
DG
730}
731
962b6c36
MR
732static void spapr_drc_phb_class_init(ObjectClass *k, void *data)
733{
ce2918cb 734 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
962b6c36
MR
735
736 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PHB;
737 drck->typename = "PHB";
738 drck->drc_name_prefix = "PHB ";
bb2bdd81
GK
739 drck->release = spapr_phb_release;
740 drck->dt_populate = spapr_phb_dt_populate;
962b6c36
MR
741}
742
ee3a71e3
SB
743static void spapr_drc_pmem_class_init(ObjectClass *k, void *data)
744{
745 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
746
747 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PMEM;
748 drck->typename = "PMEM";
749 drck->drc_name_prefix = "PMEM ";
750 drck->release = NULL;
751 drck->dt_populate = spapr_pmem_dt_populate;
752}
753
bbf5c878
MR
754static const TypeInfo spapr_dr_connector_info = {
755 .name = TYPE_SPAPR_DR_CONNECTOR,
756 .parent = TYPE_DEVICE,
ce2918cb 757 .instance_size = sizeof(SpaprDrc),
bbf5c878 758 .instance_init = spapr_dr_connector_instance_init,
ce2918cb 759 .class_size = sizeof(SpaprDrcClass),
bbf5c878 760 .class_init = spapr_dr_connector_class_init,
2d335818
DG
761 .abstract = true,
762};
763
764static const TypeInfo spapr_drc_physical_info = {
765 .name = TYPE_SPAPR_DRC_PHYSICAL,
766 .parent = TYPE_SPAPR_DR_CONNECTOR,
ce2918cb 767 .instance_size = sizeof(SpaprDrcPhysical),
f224d35b 768 .class_init = spapr_drc_physical_class_init,
2d335818
DG
769 .abstract = true,
770};
771
772static const TypeInfo spapr_drc_logical_info = {
773 .name = TYPE_SPAPR_DRC_LOGICAL,
774 .parent = TYPE_SPAPR_DR_CONNECTOR,
f224d35b 775 .class_init = spapr_drc_logical_class_init,
2d335818
DG
776 .abstract = true,
777};
778
779static const TypeInfo spapr_drc_cpu_info = {
780 .name = TYPE_SPAPR_DRC_CPU,
781 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818
DG
782 .class_init = spapr_drc_cpu_class_init,
783};
784
785static const TypeInfo spapr_drc_pci_info = {
786 .name = TYPE_SPAPR_DRC_PCI,
787 .parent = TYPE_SPAPR_DRC_PHYSICAL,
2d335818
DG
788 .class_init = spapr_drc_pci_class_init,
789};
790
791static const TypeInfo spapr_drc_lmb_info = {
792 .name = TYPE_SPAPR_DRC_LMB,
793 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818 794 .class_init = spapr_drc_lmb_class_init,
bbf5c878
MR
795};
796
962b6c36
MR
797static const TypeInfo spapr_drc_phb_info = {
798 .name = TYPE_SPAPR_DRC_PHB,
799 .parent = TYPE_SPAPR_DRC_LOGICAL,
ce2918cb 800 .instance_size = sizeof(SpaprDrc),
962b6c36
MR
801 .class_init = spapr_drc_phb_class_init,
802};
803
ee3a71e3
SB
804static const TypeInfo spapr_drc_pmem_info = {
805 .name = TYPE_SPAPR_DRC_PMEM,
806 .parent = TYPE_SPAPR_DRC_LOGICAL,
807 .class_init = spapr_drc_pmem_class_init,
808};
809
bbf5c878
MR
810/* helper functions for external users */
811
ce2918cb 812SpaprDrc *spapr_drc_by_index(uint32_t index)
bbf5c878
MR
813{
814 Object *obj;
f5babeac 815 gchar *name;
bbf5c878 816
f5babeac 817 name = g_strdup_printf("%s/%x", DRC_CONTAINER_PATH, index);
bbf5c878 818 obj = object_resolve_path(name, NULL);
f5babeac 819 g_free(name);
bbf5c878
MR
820
821 return !obj ? NULL : SPAPR_DR_CONNECTOR(obj);
822}
823
ce2918cb 824SpaprDrc *spapr_drc_by_id(const char *type, uint32_t id)
bbf5c878 825{
ce2918cb 826 SpaprDrcClass *drck
fbf55397
DG
827 = SPAPR_DR_CONNECTOR_CLASS(object_class_by_name(type));
828
829 return spapr_drc_by_index(drck->typeshift << DRC_INDEX_TYPE_SHIFT
830 | (id & DRC_INDEX_ID_MASK));
bbf5c878 831}
e4b798bb 832
e4b798bb 833/**
9e7d38e8 834 * spapr_dt_drc
e4b798bb
MR
835 *
836 * @fdt: libfdt device tree
837 * @path: path in the DT to generate properties
838 * @owner: parent Object/DeviceState for which to generate DRC
839 * descriptions for
ce2918cb 840 * @drc_type_mask: mask of SpaprDrcType values corresponding
e4b798bb
MR
841 * to the types of DRCs to generate entries for
842 *
843 * generate OF properties to describe DRC topology/indices to guests
844 *
845 * as documented in PAPR+ v2.1, 13.5.2
846 */
9e7d38e8 847int spapr_dt_drc(void *fdt, int offset, Object *owner, uint32_t drc_type_mask)
e4b798bb
MR
848{
849 Object *root_container;
850 ObjectProperty *prop;
7746abd8 851 ObjectPropertyIterator iter;
e4b798bb
MR
852 uint32_t drc_count = 0;
853 GArray *drc_indexes, *drc_power_domains;
854 GString *drc_names, *drc_types;
855 int ret;
856
857 /* the first entry of each properties is a 32-bit integer encoding
858 * the number of elements in the array. we won't know this until
859 * we complete the iteration through all the matching DRCs, but
860 * reserve the space now and set the offsets accordingly so we
861 * can fill them in later.
862 */
863 drc_indexes = g_array_new(false, true, sizeof(uint32_t));
864 drc_indexes = g_array_set_size(drc_indexes, 1);
865 drc_power_domains = g_array_new(false, true, sizeof(uint32_t));
866 drc_power_domains = g_array_set_size(drc_power_domains, 1);
867 drc_names = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
868 drc_types = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
869
870 /* aliases for all DRConnector objects will be rooted in QOM
871 * composition tree at DRC_CONTAINER_PATH
872 */
873 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
874
7746abd8
DB
875 object_property_iter_init(&iter, root_container);
876 while ((prop = object_property_iter_next(&iter))) {
e4b798bb 877 Object *obj;
ce2918cb
DG
878 SpaprDrc *drc;
879 SpaprDrcClass *drck;
dbd26f2f 880 char *drc_name = NULL;
e4b798bb
MR
881 uint32_t drc_index, drc_power_domain;
882
883 if (!strstart(prop->type, "link<", NULL)) {
884 continue;
885 }
886
887 obj = object_property_get_link(root_container, prop->name, NULL);
888 drc = SPAPR_DR_CONNECTOR(obj);
889 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
890
891 if (owner && (drc->owner != owner)) {
892 continue;
893 }
894
2d335818 895 if ((spapr_drc_type(drc) & drc_type_mask) == 0) {
e4b798bb
MR
896 continue;
897 }
898
899 drc_count++;
900
901 /* ibm,drc-indexes */
0b55aa91 902 drc_index = cpu_to_be32(spapr_drc_index(drc));
e4b798bb
MR
903 g_array_append_val(drc_indexes, drc_index);
904
905 /* ibm,drc-power-domains */
906 drc_power_domain = cpu_to_be32(-1);
907 g_array_append_val(drc_power_domains, drc_power_domain);
908
909 /* ibm,drc-names */
dbd26f2f
SB
910 drc_name = spapr_drc_name(drc);
911 drc_names = g_string_append(drc_names, drc_name);
e4b798bb 912 drc_names = g_string_insert_len(drc_names, -1, "\0", 1);
dbd26f2f 913 g_free(drc_name);
e4b798bb
MR
914
915 /* ibm,drc-types */
1693ea16 916 drc_types = g_string_append(drc_types, drck->typename);
e4b798bb
MR
917 drc_types = g_string_insert_len(drc_types, -1, "\0", 1);
918 }
919
920 /* now write the drc count into the space we reserved at the
921 * beginning of the arrays previously
922 */
923 *(uint32_t *)drc_indexes->data = cpu_to_be32(drc_count);
924 *(uint32_t *)drc_power_domains->data = cpu_to_be32(drc_count);
925 *(uint32_t *)drc_names->str = cpu_to_be32(drc_count);
926 *(uint32_t *)drc_types->str = cpu_to_be32(drc_count);
927
9e7d38e8 928 ret = fdt_setprop(fdt, offset, "ibm,drc-indexes",
e4b798bb
MR
929 drc_indexes->data,
930 drc_indexes->len * sizeof(uint32_t));
931 if (ret) {
ce9863b7 932 error_report("Couldn't create ibm,drc-indexes property");
e4b798bb
MR
933 goto out;
934 }
935
9e7d38e8 936 ret = fdt_setprop(fdt, offset, "ibm,drc-power-domains",
e4b798bb
MR
937 drc_power_domains->data,
938 drc_power_domains->len * sizeof(uint32_t));
939 if (ret) {
ce9863b7 940 error_report("Couldn't finalize ibm,drc-power-domains property");
e4b798bb
MR
941 goto out;
942 }
943
9e7d38e8 944 ret = fdt_setprop(fdt, offset, "ibm,drc-names",
e4b798bb
MR
945 drc_names->str, drc_names->len);
946 if (ret) {
ce9863b7 947 error_report("Couldn't finalize ibm,drc-names property");
e4b798bb
MR
948 goto out;
949 }
950
9e7d38e8 951 ret = fdt_setprop(fdt, offset, "ibm,drc-types",
e4b798bb
MR
952 drc_types->str, drc_types->len);
953 if (ret) {
ce9863b7 954 error_report("Couldn't finalize ibm,drc-types property");
e4b798bb
MR
955 goto out;
956 }
957
958out:
959 g_array_free(drc_indexes, true);
960 g_array_free(drc_power_domains, true);
961 g_string_free(drc_names, true);
962 g_string_free(drc_types, true);
963
964 return ret;
965}
b89b3d39
DG
966
967/*
968 * RTAS calls
969 */
970
7b7258f8 971static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state)
b89b3d39 972{
ce2918cb
DG
973 SpaprDrc *drc = spapr_drc_by_index(idx);
974 SpaprDrcClass *drck;
7b7258f8
DG
975
976 if (!drc) {
0dfabd39 977 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
978 }
979
0dfabd39
DG
980 trace_spapr_drc_set_isolation_state(spapr_drc_index(drc), state);
981
7b7258f8 982 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
0dfabd39
DG
983
984 switch (state) {
985 case SPAPR_DR_ISOLATION_STATE_ISOLATED:
986 return drck->isolate(drc);
987
988 case SPAPR_DR_ISOLATION_STATE_UNISOLATED:
989 return drck->unisolate(drc);
990
991 default:
992 return RTAS_OUT_PARAM_ERROR;
993 }
b89b3d39
DG
994}
995
7b7258f8 996static uint32_t rtas_set_allocation_state(uint32_t idx, uint32_t state)
b89b3d39 997{
ce2918cb 998 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 999
61736732
DG
1000 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_LOGICAL)) {
1001 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
1002 }
1003
61736732
DG
1004 trace_spapr_drc_set_allocation_state(spapr_drc_index(drc), state);
1005
1006 switch (state) {
1007 case SPAPR_DR_ALLOCATION_STATE_USABLE:
1008 return drc_set_usable(drc);
1009
1010 case SPAPR_DR_ALLOCATION_STATE_UNUSABLE:
1011 return drc_set_unusable(drc);
1012
1013 default:
1014 return RTAS_OUT_PARAM_ERROR;
1015 }
7b7258f8 1016}
b89b3d39 1017
cd74d27e 1018static uint32_t rtas_set_dr_indicator(uint32_t idx, uint32_t state)
7b7258f8 1019{
ce2918cb 1020 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 1021
67fea71b
DG
1022 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_PHYSICAL)) {
1023 return RTAS_OUT_NO_SUCH_INDICATOR;
1024 }
1025 if ((state != SPAPR_DR_INDICATOR_INACTIVE)
1026 && (state != SPAPR_DR_INDICATOR_ACTIVE)
1027 && (state != SPAPR_DR_INDICATOR_IDENTIFY)
1028 && (state != SPAPR_DR_INDICATOR_ACTION)) {
1029 return RTAS_OUT_PARAM_ERROR; /* bad state parameter */
7b7258f8
DG
1030 }
1031
cd74d27e 1032 trace_spapr_drc_set_dr_indicator(idx, state);
67fea71b 1033 SPAPR_DRC_PHYSICAL(drc)->dr_indicator = state;
cd74d27e 1034 return RTAS_OUT_SUCCESS;
7b7258f8
DG
1035}
1036
ce2918cb 1037static void rtas_set_indicator(PowerPCCPU *cpu, SpaprMachineState *spapr,
7b7258f8
DG
1038 uint32_t token,
1039 uint32_t nargs, target_ulong args,
1040 uint32_t nret, target_ulong rets)
1041{
1042 uint32_t type, idx, state;
1043 uint32_t ret = RTAS_OUT_SUCCESS;
1044
1045 if (nargs != 3 || nret != 1) {
b89b3d39
DG
1046 ret = RTAS_OUT_PARAM_ERROR;
1047 goto out;
1048 }
b89b3d39 1049
7b7258f8
DG
1050 type = rtas_ld(args, 0);
1051 idx = rtas_ld(args, 1);
1052 state = rtas_ld(args, 2);
1053
1054 switch (type) {
b89b3d39 1055 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
7b7258f8 1056 ret = rtas_set_isolation_state(idx, state);
b89b3d39
DG
1057 break;
1058 case RTAS_SENSOR_TYPE_DR:
cd74d27e 1059 ret = rtas_set_dr_indicator(idx, state);
b89b3d39
DG
1060 break;
1061 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
7b7258f8 1062 ret = rtas_set_allocation_state(idx, state);
b89b3d39
DG
1063 break;
1064 default:
7b7258f8 1065 ret = RTAS_OUT_NOT_SUPPORTED;
b89b3d39
DG
1066 }
1067
1068out:
1069 rtas_st(rets, 0, ret);
b89b3d39
DG
1070}
1071
ce2918cb 1072static void rtas_get_sensor_state(PowerPCCPU *cpu, SpaprMachineState *spapr,
b89b3d39
DG
1073 uint32_t token, uint32_t nargs,
1074 target_ulong args, uint32_t nret,
1075 target_ulong rets)
1076{
1077 uint32_t sensor_type;
1078 uint32_t sensor_index;
1079 uint32_t sensor_state = 0;
ce2918cb
DG
1080 SpaprDrc *drc;
1081 SpaprDrcClass *drck;
b89b3d39
DG
1082 uint32_t ret = RTAS_OUT_SUCCESS;
1083
1084 if (nargs != 2 || nret != 2) {
1085 ret = RTAS_OUT_PARAM_ERROR;
1086 goto out;
1087 }
1088
1089 sensor_type = rtas_ld(args, 0);
1090 sensor_index = rtas_ld(args, 1);
1091
1092 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) {
1093 /* currently only DR-related sensors are implemented */
1094 trace_spapr_rtas_get_sensor_state_not_supported(sensor_index,
1095 sensor_type);
1096 ret = RTAS_OUT_NOT_SUPPORTED;
1097 goto out;
1098 }
1099
fbf55397 1100 drc = spapr_drc_by_index(sensor_index);
b89b3d39
DG
1101 if (!drc) {
1102 trace_spapr_rtas_get_sensor_state_invalid(sensor_index);
1103 ret = RTAS_OUT_PARAM_ERROR;
1104 goto out;
1105 }
1106 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
f224d35b 1107 sensor_state = drck->dr_entity_sense(drc);
b89b3d39
DG
1108
1109out:
1110 rtas_st(rets, 0, ret);
1111 rtas_st(rets, 1, sensor_state);
1112}
1113
1114/* configure-connector work area offsets, int32_t units for field
1115 * indexes, bytes for field offset/len values.
1116 *
1117 * as documented by PAPR+ v2.7, 13.5.3.5
1118 */
1119#define CC_IDX_NODE_NAME_OFFSET 2
1120#define CC_IDX_PROP_NAME_OFFSET 2
1121#define CC_IDX_PROP_LEN 3
1122#define CC_IDX_PROP_DATA_OFFSET 4
1123#define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4)
1124#define CC_WA_LEN 4096
1125
1126static void configure_connector_st(target_ulong addr, target_ulong offset,
1127 const void *buf, size_t len)
1128{
1129 cpu_physical_memory_write(ppc64_phys_to_real(addr + offset),
1130 buf, MIN(len, CC_WA_LEN - offset));
1131}
1132
b89b3d39 1133static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
ce2918cb 1134 SpaprMachineState *spapr,
b89b3d39
DG
1135 uint32_t token, uint32_t nargs,
1136 target_ulong args, uint32_t nret,
1137 target_ulong rets)
1138{
1139 uint64_t wa_addr;
1140 uint64_t wa_offset;
1141 uint32_t drc_index;
ce2918cb
DG
1142 SpaprDrc *drc;
1143 SpaprDrcClass *drck;
1144 SpaprDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE;
b89b3d39 1145 int rc;
b89b3d39
DG
1146
1147 if (nargs != 2 || nret != 1) {
1148 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
1149 return;
1150 }
1151
1152 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0);
1153
1154 drc_index = rtas_ld(wa_addr, 0);
fbf55397 1155 drc = spapr_drc_by_index(drc_index);
b89b3d39
DG
1156 if (!drc) {
1157 trace_spapr_rtas_ibm_configure_connector_invalid(drc_index);
1158 rc = RTAS_OUT_PARAM_ERROR;
1159 goto out;
1160 }
1161
9d4c0f4f 1162 if ((drc->state != SPAPR_DRC_STATE_LOGICAL_UNISOLATE)
188bfe1b
BR
1163 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_UNISOLATE)
1164 && (drc->state != SPAPR_DRC_STATE_LOGICAL_CONFIGURED)
1165 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_CONFIGURED)) {
1166 /*
1167 * Need to unisolate the device before configuring
1168 * or it should already be in configured state to
1169 * allow configure-connector be called repeatedly.
1170 */
b89b3d39
DG
1171 rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE;
1172 goto out;
1173 }
1174
9d4c0f4f
DG
1175 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
1176
d9c95c71
GK
1177 if (!drc->fdt) {
1178 Error *local_err = NULL;
1179 void *fdt;
1180 int fdt_size;
1181
1182 fdt = create_device_tree(&fdt_size);
1183
1184 if (drck->dt_populate(drc, spapr, fdt, &drc->fdt_start_offset,
1185 &local_err)) {
1186 g_free(fdt);
1187 error_free(local_err);
1188 rc = SPAPR_DR_CC_RESPONSE_ERROR;
1189 goto out;
1190 }
1191
1192 drc->fdt = fdt;
1193 drc->ccs_offset = drc->fdt_start_offset;
1194 drc->ccs_depth = 0;
1195 }
1196
b89b3d39
DG
1197 do {
1198 uint32_t tag;
1199 const char *name;
1200 const struct fdt_property *prop;
1201 int fdt_offset_next, prop_len;
1202
4445b1d2 1203 tag = fdt_next_tag(drc->fdt, drc->ccs_offset, &fdt_offset_next);
b89b3d39
DG
1204
1205 switch (tag) {
1206 case FDT_BEGIN_NODE:
4445b1d2
DG
1207 drc->ccs_depth++;
1208 name = fdt_get_name(drc->fdt, drc->ccs_offset, NULL);
b89b3d39
DG
1209
1210 /* provide the name of the next OF node */
1211 wa_offset = CC_VAL_DATA_OFFSET;
1212 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset);
1213 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1214 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD;
1215 break;
1216 case FDT_END_NODE:
4445b1d2
DG
1217 drc->ccs_depth--;
1218 if (drc->ccs_depth == 0) {
0b55aa91 1219 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
1220
1221 /* done sending the device tree, move to configured state */
0b55aa91 1222 trace_spapr_drc_set_configured(drc_index);
9d4c0f4f 1223 drc->state = drck->ready_state;
188bfe1b
BR
1224 /*
1225 * Ensure that we are able to send the FDT fragment
1226 * again via configure-connector call if the guest requests.
1227 */
1228 drc->ccs_offset = drc->fdt_start_offset;
1229 drc->ccs_depth = 0;
1230 fdt_offset_next = drc->fdt_start_offset;
b89b3d39
DG
1231 resp = SPAPR_DR_CC_RESPONSE_SUCCESS;
1232 } else {
1233 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT;
1234 }
1235 break;
1236 case FDT_PROP:
4445b1d2 1237 prop = fdt_get_property_by_offset(drc->fdt, drc->ccs_offset,
b89b3d39 1238 &prop_len);
88af6ea5 1239 name = fdt_string(drc->fdt, fdt32_to_cpu(prop->nameoff));
b89b3d39
DG
1240
1241 /* provide the name of the next OF property */
1242 wa_offset = CC_VAL_DATA_OFFSET;
1243 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset);
1244 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1245
1246 /* provide the length and value of the OF property. data gets
1247 * placed immediately after NULL terminator of the OF property's
1248 * name string
1249 */
1250 wa_offset += strlen(name) + 1,
1251 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len);
1252 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset);
1253 configure_connector_st(wa_addr, wa_offset, prop->data, prop_len);
1254 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY;
1255 break;
1256 case FDT_END:
1257 resp = SPAPR_DR_CC_RESPONSE_ERROR;
1258 default:
1259 /* keep seeking for an actionable tag */
1260 break;
1261 }
4445b1d2
DG
1262 if (drc->ccs_offset >= 0) {
1263 drc->ccs_offset = fdt_offset_next;
b89b3d39
DG
1264 }
1265 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE);
1266
1267 rc = resp;
1268out:
1269 rtas_st(rets, 0, rc);
1270}
1271
1272static void spapr_drc_register_types(void)
1273{
1274 type_register_static(&spapr_dr_connector_info);
2d335818
DG
1275 type_register_static(&spapr_drc_physical_info);
1276 type_register_static(&spapr_drc_logical_info);
1277 type_register_static(&spapr_drc_cpu_info);
1278 type_register_static(&spapr_drc_pci_info);
1279 type_register_static(&spapr_drc_lmb_info);
962b6c36 1280 type_register_static(&spapr_drc_phb_info);
ee3a71e3 1281 type_register_static(&spapr_drc_pmem_info);
b89b3d39
DG
1282
1283 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator",
1284 rtas_set_indicator);
1285 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state",
1286 rtas_get_sensor_state);
1287 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector",
1288 rtas_ibm_configure_connector);
1289}
1290type_init(spapr_drc_register_types)