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CommitLineData
bbf5c878
MR
1/*
2 * QEMU SPAPR Dynamic Reconfiguration Connector Implementation
3 *
4 * Copyright IBM Corp. 2014
5 *
6 * Authors:
7 * Michael Roth <mdroth@linux.vnet.ibm.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2 or later.
10 * See the COPYING file in the top-level directory.
11 */
12
0d75590d 13#include "qemu/osdep.h"
da34e65c 14#include "qapi/error.h"
15280c36 15#include "qapi/qmp/qnull.h"
4771d756 16#include "cpu.h"
f348b6d1 17#include "qemu/cutils.h"
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18#include "hw/ppc/spapr_drc.h"
19#include "qom/object.h"
d6454270 20#include "migration/vmstate.h"
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21#include "qapi/visitor.h"
22#include "qemu/error-report.h"
0cb688d2 23#include "hw/ppc/spapr.h" /* for RTAS return codes */
31834723 24#include "hw/pci-host/spapr.h" /* spapr_phb_remove_pci_device_cb callback */
ee3a71e3 25#include "hw/ppc/spapr_nvdimm.h"
d9c95c71 26#include "sysemu/device_tree.h"
71e8a915 27#include "sysemu/reset.h"
24ac7755 28#include "trace.h"
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29
30#define DRC_CONTAINER_PATH "/dr-connector"
31#define DRC_INDEX_TYPE_SHIFT 28
627c2ef7 32#define DRC_INDEX_ID_MASK ((1ULL << DRC_INDEX_TYPE_SHIFT) - 1)
bbf5c878 33
ce2918cb 34SpaprDrcType spapr_drc_type(SpaprDrc *drc)
2d335818 35{
ce2918cb 36 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818
DG
37
38 return 1 << drck->typeshift;
39}
40
ce2918cb 41uint32_t spapr_drc_index(SpaprDrc *drc)
bbf5c878 42{
ce2918cb 43 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
2d335818 44
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45 /* no set format for a drc index: it only needs to be globally
46 * unique. this is how we encode the DRC type on bare-metal
47 * however, so might as well do that here
48 */
2d335818
DG
49 return (drck->typeshift << DRC_INDEX_TYPE_SHIFT)
50 | (drc->id & DRC_INDEX_ID_MASK);
bbf5c878
MR
51}
52
ce2918cb 53static uint32_t drc_isolate_physical(SpaprDrc *drc)
bbf5c878 54{
9d4c0f4f
DG
55 switch (drc->state) {
56 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
57 return RTAS_OUT_SUCCESS; /* Nothing to do */
58 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
59 break; /* see below */
60 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
61 return RTAS_OUT_PARAM_ERROR; /* not allowed */
62 default:
63 g_assert_not_reached();
64 }
65
9d4c0f4f 66 drc->state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
0dfabd39 67
f1c52354 68 if (drc->unplug_requested) {
0dfabd39 69 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
70 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
71 spapr_drc_detach(drc);
9d1852ce 72 }
0dfabd39
DG
73
74 return RTAS_OUT_SUCCESS;
75}
76
ce2918cb 77static uint32_t drc_unisolate_physical(SpaprDrc *drc)
0dfabd39 78{
9d4c0f4f
DG
79 switch (drc->state) {
80 case SPAPR_DRC_STATE_PHYSICAL_UNISOLATE:
81 case SPAPR_DRC_STATE_PHYSICAL_CONFIGURED:
82 return RTAS_OUT_SUCCESS; /* Nothing to do */
83 case SPAPR_DRC_STATE_PHYSICAL_POWERON:
84 break; /* see below */
85 default:
86 g_assert_not_reached();
87 }
88
0dfabd39
DG
89 /* cannot unisolate a non-existent resource, and, or resources
90 * which are in an 'UNUSABLE' allocation state. (PAPR 2.7,
91 * 13.5.3.5)
92 */
93 if (!drc->dev) {
94 return RTAS_OUT_NO_SUCH_INDICATOR;
95 }
96
9d4c0f4f 97 drc->state = SPAPR_DRC_STATE_PHYSICAL_UNISOLATE;
4445b1d2
DG
98 drc->ccs_offset = drc->fdt_start_offset;
99 drc->ccs_depth = 0;
0dfabd39
DG
100
101 return RTAS_OUT_SUCCESS;
102}
103
ce2918cb 104static uint32_t drc_isolate_logical(SpaprDrc *drc)
0dfabd39 105{
9d4c0f4f
DG
106 switch (drc->state) {
107 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
108 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
109 return RTAS_OUT_SUCCESS; /* Nothing to do */
110 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
111 break; /* see below */
112 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
113 return RTAS_OUT_PARAM_ERROR; /* not allowed */
114 default:
115 g_assert_not_reached();
116 }
117
cf632463
BR
118 /*
119 * Fail any requests to ISOLATE the LMB DRC if this LMB doesn't
120 * belong to a DIMM device that is marked for removal.
121 *
122 * Currently the guest userspace tool drmgr that drives the memory
123 * hotplug/unplug will just try to remove a set of 'removable' LMBs
124 * in response to a hot unplug request that is based on drc-count.
125 * If the LMB being removed doesn't belong to a DIMM device that is
126 * actually being unplugged, fail the isolation request here.
127 */
0dfabd39 128 if (spapr_drc_type(drc) == SPAPR_DR_CONNECTOR_TYPE_LMB
f1c52354 129 && !drc->unplug_requested) {
0dfabd39 130 return RTAS_OUT_HW_ERROR;
cf632463
BR
131 }
132
9d4c0f4f 133 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
bbf5c878 134
0dfabd39
DG
135 /* if we're awaiting release, but still in an unconfigured state,
136 * it's likely the guest is still in the process of configuring
137 * the device and is transitioning the devices to an ISOLATED
138 * state as a part of that process. so we only complete the
139 * removal when this transition happens for a device in a
140 * configured state, as suggested by the state diagram from PAPR+
141 * 2.7, 13.4
142 */
f1c52354 143 if (drc->unplug_requested) {
0dfabd39 144 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
145 trace_spapr_drc_set_isolation_state_finalizing(drc_index);
146 spapr_drc_detach(drc);
bbf5c878 147 }
0dfabd39
DG
148 return RTAS_OUT_SUCCESS;
149}
150
ce2918cb 151static uint32_t drc_unisolate_logical(SpaprDrc *drc)
0dfabd39 152{
9d4c0f4f
DG
153 switch (drc->state) {
154 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
155 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
156 return RTAS_OUT_SUCCESS; /* Nothing to do */
157 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
158 break; /* see below */
159 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
160 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
161 default:
162 g_assert_not_reached();
0dfabd39
DG
163 }
164
9d4c0f4f
DG
165 /* Move to AVAILABLE state should have ensured device was present */
166 g_assert(drc->dev);
bbf5c878 167
9d4c0f4f 168 drc->state = SPAPR_DRC_STATE_LOGICAL_UNISOLATE;
4445b1d2
DG
169 drc->ccs_offset = drc->fdt_start_offset;
170 drc->ccs_depth = 0;
171
0cb688d2 172 return RTAS_OUT_SUCCESS;
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173}
174
ce2918cb 175static uint32_t drc_set_usable(SpaprDrc *drc)
bbf5c878 176{
9d4c0f4f
DG
177 switch (drc->state) {
178 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
179 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
180 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
181 return RTAS_OUT_SUCCESS; /* Nothing to do */
182 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
183 break; /* see below */
184 default:
185 g_assert_not_reached();
186 }
187
61736732
DG
188 /* if there's no resource/device associated with the DRC, there's
189 * no way for us to put it in an allocation state consistent with
190 * being 'USABLE'. PAPR 2.7, 13.5.3.4 documents that this should
191 * result in an RTAS return code of -3 / "no such indicator"
192 */
193 if (!drc->dev) {
194 return RTAS_OUT_NO_SUCH_INDICATOR;
195 }
f1c52354 196 if (drc->unplug_requested) {
82a93a1d
DG
197 /* Don't allow the guest to move a device away from UNUSABLE
198 * state when we want to unplug it */
61736732 199 return RTAS_OUT_NO_SUCH_INDICATOR;
9d1852ce
MR
200 }
201
9d4c0f4f 202 drc->state = SPAPR_DRC_STATE_LOGICAL_AVAILABLE;
61736732
DG
203
204 return RTAS_OUT_SUCCESS;
205}
206
ce2918cb 207static uint32_t drc_set_unusable(SpaprDrc *drc)
61736732 208{
9d4c0f4f
DG
209 switch (drc->state) {
210 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
211 return RTAS_OUT_SUCCESS; /* Nothing to do */
212 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
213 break; /* see below */
214 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
215 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
216 return RTAS_OUT_NO_SUCH_INDICATOR; /* not allowed */
217 default:
218 g_assert_not_reached();
219 }
220
221 drc->state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f1c52354 222 if (drc->unplug_requested) {
61736732
DG
223 uint32_t drc_index = spapr_drc_index(drc);
224 trace_spapr_drc_set_allocation_state_finalizing(drc_index);
a8dc47fd 225 spapr_drc_detach(drc);
bbf5c878 226 }
61736732 227
0cb688d2 228 return RTAS_OUT_SUCCESS;
bbf5c878
MR
229}
230
dbd26f2f 231static char *spapr_drc_name(SpaprDrc *drc)
bbf5c878 232{
ce2918cb 233 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
79808336
DG
234
235 /* human-readable name for a DRC to encode into the DT
236 * description. this is mainly only used within a guest in place
237 * of the unique DRC index.
238 *
239 * in the case of VIO/PCI devices, it corresponds to a "location
240 * code" that maps a logical device/function (DRC index) to a
241 * physical (or virtual in the case of VIO) location in the system
242 * by chaining together the "location label" for each
243 * encapsulating component.
244 *
245 * since this is more to do with diagnosing physical hardware
246 * issues than guest compatibility, we choose location codes/DRC
247 * names that adhere to the documented format, but avoid encoding
248 * the entire topology information into the label/code, instead
249 * just using the location codes based on the labels for the
250 * endpoints (VIO/PCI adaptor connectors), which is basically just
251 * "C" followed by an integer ID.
252 *
253 * DRC names as documented by PAPR+ v2.7, 13.5.2.4
254 * location codes as documented by PAPR+ v2.7, 12.3.1.5
255 */
256 return g_strdup_printf("%s%d", drck->drc_name_prefix, drc->id);
bbf5c878
MR
257}
258
bbf5c878
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259/*
260 * dr-entity-sense sensor value
261 * returned via get-sensor-state RTAS calls
262 * as expected by state diagram in PAPR+ 2.7, 13.4
263 * based on the current allocation/indicator/power states
264 * for the DR connector.
265 */
ce2918cb 266static SpaprDREntitySense physical_entity_sense(SpaprDrc *drc)
bbf5c878 267{
f224d35b
DG
268 /* this assumes all PCI devices are assigned to a 'live insertion'
269 * power domain, where QEMU manages power state automatically as
270 * opposed to the guest. present, non-PCI resources are unaffected
271 * by power state.
272 */
273 return drc->dev ? SPAPR_DR_ENTITY_SENSE_PRESENT
274 : SPAPR_DR_ENTITY_SENSE_EMPTY;
275}
276
ce2918cb 277static SpaprDREntitySense logical_entity_sense(SpaprDrc *drc)
f224d35b 278{
9d4c0f4f
DG
279 switch (drc->state) {
280 case SPAPR_DRC_STATE_LOGICAL_UNUSABLE:
f224d35b 281 return SPAPR_DR_ENTITY_SENSE_UNUSABLE;
9d4c0f4f
DG
282 case SPAPR_DRC_STATE_LOGICAL_AVAILABLE:
283 case SPAPR_DRC_STATE_LOGICAL_UNISOLATE:
284 case SPAPR_DRC_STATE_LOGICAL_CONFIGURED:
285 g_assert(drc->dev);
286 return SPAPR_DR_ENTITY_SENSE_PRESENT;
287 default:
288 g_assert_not_reached();
bbf5c878 289 }
bbf5c878
MR
290}
291
d7bce999
EB
292static void prop_get_index(Object *obj, Visitor *v, const char *name,
293 void *opaque, Error **errp)
bbf5c878 294{
ce2918cb 295 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
0b55aa91 296 uint32_t value = spapr_drc_index(drc);
51e72bc1 297 visit_type_uint32(v, name, &value, errp);
bbf5c878
MR
298}
299
d7bce999
EB
300static void prop_get_fdt(Object *obj, Visitor *v, const char *name,
301 void *opaque, Error **errp)
bbf5c878 302{
ce2918cb 303 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
d2f95f4d 304 QNull *null = NULL;
c75304a1 305 Error *err = NULL;
bbf5c878
MR
306 int fdt_offset_next, fdt_offset, fdt_depth;
307 void *fdt;
308
309 if (!drc->fdt) {
d2f95f4d 310 visit_type_null(v, NULL, &null, errp);
cb3e7f08 311 qobject_unref(null);
bbf5c878
MR
312 return;
313 }
314
315 fdt = drc->fdt;
316 fdt_offset = drc->fdt_start_offset;
317 fdt_depth = 0;
318
319 do {
320 const char *name = NULL;
321 const struct fdt_property *prop = NULL;
322 int prop_len = 0, name_len = 0;
323 uint32_t tag;
324
325 tag = fdt_next_tag(fdt, fdt_offset, &fdt_offset_next);
326 switch (tag) {
327 case FDT_BEGIN_NODE:
328 fdt_depth++;
329 name = fdt_get_name(fdt, fdt_offset, &name_len);
62a35aaa 330 if (!visit_start_struct(v, name, NULL, 0, &err)) {
c75304a1
MA
331 error_propagate(errp, err);
332 return;
333 }
bbf5c878
MR
334 break;
335 case FDT_END_NODE:
336 /* shouldn't ever see an FDT_END_NODE before FDT_BEGIN_NODE */
337 g_assert(fdt_depth > 0);
15c2f669 338 visit_check_struct(v, &err);
1158bb2a 339 visit_end_struct(v, NULL);
c75304a1
MA
340 if (err) {
341 error_propagate(errp, err);
342 return;
343 }
bbf5c878
MR
344 fdt_depth--;
345 break;
346 case FDT_PROP: {
347 int i;
348 prop = fdt_get_property_by_offset(fdt, fdt_offset, &prop_len);
349 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
62a35aaa 350 if (!visit_start_list(v, name, NULL, 0, &err)) {
c75304a1
MA
351 error_propagate(errp, err);
352 return;
353 }
bbf5c878 354 for (i = 0; i < prop_len; i++) {
62a35aaa
MA
355 if (!visit_type_uint8(v, NULL, (uint8_t *)&prop->data[i],
356 &err)) {
c75304a1
MA
357 error_propagate(errp, err);
358 return;
359 }
360 }
a4a1c70d 361 visit_check_list(v, &err);
1158bb2a 362 visit_end_list(v, NULL);
a4a1c70d
MA
363 if (err) {
364 error_propagate(errp, err);
365 return;
366 }
bbf5c878
MR
367 break;
368 }
369 default:
e20c6314
PMD
370 error_report("device FDT in unexpected state: %d", tag);
371 abort();
bbf5c878
MR
372 }
373 fdt_offset = fdt_offset_next;
374 } while (fdt_depth != 0);
375}
376
ce2918cb 377void spapr_drc_attach(SpaprDrc *drc, DeviceState *d, Error **errp)
bbf5c878 378{
0b55aa91 379 trace_spapr_drc_attach(spapr_drc_index(drc));
bbf5c878 380
9d4c0f4f 381 if (drc->dev) {
bbf5c878
MR
382 error_setg(errp, "an attached device is still awaiting release");
383 return;
384 }
9d4c0f4f
DG
385 g_assert((drc->state == SPAPR_DRC_STATE_LOGICAL_UNUSABLE)
386 || (drc->state == SPAPR_DRC_STATE_PHYSICAL_POWERON));
bbf5c878 387
bbf5c878 388 drc->dev = d;
d9c95c71 389
bbf5c878
MR
390 object_property_add_link(OBJECT(drc), "device",
391 object_get_typename(OBJECT(drc->dev)),
392 (Object **)(&drc->dev),
d2623129 393 NULL, 0);
bbf5c878
MR
394}
395
ce2918cb 396static void spapr_drc_release(SpaprDrc *drc)
bbf5c878 397{
ce2918cb 398 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
6b762f29
DG
399
400 drck->release(drc->dev);
bbf5c878 401
f1c52354 402 drc->unplug_requested = false;
bbf5c878
MR
403 g_free(drc->fdt);
404 drc->fdt = NULL;
405 drc->fdt_start_offset = 0;
df4fe0b2 406 object_property_del(OBJECT(drc), "device");
bbf5c878 407 drc->dev = NULL;
bbf5c878
MR
408}
409
ce2918cb 410void spapr_drc_detach(SpaprDrc *drc)
9c914e53 411{
ce2918cb 412 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 413
9c914e53
DG
414 trace_spapr_drc_detach(spapr_drc_index(drc));
415
9d4c0f4f 416 g_assert(drc->dev);
a8dc47fd 417
9d4c0f4f 418 drc->unplug_requested = true;
9c914e53 419
9d4c0f4f
DG
420 if (drc->state != drck->empty_state) {
421 trace_spapr_drc_awaiting_quiesce(spapr_drc_index(drc));
9c914e53
DG
422 return;
423 }
424
9c914e53
DG
425 spapr_drc_release(drc);
426}
427
ce2918cb 428void spapr_drc_reset(SpaprDrc *drc)
bbf5c878 429{
ce2918cb 430 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
9d4c0f4f 431
0b55aa91 432 trace_spapr_drc_reset(spapr_drc_index(drc));
b8fdd530 433
bbf5c878 434 /* immediately upon reset we can safely assume DRCs whose devices
4f9242fc 435 * are pending removal can be safely removed.
bbf5c878 436 */
f1c52354 437 if (drc->unplug_requested) {
4f9242fc
DG
438 spapr_drc_release(drc);
439 }
440
4f9242fc 441 if (drc->dev) {
9d4c0f4f
DG
442 /* A device present at reset is ready to go, same as coldplugged */
443 drc->state = drck->ready_state;
188bfe1b
BR
444 /*
445 * Ensure that we are able to send the FDT fragment again
446 * via configure-connector call if the guest requests.
447 */
448 drc->ccs_offset = drc->fdt_start_offset;
449 drc->ccs_depth = 0;
4f9242fc 450 } else {
9d4c0f4f 451 drc->state = drck->empty_state;
188bfe1b
BR
452 drc->ccs_offset = -1;
453 drc->ccs_depth = -1;
bbf5c878
MR
454 }
455}
456
ab858434
GK
457static bool spapr_drc_unplug_requested_needed(void *opaque)
458{
459 return spapr_drc_unplug_requested(opaque);
460}
461
462static const VMStateDescription vmstate_spapr_drc_unplug_requested = {
463 .name = "spapr_drc/unplug_requested",
464 .version_id = 1,
465 .minimum_version_id = 1,
466 .needed = spapr_drc_unplug_requested_needed,
467 .fields = (VMStateField []) {
468 VMSTATE_BOOL(unplug_requested, SpaprDrc),
469 VMSTATE_END_OF_LIST()
470 }
471};
472
4b63db12 473bool spapr_drc_transient(SpaprDrc *drc)
a50919dd 474{
ce2918cb 475 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
a50919dd 476
4b63db12
GK
477 /*
478 * If no dev is plugged in there is no need to migrate the DRC state
479 * nor to reset the DRC at CAS.
480 */
c618e300 481 if (!drc->dev) {
a50919dd
DHB
482 return false;
483 }
484
485 /*
4b63db12
GK
486 * We need to reset the DRC at CAS or to migrate the DRC state if it's
487 * not equal to the expected long-term state, which is the same as the
ab858434 488 * coldplugged initial state, or if an unplug request is pending.
4b63db12 489 */
ab858434
GK
490 return drc->state != drck->ready_state ||
491 spapr_drc_unplug_requested(drc);
a50919dd
DHB
492}
493
4b63db12
GK
494static bool spapr_drc_needed(void *opaque)
495{
496 return spapr_drc_transient(opaque);
497}
498
a50919dd
DHB
499static const VMStateDescription vmstate_spapr_drc = {
500 .name = "spapr_drc",
501 .version_id = 1,
502 .minimum_version_id = 1,
503 .needed = spapr_drc_needed,
504 .fields = (VMStateField []) {
ce2918cb 505 VMSTATE_UINT32(state, SpaprDrc),
a50919dd 506 VMSTATE_END_OF_LIST()
ab858434
GK
507 },
508 .subsections = (const VMStateDescription * []) {
509 &vmstate_spapr_drc_unplug_requested,
510 NULL
a50919dd
DHB
511 }
512};
513
bbf5c878
MR
514static void realize(DeviceState *d, Error **errp)
515{
ce2918cb 516 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 517 Object *root_container;
f5babeac 518 gchar *link_name;
ddfb0baa 519 char *child_name;
bbf5c878 520
0b55aa91 521 trace_spapr_drc_realize(spapr_drc_index(drc));
bbf5c878
MR
522 /* NOTE: we do this as part of realize/unrealize due to the fact
523 * that the guest will communicate with the DRC via RTAS calls
524 * referencing the global DRC index. By unlinking the DRC
525 * from DRC_CONTAINER_PATH/<drc_index> we effectively make it
526 * inaccessible by the guest, since lookups rely on this path
527 * existing in the composition tree
528 */
529 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 530 link_name = g_strdup_printf("%x", spapr_drc_index(drc));
bbf5c878 531 child_name = object_get_canonical_path_component(OBJECT(drc));
0b55aa91 532 trace_spapr_drc_realize_child(spapr_drc_index(drc), child_name);
bbf5c878 533 object_property_add_alias(root_container, link_name,
d2623129 534 drc->owner, child_name);
bf26ae32 535 g_free(child_name);
f5babeac 536 g_free(link_name);
3cad405b 537 vmstate_register(VMSTATE_IF(drc), spapr_drc_index(drc), &vmstate_spapr_drc,
a50919dd 538 drc);
0b55aa91 539 trace_spapr_drc_realize_complete(spapr_drc_index(drc));
bbf5c878
MR
540}
541
b69c3c21 542static void unrealize(DeviceState *d)
bbf5c878 543{
ce2918cb 544 SpaprDrc *drc = SPAPR_DR_CONNECTOR(d);
bbf5c878 545 Object *root_container;
f5babeac 546 gchar *name;
bbf5c878 547
0b55aa91 548 trace_spapr_drc_unrealize(spapr_drc_index(drc));
3cad405b 549 vmstate_unregister(VMSTATE_IF(drc), &vmstate_spapr_drc, drc);
bbf5c878 550 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
f5babeac 551 name = g_strdup_printf("%x", spapr_drc_index(drc));
df4fe0b2 552 object_property_del(root_container, name);
f5babeac 553 g_free(name);
bbf5c878
MR
554}
555
ce2918cb 556SpaprDrc *spapr_dr_connector_new(Object *owner, const char *type,
bbf5c878
MR
557 uint32_t id)
558{
ce2918cb 559 SpaprDrc *drc = SPAPR_DR_CONNECTOR(object_new(type));
94649d42 560 char *prop_name;
bbf5c878 561
bbf5c878
MR
562 drc->id = id;
563 drc->owner = owner;
0b55aa91
DG
564 prop_name = g_strdup_printf("dr-connector[%"PRIu32"]",
565 spapr_drc_index(drc));
d2623129 566 object_property_add_child(owner, prop_name, OBJECT(drc));
f3f41030 567 object_unref(OBJECT(drc));
ce189ab2 568 qdev_realize(DEVICE(drc), NULL, NULL);
94649d42 569 g_free(prop_name);
bbf5c878 570
bbf5c878
MR
571 return drc;
572}
573
574static void spapr_dr_connector_instance_init(Object *obj)
575{
ce2918cb
DG
576 SpaprDrc *drc = SPAPR_DR_CONNECTOR(obj);
577 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
bbf5c878 578
d2623129 579 object_property_add_uint32_ptr(obj, "id", &drc->id, OBJ_PROP_FLAG_READ);
bbf5c878 580 object_property_add(obj, "index", "uint32", prop_get_index,
d2623129 581 NULL, NULL, NULL);
bbf5c878 582 object_property_add(obj, "fdt", "struct", prop_get_fdt,
d2623129 583 NULL, NULL, NULL);
9d4c0f4f 584 drc->state = drck->empty_state;
bbf5c878
MR
585}
586
587static void spapr_dr_connector_class_init(ObjectClass *k, void *data)
588{
589 DeviceClass *dk = DEVICE_CLASS(k);
bbf5c878 590
bbf5c878
MR
591 dk->realize = realize;
592 dk->unrealize = unrealize;
c401ae8c
MA
593 /*
594 * Reason: it crashes FIXME find and document the real reason
595 */
e90f2a8c 596 dk->user_creatable = false;
bbf5c878
MR
597}
598
67fea71b
DG
599static bool drc_physical_needed(void *opaque)
600{
ce2918cb
DG
601 SpaprDrcPhysical *drcp = (SpaprDrcPhysical *)opaque;
602 SpaprDrc *drc = SPAPR_DR_CONNECTOR(drcp);
67fea71b
DG
603
604 if ((drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_ACTIVE))
605 || (!drc->dev && (drcp->dr_indicator == SPAPR_DR_INDICATOR_INACTIVE))) {
606 return false;
607 }
608 return true;
609}
610
611static const VMStateDescription vmstate_spapr_drc_physical = {
612 .name = "spapr_drc/physical",
613 .version_id = 1,
614 .minimum_version_id = 1,
615 .needed = drc_physical_needed,
616 .fields = (VMStateField []) {
ce2918cb 617 VMSTATE_UINT32(dr_indicator, SpaprDrcPhysical),
67fea71b
DG
618 VMSTATE_END_OF_LIST()
619 }
620};
621
622static void drc_physical_reset(void *opaque)
623{
ce2918cb
DG
624 SpaprDrc *drc = SPAPR_DR_CONNECTOR(opaque);
625 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(drc);
67fea71b
DG
626
627 if (drc->dev) {
628 drcp->dr_indicator = SPAPR_DR_INDICATOR_ACTIVE;
629 } else {
630 drcp->dr_indicator = SPAPR_DR_INDICATOR_INACTIVE;
631 }
632}
633
634static void realize_physical(DeviceState *d, Error **errp)
635{
ce2918cb 636 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
67fea71b
DG
637 Error *local_err = NULL;
638
639 realize(d, &local_err);
640 if (local_err) {
641 error_propagate(errp, local_err);
642 return;
643 }
644
3cad405b
MAL
645 vmstate_register(VMSTATE_IF(drcp),
646 spapr_drc_index(SPAPR_DR_CONNECTOR(drcp)),
67fea71b
DG
647 &vmstate_spapr_drc_physical, drcp);
648 qemu_register_reset(drc_physical_reset, drcp);
649}
650
b69c3c21 651static void unrealize_physical(DeviceState *d)
379ae096 652{
ce2918cb 653 SpaprDrcPhysical *drcp = SPAPR_DRC_PHYSICAL(d);
379ae096 654
b69c3c21 655 unrealize(d);
3cad405b 656 vmstate_unregister(VMSTATE_IF(drcp), &vmstate_spapr_drc_physical, drcp);
379ae096
GK
657 qemu_unregister_reset(drc_physical_reset, drcp);
658}
659
f224d35b
DG
660static void spapr_drc_physical_class_init(ObjectClass *k, void *data)
661{
67fea71b 662 DeviceClass *dk = DEVICE_CLASS(k);
ce2918cb 663 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b 664
67fea71b 665 dk->realize = realize_physical;
379ae096 666 dk->unrealize = unrealize_physical;
f224d35b 667 drck->dr_entity_sense = physical_entity_sense;
0dfabd39
DG
668 drck->isolate = drc_isolate_physical;
669 drck->unisolate = drc_unisolate_physical;
9d4c0f4f
DG
670 drck->ready_state = SPAPR_DRC_STATE_PHYSICAL_CONFIGURED;
671 drck->empty_state = SPAPR_DRC_STATE_PHYSICAL_POWERON;
f224d35b
DG
672}
673
674static void spapr_drc_logical_class_init(ObjectClass *k, void *data)
675{
ce2918cb 676 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
f224d35b
DG
677
678 drck->dr_entity_sense = logical_entity_sense;
0dfabd39
DG
679 drck->isolate = drc_isolate_logical;
680 drck->unisolate = drc_unisolate_logical;
9d4c0f4f
DG
681 drck->ready_state = SPAPR_DRC_STATE_LOGICAL_CONFIGURED;
682 drck->empty_state = SPAPR_DRC_STATE_LOGICAL_UNUSABLE;
f224d35b
DG
683}
684
2d335818
DG
685static void spapr_drc_cpu_class_init(ObjectClass *k, void *data)
686{
ce2918cb 687 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
688
689 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_CPU;
1693ea16 690 drck->typename = "CPU";
79808336 691 drck->drc_name_prefix = "CPU ";
6b762f29 692 drck->release = spapr_core_release;
345b12b9 693 drck->dt_populate = spapr_core_dt_populate;
2d335818
DG
694}
695
696static void spapr_drc_pci_class_init(ObjectClass *k, void *data)
697{
ce2918cb 698 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
699
700 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PCI;
1693ea16 701 drck->typename = "28";
79808336 702 drck->drc_name_prefix = "C";
6b762f29 703 drck->release = spapr_phb_remove_pci_device_cb;
46fd0299 704 drck->dt_populate = spapr_pci_dt_populate;
2d335818
DG
705}
706
707static void spapr_drc_lmb_class_init(ObjectClass *k, void *data)
708{
ce2918cb 709 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
2d335818
DG
710
711 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_LMB;
1693ea16 712 drck->typename = "MEM";
79808336 713 drck->drc_name_prefix = "LMB ";
6b762f29 714 drck->release = spapr_lmb_release;
62d38c9b 715 drck->dt_populate = spapr_lmb_dt_populate;
2d335818
DG
716}
717
962b6c36
MR
718static void spapr_drc_phb_class_init(ObjectClass *k, void *data)
719{
ce2918cb 720 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
962b6c36
MR
721
722 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PHB;
723 drck->typename = "PHB";
724 drck->drc_name_prefix = "PHB ";
bb2bdd81
GK
725 drck->release = spapr_phb_release;
726 drck->dt_populate = spapr_phb_dt_populate;
962b6c36
MR
727}
728
ee3a71e3
SB
729static void spapr_drc_pmem_class_init(ObjectClass *k, void *data)
730{
731 SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_CLASS(k);
732
733 drck->typeshift = SPAPR_DR_CONNECTOR_TYPE_SHIFT_PMEM;
734 drck->typename = "PMEM";
735 drck->drc_name_prefix = "PMEM ";
736 drck->release = NULL;
737 drck->dt_populate = spapr_pmem_dt_populate;
738}
739
bbf5c878
MR
740static const TypeInfo spapr_dr_connector_info = {
741 .name = TYPE_SPAPR_DR_CONNECTOR,
742 .parent = TYPE_DEVICE,
ce2918cb 743 .instance_size = sizeof(SpaprDrc),
bbf5c878 744 .instance_init = spapr_dr_connector_instance_init,
ce2918cb 745 .class_size = sizeof(SpaprDrcClass),
bbf5c878 746 .class_init = spapr_dr_connector_class_init,
2d335818
DG
747 .abstract = true,
748};
749
750static const TypeInfo spapr_drc_physical_info = {
751 .name = TYPE_SPAPR_DRC_PHYSICAL,
752 .parent = TYPE_SPAPR_DR_CONNECTOR,
ce2918cb 753 .instance_size = sizeof(SpaprDrcPhysical),
f224d35b 754 .class_init = spapr_drc_physical_class_init,
2d335818
DG
755 .abstract = true,
756};
757
758static const TypeInfo spapr_drc_logical_info = {
759 .name = TYPE_SPAPR_DRC_LOGICAL,
760 .parent = TYPE_SPAPR_DR_CONNECTOR,
f224d35b 761 .class_init = spapr_drc_logical_class_init,
2d335818
DG
762 .abstract = true,
763};
764
765static const TypeInfo spapr_drc_cpu_info = {
766 .name = TYPE_SPAPR_DRC_CPU,
767 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818
DG
768 .class_init = spapr_drc_cpu_class_init,
769};
770
771static const TypeInfo spapr_drc_pci_info = {
772 .name = TYPE_SPAPR_DRC_PCI,
773 .parent = TYPE_SPAPR_DRC_PHYSICAL,
2d335818
DG
774 .class_init = spapr_drc_pci_class_init,
775};
776
777static const TypeInfo spapr_drc_lmb_info = {
778 .name = TYPE_SPAPR_DRC_LMB,
779 .parent = TYPE_SPAPR_DRC_LOGICAL,
2d335818 780 .class_init = spapr_drc_lmb_class_init,
bbf5c878
MR
781};
782
962b6c36
MR
783static const TypeInfo spapr_drc_phb_info = {
784 .name = TYPE_SPAPR_DRC_PHB,
785 .parent = TYPE_SPAPR_DRC_LOGICAL,
ce2918cb 786 .instance_size = sizeof(SpaprDrc),
962b6c36
MR
787 .class_init = spapr_drc_phb_class_init,
788};
789
ee3a71e3
SB
790static const TypeInfo spapr_drc_pmem_info = {
791 .name = TYPE_SPAPR_DRC_PMEM,
792 .parent = TYPE_SPAPR_DRC_LOGICAL,
793 .class_init = spapr_drc_pmem_class_init,
794};
795
bbf5c878
MR
796/* helper functions for external users */
797
ce2918cb 798SpaprDrc *spapr_drc_by_index(uint32_t index)
bbf5c878
MR
799{
800 Object *obj;
f5babeac 801 gchar *name;
bbf5c878 802
f5babeac 803 name = g_strdup_printf("%s/%x", DRC_CONTAINER_PATH, index);
bbf5c878 804 obj = object_resolve_path(name, NULL);
f5babeac 805 g_free(name);
bbf5c878
MR
806
807 return !obj ? NULL : SPAPR_DR_CONNECTOR(obj);
808}
809
ce2918cb 810SpaprDrc *spapr_drc_by_id(const char *type, uint32_t id)
bbf5c878 811{
ce2918cb 812 SpaprDrcClass *drck
fbf55397
DG
813 = SPAPR_DR_CONNECTOR_CLASS(object_class_by_name(type));
814
815 return spapr_drc_by_index(drck->typeshift << DRC_INDEX_TYPE_SHIFT
816 | (id & DRC_INDEX_ID_MASK));
bbf5c878 817}
e4b798bb 818
e4b798bb 819/**
9e7d38e8 820 * spapr_dt_drc
e4b798bb
MR
821 *
822 * @fdt: libfdt device tree
823 * @path: path in the DT to generate properties
824 * @owner: parent Object/DeviceState for which to generate DRC
825 * descriptions for
ce2918cb 826 * @drc_type_mask: mask of SpaprDrcType values corresponding
e4b798bb
MR
827 * to the types of DRCs to generate entries for
828 *
829 * generate OF properties to describe DRC topology/indices to guests
830 *
831 * as documented in PAPR+ v2.1, 13.5.2
832 */
9e7d38e8 833int spapr_dt_drc(void *fdt, int offset, Object *owner, uint32_t drc_type_mask)
e4b798bb
MR
834{
835 Object *root_container;
836 ObjectProperty *prop;
7746abd8 837 ObjectPropertyIterator iter;
e4b798bb
MR
838 uint32_t drc_count = 0;
839 GArray *drc_indexes, *drc_power_domains;
840 GString *drc_names, *drc_types;
841 int ret;
842
843 /* the first entry of each properties is a 32-bit integer encoding
844 * the number of elements in the array. we won't know this until
845 * we complete the iteration through all the matching DRCs, but
846 * reserve the space now and set the offsets accordingly so we
847 * can fill them in later.
848 */
849 drc_indexes = g_array_new(false, true, sizeof(uint32_t));
850 drc_indexes = g_array_set_size(drc_indexes, 1);
851 drc_power_domains = g_array_new(false, true, sizeof(uint32_t));
852 drc_power_domains = g_array_set_size(drc_power_domains, 1);
853 drc_names = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
854 drc_types = g_string_set_size(g_string_new(NULL), sizeof(uint32_t));
855
856 /* aliases for all DRConnector objects will be rooted in QOM
857 * composition tree at DRC_CONTAINER_PATH
858 */
859 root_container = container_get(object_get_root(), DRC_CONTAINER_PATH);
860
7746abd8
DB
861 object_property_iter_init(&iter, root_container);
862 while ((prop = object_property_iter_next(&iter))) {
e4b798bb 863 Object *obj;
ce2918cb
DG
864 SpaprDrc *drc;
865 SpaprDrcClass *drck;
dbd26f2f 866 char *drc_name = NULL;
e4b798bb
MR
867 uint32_t drc_index, drc_power_domain;
868
869 if (!strstart(prop->type, "link<", NULL)) {
870 continue;
871 }
872
552d7f49
MA
873 obj = object_property_get_link(root_container, prop->name,
874 &error_abort);
e4b798bb
MR
875 drc = SPAPR_DR_CONNECTOR(obj);
876 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
877
878 if (owner && (drc->owner != owner)) {
879 continue;
880 }
881
2d335818 882 if ((spapr_drc_type(drc) & drc_type_mask) == 0) {
e4b798bb
MR
883 continue;
884 }
885
886 drc_count++;
887
888 /* ibm,drc-indexes */
0b55aa91 889 drc_index = cpu_to_be32(spapr_drc_index(drc));
e4b798bb
MR
890 g_array_append_val(drc_indexes, drc_index);
891
892 /* ibm,drc-power-domains */
893 drc_power_domain = cpu_to_be32(-1);
894 g_array_append_val(drc_power_domains, drc_power_domain);
895
896 /* ibm,drc-names */
dbd26f2f
SB
897 drc_name = spapr_drc_name(drc);
898 drc_names = g_string_append(drc_names, drc_name);
e4b798bb 899 drc_names = g_string_insert_len(drc_names, -1, "\0", 1);
dbd26f2f 900 g_free(drc_name);
e4b798bb
MR
901
902 /* ibm,drc-types */
1693ea16 903 drc_types = g_string_append(drc_types, drck->typename);
e4b798bb
MR
904 drc_types = g_string_insert_len(drc_types, -1, "\0", 1);
905 }
906
907 /* now write the drc count into the space we reserved at the
908 * beginning of the arrays previously
909 */
910 *(uint32_t *)drc_indexes->data = cpu_to_be32(drc_count);
911 *(uint32_t *)drc_power_domains->data = cpu_to_be32(drc_count);
912 *(uint32_t *)drc_names->str = cpu_to_be32(drc_count);
913 *(uint32_t *)drc_types->str = cpu_to_be32(drc_count);
914
9e7d38e8 915 ret = fdt_setprop(fdt, offset, "ibm,drc-indexes",
e4b798bb
MR
916 drc_indexes->data,
917 drc_indexes->len * sizeof(uint32_t));
918 if (ret) {
ce9863b7 919 error_report("Couldn't create ibm,drc-indexes property");
e4b798bb
MR
920 goto out;
921 }
922
9e7d38e8 923 ret = fdt_setprop(fdt, offset, "ibm,drc-power-domains",
e4b798bb
MR
924 drc_power_domains->data,
925 drc_power_domains->len * sizeof(uint32_t));
926 if (ret) {
ce9863b7 927 error_report("Couldn't finalize ibm,drc-power-domains property");
e4b798bb
MR
928 goto out;
929 }
930
9e7d38e8 931 ret = fdt_setprop(fdt, offset, "ibm,drc-names",
e4b798bb
MR
932 drc_names->str, drc_names->len);
933 if (ret) {
ce9863b7 934 error_report("Couldn't finalize ibm,drc-names property");
e4b798bb
MR
935 goto out;
936 }
937
9e7d38e8 938 ret = fdt_setprop(fdt, offset, "ibm,drc-types",
e4b798bb
MR
939 drc_types->str, drc_types->len);
940 if (ret) {
ce9863b7 941 error_report("Couldn't finalize ibm,drc-types property");
e4b798bb
MR
942 goto out;
943 }
944
945out:
946 g_array_free(drc_indexes, true);
947 g_array_free(drc_power_domains, true);
948 g_string_free(drc_names, true);
949 g_string_free(drc_types, true);
950
951 return ret;
952}
b89b3d39
DG
953
954/*
955 * RTAS calls
956 */
957
7b7258f8 958static uint32_t rtas_set_isolation_state(uint32_t idx, uint32_t state)
b89b3d39 959{
ce2918cb
DG
960 SpaprDrc *drc = spapr_drc_by_index(idx);
961 SpaprDrcClass *drck;
7b7258f8
DG
962
963 if (!drc) {
0dfabd39 964 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
965 }
966
0dfabd39
DG
967 trace_spapr_drc_set_isolation_state(spapr_drc_index(drc), state);
968
7b7258f8 969 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
0dfabd39
DG
970
971 switch (state) {
972 case SPAPR_DR_ISOLATION_STATE_ISOLATED:
973 return drck->isolate(drc);
974
975 case SPAPR_DR_ISOLATION_STATE_UNISOLATED:
976 return drck->unisolate(drc);
977
978 default:
979 return RTAS_OUT_PARAM_ERROR;
980 }
b89b3d39
DG
981}
982
7b7258f8 983static uint32_t rtas_set_allocation_state(uint32_t idx, uint32_t state)
b89b3d39 984{
ce2918cb 985 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 986
61736732
DG
987 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_LOGICAL)) {
988 return RTAS_OUT_NO_SUCH_INDICATOR;
b89b3d39
DG
989 }
990
61736732
DG
991 trace_spapr_drc_set_allocation_state(spapr_drc_index(drc), state);
992
993 switch (state) {
994 case SPAPR_DR_ALLOCATION_STATE_USABLE:
995 return drc_set_usable(drc);
996
997 case SPAPR_DR_ALLOCATION_STATE_UNUSABLE:
998 return drc_set_unusable(drc);
999
1000 default:
1001 return RTAS_OUT_PARAM_ERROR;
1002 }
7b7258f8 1003}
b89b3d39 1004
cd74d27e 1005static uint32_t rtas_set_dr_indicator(uint32_t idx, uint32_t state)
7b7258f8 1006{
ce2918cb 1007 SpaprDrc *drc = spapr_drc_by_index(idx);
b89b3d39 1008
67fea71b
DG
1009 if (!drc || !object_dynamic_cast(OBJECT(drc), TYPE_SPAPR_DRC_PHYSICAL)) {
1010 return RTAS_OUT_NO_SUCH_INDICATOR;
1011 }
1012 if ((state != SPAPR_DR_INDICATOR_INACTIVE)
1013 && (state != SPAPR_DR_INDICATOR_ACTIVE)
1014 && (state != SPAPR_DR_INDICATOR_IDENTIFY)
1015 && (state != SPAPR_DR_INDICATOR_ACTION)) {
1016 return RTAS_OUT_PARAM_ERROR; /* bad state parameter */
7b7258f8
DG
1017 }
1018
cd74d27e 1019 trace_spapr_drc_set_dr_indicator(idx, state);
67fea71b 1020 SPAPR_DRC_PHYSICAL(drc)->dr_indicator = state;
cd74d27e 1021 return RTAS_OUT_SUCCESS;
7b7258f8
DG
1022}
1023
ce2918cb 1024static void rtas_set_indicator(PowerPCCPU *cpu, SpaprMachineState *spapr,
7b7258f8
DG
1025 uint32_t token,
1026 uint32_t nargs, target_ulong args,
1027 uint32_t nret, target_ulong rets)
1028{
1029 uint32_t type, idx, state;
1030 uint32_t ret = RTAS_OUT_SUCCESS;
1031
1032 if (nargs != 3 || nret != 1) {
b89b3d39
DG
1033 ret = RTAS_OUT_PARAM_ERROR;
1034 goto out;
1035 }
b89b3d39 1036
7b7258f8
DG
1037 type = rtas_ld(args, 0);
1038 idx = rtas_ld(args, 1);
1039 state = rtas_ld(args, 2);
1040
1041 switch (type) {
b89b3d39 1042 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
7b7258f8 1043 ret = rtas_set_isolation_state(idx, state);
b89b3d39
DG
1044 break;
1045 case RTAS_SENSOR_TYPE_DR:
cd74d27e 1046 ret = rtas_set_dr_indicator(idx, state);
b89b3d39
DG
1047 break;
1048 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
7b7258f8 1049 ret = rtas_set_allocation_state(idx, state);
b89b3d39
DG
1050 break;
1051 default:
7b7258f8 1052 ret = RTAS_OUT_NOT_SUPPORTED;
b89b3d39
DG
1053 }
1054
1055out:
1056 rtas_st(rets, 0, ret);
b89b3d39
DG
1057}
1058
ce2918cb 1059static void rtas_get_sensor_state(PowerPCCPU *cpu, SpaprMachineState *spapr,
b89b3d39
DG
1060 uint32_t token, uint32_t nargs,
1061 target_ulong args, uint32_t nret,
1062 target_ulong rets)
1063{
1064 uint32_t sensor_type;
1065 uint32_t sensor_index;
1066 uint32_t sensor_state = 0;
ce2918cb
DG
1067 SpaprDrc *drc;
1068 SpaprDrcClass *drck;
b89b3d39
DG
1069 uint32_t ret = RTAS_OUT_SUCCESS;
1070
1071 if (nargs != 2 || nret != 2) {
1072 ret = RTAS_OUT_PARAM_ERROR;
1073 goto out;
1074 }
1075
1076 sensor_type = rtas_ld(args, 0);
1077 sensor_index = rtas_ld(args, 1);
1078
1079 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) {
1080 /* currently only DR-related sensors are implemented */
1081 trace_spapr_rtas_get_sensor_state_not_supported(sensor_index,
1082 sensor_type);
1083 ret = RTAS_OUT_NOT_SUPPORTED;
1084 goto out;
1085 }
1086
fbf55397 1087 drc = spapr_drc_by_index(sensor_index);
b89b3d39
DG
1088 if (!drc) {
1089 trace_spapr_rtas_get_sensor_state_invalid(sensor_index);
1090 ret = RTAS_OUT_PARAM_ERROR;
1091 goto out;
1092 }
1093 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
f224d35b 1094 sensor_state = drck->dr_entity_sense(drc);
b89b3d39
DG
1095
1096out:
1097 rtas_st(rets, 0, ret);
1098 rtas_st(rets, 1, sensor_state);
1099}
1100
1101/* configure-connector work area offsets, int32_t units for field
1102 * indexes, bytes for field offset/len values.
1103 *
1104 * as documented by PAPR+ v2.7, 13.5.3.5
1105 */
1106#define CC_IDX_NODE_NAME_OFFSET 2
1107#define CC_IDX_PROP_NAME_OFFSET 2
1108#define CC_IDX_PROP_LEN 3
1109#define CC_IDX_PROP_DATA_OFFSET 4
1110#define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4)
1111#define CC_WA_LEN 4096
1112
1113static void configure_connector_st(target_ulong addr, target_ulong offset,
1114 const void *buf, size_t len)
1115{
1116 cpu_physical_memory_write(ppc64_phys_to_real(addr + offset),
1117 buf, MIN(len, CC_WA_LEN - offset));
1118}
1119
b89b3d39 1120static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
ce2918cb 1121 SpaprMachineState *spapr,
b89b3d39
DG
1122 uint32_t token, uint32_t nargs,
1123 target_ulong args, uint32_t nret,
1124 target_ulong rets)
1125{
1126 uint64_t wa_addr;
1127 uint64_t wa_offset;
1128 uint32_t drc_index;
ce2918cb
DG
1129 SpaprDrc *drc;
1130 SpaprDrcClass *drck;
1131 SpaprDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE;
b89b3d39 1132 int rc;
b89b3d39
DG
1133
1134 if (nargs != 2 || nret != 1) {
1135 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
1136 return;
1137 }
1138
1139 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0);
1140
1141 drc_index = rtas_ld(wa_addr, 0);
fbf55397 1142 drc = spapr_drc_by_index(drc_index);
b89b3d39
DG
1143 if (!drc) {
1144 trace_spapr_rtas_ibm_configure_connector_invalid(drc_index);
1145 rc = RTAS_OUT_PARAM_ERROR;
1146 goto out;
1147 }
1148
9d4c0f4f 1149 if ((drc->state != SPAPR_DRC_STATE_LOGICAL_UNISOLATE)
188bfe1b
BR
1150 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_UNISOLATE)
1151 && (drc->state != SPAPR_DRC_STATE_LOGICAL_CONFIGURED)
1152 && (drc->state != SPAPR_DRC_STATE_PHYSICAL_CONFIGURED)) {
1153 /*
1154 * Need to unisolate the device before configuring
1155 * or it should already be in configured state to
1156 * allow configure-connector be called repeatedly.
1157 */
b89b3d39
DG
1158 rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE;
1159 goto out;
1160 }
1161
9d4c0f4f
DG
1162 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
1163
d9c95c71 1164 if (!drc->fdt) {
d9c95c71
GK
1165 void *fdt;
1166 int fdt_size;
1167
1168 fdt = create_device_tree(&fdt_size);
1169
1170 if (drck->dt_populate(drc, spapr, fdt, &drc->fdt_start_offset,
9261ef5e 1171 NULL)) {
d9c95c71 1172 g_free(fdt);
d9c95c71
GK
1173 rc = SPAPR_DR_CC_RESPONSE_ERROR;
1174 goto out;
1175 }
1176
1177 drc->fdt = fdt;
1178 drc->ccs_offset = drc->fdt_start_offset;
1179 drc->ccs_depth = 0;
1180 }
1181
b89b3d39
DG
1182 do {
1183 uint32_t tag;
1184 const char *name;
1185 const struct fdt_property *prop;
1186 int fdt_offset_next, prop_len;
1187
4445b1d2 1188 tag = fdt_next_tag(drc->fdt, drc->ccs_offset, &fdt_offset_next);
b89b3d39
DG
1189
1190 switch (tag) {
1191 case FDT_BEGIN_NODE:
4445b1d2
DG
1192 drc->ccs_depth++;
1193 name = fdt_get_name(drc->fdt, drc->ccs_offset, NULL);
b89b3d39
DG
1194
1195 /* provide the name of the next OF node */
1196 wa_offset = CC_VAL_DATA_OFFSET;
1197 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset);
1198 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1199 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD;
1200 break;
1201 case FDT_END_NODE:
4445b1d2
DG
1202 drc->ccs_depth--;
1203 if (drc->ccs_depth == 0) {
0b55aa91 1204 uint32_t drc_index = spapr_drc_index(drc);
9d4c0f4f
DG
1205
1206 /* done sending the device tree, move to configured state */
0b55aa91 1207 trace_spapr_drc_set_configured(drc_index);
9d4c0f4f 1208 drc->state = drck->ready_state;
188bfe1b
BR
1209 /*
1210 * Ensure that we are able to send the FDT fragment
1211 * again via configure-connector call if the guest requests.
1212 */
1213 drc->ccs_offset = drc->fdt_start_offset;
1214 drc->ccs_depth = 0;
1215 fdt_offset_next = drc->fdt_start_offset;
b89b3d39
DG
1216 resp = SPAPR_DR_CC_RESPONSE_SUCCESS;
1217 } else {
1218 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT;
1219 }
1220 break;
1221 case FDT_PROP:
4445b1d2 1222 prop = fdt_get_property_by_offset(drc->fdt, drc->ccs_offset,
b89b3d39 1223 &prop_len);
88af6ea5 1224 name = fdt_string(drc->fdt, fdt32_to_cpu(prop->nameoff));
b89b3d39
DG
1225
1226 /* provide the name of the next OF property */
1227 wa_offset = CC_VAL_DATA_OFFSET;
1228 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset);
1229 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
1230
1231 /* provide the length and value of the OF property. data gets
1232 * placed immediately after NULL terminator of the OF property's
1233 * name string
1234 */
1235 wa_offset += strlen(name) + 1,
1236 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len);
1237 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset);
1238 configure_connector_st(wa_addr, wa_offset, prop->data, prop_len);
1239 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY;
1240 break;
1241 case FDT_END:
1242 resp = SPAPR_DR_CC_RESPONSE_ERROR;
1243 default:
1244 /* keep seeking for an actionable tag */
1245 break;
1246 }
4445b1d2
DG
1247 if (drc->ccs_offset >= 0) {
1248 drc->ccs_offset = fdt_offset_next;
b89b3d39
DG
1249 }
1250 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE);
1251
1252 rc = resp;
1253out:
1254 rtas_st(rets, 0, rc);
1255}
1256
1257static void spapr_drc_register_types(void)
1258{
1259 type_register_static(&spapr_dr_connector_info);
2d335818
DG
1260 type_register_static(&spapr_drc_physical_info);
1261 type_register_static(&spapr_drc_logical_info);
1262 type_register_static(&spapr_drc_cpu_info);
1263 type_register_static(&spapr_drc_pci_info);
1264 type_register_static(&spapr_drc_lmb_info);
962b6c36 1265 type_register_static(&spapr_drc_phb_info);
ee3a71e3 1266 type_register_static(&spapr_drc_pmem_info);
b89b3d39
DG
1267
1268 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator",
1269 rtas_set_indicator);
1270 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state",
1271 rtas_get_sensor_state);
1272 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector",
1273 rtas_ibm_configure_connector);
1274}
1275type_init(spapr_drc_register_types)