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74d042e5 DG |
1 | /* |
2 | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator | |
3 | * | |
4 | * RTAS events handling | |
5 | * | |
6 | * Copyright (c) 2012 David Gibson, IBM Corporation. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | * | |
26 | */ | |
0d75590d | 27 | #include "qemu/osdep.h" |
da34e65c | 28 | #include "qapi/error.h" |
74d042e5 | 29 | #include "cpu.h" |
9c17d615 | 30 | #include "sysemu/sysemu.h" |
74d042e5 | 31 | #include "hw/qdev.h" |
9c17d615 | 32 | #include "sysemu/device_tree.h" |
74d042e5 | 33 | |
7804c353 | 34 | #include "hw/ppc/fdt.h" |
0d09e41a PB |
35 | #include "hw/ppc/spapr.h" |
36 | #include "hw/ppc/spapr_vio.h" | |
31fe14d1 NF |
37 | #include "hw/pci/pci.h" |
38 | #include "hw/pci-host/spapr.h" | |
39 | #include "hw/ppc/spapr_drc.h" | |
f348b6d1 VB |
40 | #include "qemu/help_option.h" |
41 | #include "qemu/bcd.h" | |
ffbb1705 | 42 | #include "hw/ppc/spapr_ovec.h" |
74d042e5 DG |
43 | #include <libfdt.h> |
44 | ||
45 | struct rtas_error_log { | |
46 | uint32_t summary; | |
47 | #define RTAS_LOG_VERSION_MASK 0xff000000 | |
48 | #define RTAS_LOG_VERSION_6 0x06000000 | |
49 | #define RTAS_LOG_SEVERITY_MASK 0x00e00000 | |
50 | #define RTAS_LOG_SEVERITY_ALREADY_REPORTED 0x00c00000 | |
51 | #define RTAS_LOG_SEVERITY_FATAL 0x00a00000 | |
52 | #define RTAS_LOG_SEVERITY_ERROR 0x00800000 | |
53 | #define RTAS_LOG_SEVERITY_ERROR_SYNC 0x00600000 | |
54 | #define RTAS_LOG_SEVERITY_WARNING 0x00400000 | |
55 | #define RTAS_LOG_SEVERITY_EVENT 0x00200000 | |
56 | #define RTAS_LOG_SEVERITY_NO_ERROR 0x00000000 | |
57 | #define RTAS_LOG_DISPOSITION_MASK 0x00180000 | |
58 | #define RTAS_LOG_DISPOSITION_FULLY_RECOVERED 0x00000000 | |
59 | #define RTAS_LOG_DISPOSITION_LIMITED_RECOVERY 0x00080000 | |
60 | #define RTAS_LOG_DISPOSITION_NOT_RECOVERED 0x00100000 | |
61 | #define RTAS_LOG_OPTIONAL_PART_PRESENT 0x00040000 | |
62 | #define RTAS_LOG_INITIATOR_MASK 0x0000f000 | |
63 | #define RTAS_LOG_INITIATOR_UNKNOWN 0x00000000 | |
64 | #define RTAS_LOG_INITIATOR_CPU 0x00001000 | |
65 | #define RTAS_LOG_INITIATOR_PCI 0x00002000 | |
66 | #define RTAS_LOG_INITIATOR_MEMORY 0x00004000 | |
67 | #define RTAS_LOG_INITIATOR_HOTPLUG 0x00006000 | |
68 | #define RTAS_LOG_TARGET_MASK 0x00000f00 | |
69 | #define RTAS_LOG_TARGET_UNKNOWN 0x00000000 | |
70 | #define RTAS_LOG_TARGET_CPU 0x00000100 | |
71 | #define RTAS_LOG_TARGET_PCI 0x00000200 | |
72 | #define RTAS_LOG_TARGET_MEMORY 0x00000400 | |
73 | #define RTAS_LOG_TARGET_HOTPLUG 0x00000600 | |
74 | #define RTAS_LOG_TYPE_MASK 0x000000ff | |
75 | #define RTAS_LOG_TYPE_OTHER 0x00000000 | |
76 | #define RTAS_LOG_TYPE_RETRY 0x00000001 | |
77 | #define RTAS_LOG_TYPE_TCE_ERR 0x00000002 | |
78 | #define RTAS_LOG_TYPE_INTERN_DEV_FAIL 0x00000003 | |
79 | #define RTAS_LOG_TYPE_TIMEOUT 0x00000004 | |
80 | #define RTAS_LOG_TYPE_DATA_PARITY 0x00000005 | |
81 | #define RTAS_LOG_TYPE_ADDR_PARITY 0x00000006 | |
82 | #define RTAS_LOG_TYPE_CACHE_PARITY 0x00000007 | |
83 | #define RTAS_LOG_TYPE_ADDR_INVALID 0x00000008 | |
84 | #define RTAS_LOG_TYPE_ECC_UNCORR 0x00000009 | |
85 | #define RTAS_LOG_TYPE_ECC_CORR 0x0000000a | |
86 | #define RTAS_LOG_TYPE_EPOW 0x00000040 | |
31fe14d1 | 87 | #define RTAS_LOG_TYPE_HOTPLUG 0x000000e5 |
74d042e5 DG |
88 | uint32_t extended_length; |
89 | } QEMU_PACKED; | |
90 | ||
91 | struct rtas_event_log_v6 { | |
92 | uint8_t b0; | |
93 | #define RTAS_LOG_V6_B0_VALID 0x80 | |
94 | #define RTAS_LOG_V6_B0_UNRECOVERABLE_ERROR 0x40 | |
95 | #define RTAS_LOG_V6_B0_RECOVERABLE_ERROR 0x20 | |
96 | #define RTAS_LOG_V6_B0_DEGRADED_OPERATION 0x10 | |
97 | #define RTAS_LOG_V6_B0_PREDICTIVE_ERROR 0x08 | |
98 | #define RTAS_LOG_V6_B0_NEW_LOG 0x04 | |
99 | #define RTAS_LOG_V6_B0_BIGENDIAN 0x02 | |
100 | uint8_t _resv1; | |
101 | uint8_t b2; | |
102 | #define RTAS_LOG_V6_B2_POWERPC_FORMAT 0x80 | |
103 | #define RTAS_LOG_V6_B2_LOG_FORMAT_MASK 0x0f | |
104 | #define RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT 0x0e | |
105 | uint8_t _resv2[9]; | |
106 | uint32_t company; | |
107 | #define RTAS_LOG_V6_COMPANY_IBM 0x49424d00 /* IBM<null> */ | |
108 | } QEMU_PACKED; | |
109 | ||
110 | struct rtas_event_log_v6_section_header { | |
111 | uint16_t section_id; | |
112 | uint16_t section_length; | |
113 | uint8_t section_version; | |
114 | uint8_t section_subtype; | |
115 | uint16_t creator_component_id; | |
116 | } QEMU_PACKED; | |
117 | ||
118 | struct rtas_event_log_v6_maina { | |
119 | #define RTAS_LOG_V6_SECTION_ID_MAINA 0x5048 /* PH */ | |
120 | struct rtas_event_log_v6_section_header hdr; | |
121 | uint32_t creation_date; /* BCD: YYYYMMDD */ | |
122 | uint32_t creation_time; /* BCD: HHMMSS00 */ | |
123 | uint8_t _platform1[8]; | |
124 | char creator_id; | |
125 | uint8_t _resv1[2]; | |
126 | uint8_t section_count; | |
127 | uint8_t _resv2[4]; | |
128 | uint8_t _platform2[8]; | |
129 | uint32_t plid; | |
130 | uint8_t _platform3[4]; | |
131 | } QEMU_PACKED; | |
132 | ||
133 | struct rtas_event_log_v6_mainb { | |
134 | #define RTAS_LOG_V6_SECTION_ID_MAINB 0x5548 /* UH */ | |
135 | struct rtas_event_log_v6_section_header hdr; | |
136 | uint8_t subsystem_id; | |
137 | uint8_t _platform1; | |
138 | uint8_t event_severity; | |
139 | uint8_t event_subtype; | |
140 | uint8_t _platform2[4]; | |
141 | uint8_t _resv1[2]; | |
142 | uint16_t action_flags; | |
143 | uint8_t _resv2[4]; | |
144 | } QEMU_PACKED; | |
145 | ||
146 | struct rtas_event_log_v6_epow { | |
147 | #define RTAS_LOG_V6_SECTION_ID_EPOW 0x4550 /* EP */ | |
148 | struct rtas_event_log_v6_section_header hdr; | |
149 | uint8_t sensor_value; | |
150 | #define RTAS_LOG_V6_EPOW_ACTION_RESET 0 | |
151 | #define RTAS_LOG_V6_EPOW_ACTION_WARN_COOLING 1 | |
152 | #define RTAS_LOG_V6_EPOW_ACTION_WARN_POWER 2 | |
153 | #define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN 3 | |
154 | #define RTAS_LOG_V6_EPOW_ACTION_SYSTEM_HALT 4 | |
155 | #define RTAS_LOG_V6_EPOW_ACTION_MAIN_ENCLOSURE 5 | |
156 | #define RTAS_LOG_V6_EPOW_ACTION_POWER_OFF 7 | |
157 | uint8_t event_modifier; | |
158 | #define RTAS_LOG_V6_EPOW_MODIFIER_NORMAL 1 | |
159 | #define RTAS_LOG_V6_EPOW_MODIFIER_ON_UPS 2 | |
160 | #define RTAS_LOG_V6_EPOW_MODIFIER_CRITICAL 3 | |
161 | #define RTAS_LOG_V6_EPOW_MODIFIER_TEMPERATURE 4 | |
162 | uint8_t extended_modifier; | |
163 | #define RTAS_LOG_V6_EPOW_XMODIFIER_SYSTEM_WIDE 0 | |
164 | #define RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC 1 | |
165 | uint8_t _resv; | |
166 | uint64_t reason_code; | |
167 | } QEMU_PACKED; | |
168 | ||
169 | struct epow_log_full { | |
170 | struct rtas_error_log hdr; | |
171 | struct rtas_event_log_v6 v6hdr; | |
172 | struct rtas_event_log_v6_maina maina; | |
173 | struct rtas_event_log_v6_mainb mainb; | |
174 | struct rtas_event_log_v6_epow epow; | |
175 | } QEMU_PACKED; | |
176 | ||
afdbd403 BR |
177 | union drc_identifier { |
178 | uint32_t index; | |
179 | uint32_t count; | |
180 | struct { | |
181 | uint32_t count; | |
182 | uint32_t index; | |
183 | } count_indexed; | |
184 | char name[1]; | |
185 | } QEMU_PACKED; | |
186 | ||
31fe14d1 NF |
187 | struct rtas_event_log_v6_hp { |
188 | #define RTAS_LOG_V6_SECTION_ID_HOTPLUG 0x4850 /* HP */ | |
189 | struct rtas_event_log_v6_section_header hdr; | |
190 | uint8_t hotplug_type; | |
191 | #define RTAS_LOG_V6_HP_TYPE_CPU 1 | |
192 | #define RTAS_LOG_V6_HP_TYPE_MEMORY 2 | |
193 | #define RTAS_LOG_V6_HP_TYPE_SLOT 3 | |
194 | #define RTAS_LOG_V6_HP_TYPE_PHB 4 | |
195 | #define RTAS_LOG_V6_HP_TYPE_PCI 5 | |
196 | uint8_t hotplug_action; | |
197 | #define RTAS_LOG_V6_HP_ACTION_ADD 1 | |
198 | #define RTAS_LOG_V6_HP_ACTION_REMOVE 2 | |
199 | uint8_t hotplug_identifier; | |
200 | #define RTAS_LOG_V6_HP_ID_DRC_NAME 1 | |
201 | #define RTAS_LOG_V6_HP_ID_DRC_INDEX 2 | |
202 | #define RTAS_LOG_V6_HP_ID_DRC_COUNT 3 | |
afdbd403 | 203 | #define RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED 4 |
31fe14d1 | 204 | uint8_t reserved; |
afdbd403 | 205 | union drc_identifier drc_id; |
31fe14d1 NF |
206 | } QEMU_PACKED; |
207 | ||
208 | struct hp_log_full { | |
209 | struct rtas_error_log hdr; | |
210 | struct rtas_event_log_v6 v6hdr; | |
211 | struct rtas_event_log_v6_maina maina; | |
212 | struct rtas_event_log_v6_mainb mainb; | |
213 | struct rtas_event_log_v6_hp hp; | |
214 | } QEMU_PACKED; | |
215 | ||
ffbb1705 MR |
216 | typedef enum EventClass { |
217 | EVENT_CLASS_INTERNAL_ERRORS = 0, | |
218 | EVENT_CLASS_EPOW = 1, | |
219 | EVENT_CLASS_RESERVED = 2, | |
220 | EVENT_CLASS_HOT_PLUG = 3, | |
221 | EVENT_CLASS_IO = 4, | |
222 | EVENT_CLASS_MAX | |
223 | } EventClassIndex; | |
224 | #define EVENT_CLASS_MASK(index) (1 << (31 - index)) | |
225 | ||
226 | static const char * const event_names[EVENT_CLASS_MAX] = { | |
227 | [EVENT_CLASS_INTERNAL_ERRORS] = "internal-errors", | |
228 | [EVENT_CLASS_EPOW] = "epow-events", | |
229 | [EVENT_CLASS_HOT_PLUG] = "hot-plug-events", | |
230 | [EVENT_CLASS_IO] = "ibm,io-events", | |
231 | }; | |
232 | ||
233 | struct sPAPREventSource { | |
234 | int irq; | |
235 | uint32_t mask; | |
236 | bool enabled; | |
237 | }; | |
238 | ||
239 | static sPAPREventSource *spapr_event_sources_new(void) | |
240 | { | |
241 | return g_new0(sPAPREventSource, EVENT_CLASS_MAX); | |
242 | } | |
243 | ||
244 | static void spapr_event_sources_register(sPAPREventSource *event_sources, | |
245 | EventClassIndex index, int irq) | |
246 | { | |
247 | /* we only support 1 irq per event class at the moment */ | |
248 | g_assert(event_sources); | |
249 | g_assert(!event_sources[index].enabled); | |
250 | event_sources[index].irq = irq; | |
251 | event_sources[index].mask = EVENT_CLASS_MASK(index); | |
252 | event_sources[index].enabled = true; | |
253 | } | |
254 | ||
255 | static const sPAPREventSource * | |
256 | spapr_event_sources_get_source(sPAPREventSource *event_sources, | |
257 | EventClassIndex index) | |
258 | { | |
259 | g_assert(index < EVENT_CLASS_MAX); | |
260 | g_assert(event_sources); | |
261 | ||
262 | return &event_sources[index]; | |
263 | } | |
74d042e5 | 264 | |
ffbb1705 | 265 | void spapr_dt_events(sPAPRMachineState *spapr, void *fdt) |
74d042e5 | 266 | { |
ffbb1705 MR |
267 | uint32_t irq_ranges[EVENT_CLASS_MAX * 2]; |
268 | int i, count = 0, event_sources; | |
269 | sPAPREventSource *events = spapr->event_sources; | |
270 | ||
271 | g_assert(events); | |
74d042e5 | 272 | |
ffb1e275 | 273 | _FDT(event_sources = fdt_add_subnode(fdt, 0, "event-sources")); |
74d042e5 | 274 | |
ffbb1705 MR |
275 | for (i = 0, count = 0; i < EVENT_CLASS_MAX; i++) { |
276 | int node_offset; | |
277 | uint32_t interrupts[2]; | |
278 | const sPAPREventSource *source = | |
279 | spapr_event_sources_get_source(events, i); | |
280 | const char *source_name = event_names[i]; | |
281 | ||
282 | if (!source->enabled) { | |
283 | continue; | |
284 | } | |
285 | ||
286 | interrupts[0] = cpu_to_be32(source->irq); | |
287 | interrupts[1] = 0; | |
288 | ||
289 | _FDT(node_offset = fdt_add_subnode(fdt, event_sources, source_name)); | |
290 | _FDT(fdt_setprop(fdt, node_offset, "interrupts", interrupts, | |
291 | sizeof(interrupts))); | |
292 | ||
293 | irq_ranges[count++] = interrupts[0]; | |
294 | irq_ranges[count++] = cpu_to_be32(1); | |
295 | } | |
296 | ||
297 | irq_ranges[count] = cpu_to_be32(count); | |
298 | count++; | |
299 | ||
300 | _FDT((fdt_setprop(fdt, event_sources, "interrupt-controller", NULL, 0))); | |
301 | _FDT((fdt_setprop_cell(fdt, event_sources, "#interrupt-cells", 2))); | |
302 | _FDT((fdt_setprop(fdt, event_sources, "interrupt-ranges", | |
303 | irq_ranges, count * sizeof(uint32_t)))); | |
304 | } | |
305 | ||
306 | static const sPAPREventSource * | |
307 | rtas_event_log_to_source(sPAPRMachineState *spapr, int log_type) | |
308 | { | |
309 | const sPAPREventSource *source; | |
310 | ||
311 | g_assert(spapr->event_sources); | |
312 | ||
313 | switch (log_type) { | |
314 | case RTAS_LOG_TYPE_HOTPLUG: | |
315 | source = spapr_event_sources_get_source(spapr->event_sources, | |
316 | EVENT_CLASS_HOT_PLUG); | |
317 | if (spapr_ovec_test(spapr->ov5_cas, OV5_HP_EVT)) { | |
318 | g_assert(source->enabled); | |
319 | break; | |
320 | } | |
321 | /* fall back to epow for legacy hotplug interrupt source */ | |
322 | case RTAS_LOG_TYPE_EPOW: | |
323 | source = spapr_event_sources_get_source(spapr->event_sources, | |
324 | EVENT_CLASS_EPOW); | |
325 | break; | |
326 | default: | |
327 | source = NULL; | |
328 | } | |
329 | ||
330 | return source; | |
331 | } | |
332 | ||
333 | static int rtas_event_log_to_irq(sPAPRMachineState *spapr, int log_type) | |
334 | { | |
335 | const sPAPREventSource *source; | |
74d042e5 | 336 | |
ffbb1705 MR |
337 | source = rtas_event_log_to_source(spapr, log_type); |
338 | g_assert(source); | |
339 | g_assert(source->enabled); | |
340 | ||
341 | return source->irq; | |
74d042e5 DG |
342 | } |
343 | ||
bff30638 | 344 | static void rtas_event_log_queue(int log_type, void *data) |
31fe14d1 | 345 | { |
28e02042 | 346 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
31fe14d1 | 347 | sPAPREventLogEntry *entry = g_new(sPAPREventLogEntry, 1); |
74d042e5 | 348 | |
31fe14d1 NF |
349 | g_assert(data); |
350 | entry->log_type = log_type; | |
351 | entry->data = data; | |
352 | QTAILQ_INSERT_TAIL(&spapr->pending_events, entry, next); | |
353 | } | |
354 | ||
bff30638 | 355 | static sPAPREventLogEntry *rtas_event_log_dequeue(uint32_t event_mask) |
74d042e5 | 356 | { |
28e02042 | 357 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
31fe14d1 | 358 | sPAPREventLogEntry *entry = NULL; |
74d042e5 | 359 | |
31fe14d1 | 360 | QTAILQ_FOREACH(entry, &spapr->pending_events, next) { |
ffbb1705 MR |
361 | const sPAPREventSource *source = |
362 | rtas_event_log_to_source(spapr, entry->log_type); | |
363 | ||
ffbb1705 | 364 | if (source->mask & event_mask) { |
31fe14d1 NF |
365 | break; |
366 | } | |
367 | } | |
368 | ||
369 | if (entry) { | |
370 | QTAILQ_REMOVE(&spapr->pending_events, entry, next); | |
371 | } | |
372 | ||
373 | return entry; | |
374 | } | |
375 | ||
bff30638 | 376 | static bool rtas_event_log_contains(uint32_t event_mask) |
31fe14d1 | 377 | { |
28e02042 | 378 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
31fe14d1 NF |
379 | sPAPREventLogEntry *entry = NULL; |
380 | ||
31fe14d1 | 381 | QTAILQ_FOREACH(entry, &spapr->pending_events, next) { |
ffbb1705 MR |
382 | const sPAPREventSource *source = |
383 | rtas_event_log_to_source(spapr, entry->log_type); | |
384 | ||
ffbb1705 | 385 | if (source->mask & event_mask) { |
31fe14d1 NF |
386 | return true; |
387 | } | |
388 | } | |
389 | ||
390 | return false; | |
391 | } | |
74d042e5 | 392 | |
31fe14d1 NF |
393 | static uint32_t next_plid; |
394 | ||
395 | static void spapr_init_v6hdr(struct rtas_event_log_v6 *v6hdr) | |
396 | { | |
74d042e5 DG |
397 | v6hdr->b0 = RTAS_LOG_V6_B0_VALID | RTAS_LOG_V6_B0_NEW_LOG |
398 | | RTAS_LOG_V6_B0_BIGENDIAN; | |
399 | v6hdr->b2 = RTAS_LOG_V6_B2_POWERPC_FORMAT | |
400 | | RTAS_LOG_V6_B2_LOG_FORMAT_PLATFORM_EVENT; | |
401 | v6hdr->company = cpu_to_be32(RTAS_LOG_V6_COMPANY_IBM); | |
31fe14d1 NF |
402 | } |
403 | ||
404 | static void spapr_init_maina(struct rtas_event_log_v6_maina *maina, | |
405 | int section_count) | |
406 | { | |
28e02042 | 407 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
31fe14d1 NF |
408 | struct tm tm; |
409 | int year; | |
74d042e5 DG |
410 | |
411 | maina->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINA); | |
412 | maina->hdr.section_length = cpu_to_be16(sizeof(*maina)); | |
413 | /* FIXME: section version, subtype and creator id? */ | |
147ff807 | 414 | spapr_rtc_read(&spapr->rtc, &tm, NULL); |
74d042e5 DG |
415 | year = tm.tm_year + 1900; |
416 | maina->creation_date = cpu_to_be32((to_bcd(year / 100) << 24) | |
417 | | (to_bcd(year % 100) << 16) | |
418 | | (to_bcd(tm.tm_mon + 1) << 8) | |
419 | | to_bcd(tm.tm_mday)); | |
420 | maina->creation_time = cpu_to_be32((to_bcd(tm.tm_hour) << 24) | |
421 | | (to_bcd(tm.tm_min) << 16) | |
422 | | (to_bcd(tm.tm_sec) << 8)); | |
423 | maina->creator_id = 'H'; /* Hypervisor */ | |
31fe14d1 | 424 | maina->section_count = section_count; |
74d042e5 | 425 | maina->plid = next_plid++; |
31fe14d1 NF |
426 | } |
427 | ||
428 | static void spapr_powerdown_req(Notifier *n, void *opaque) | |
429 | { | |
28e02042 | 430 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
31fe14d1 NF |
431 | struct rtas_error_log *hdr; |
432 | struct rtas_event_log_v6 *v6hdr; | |
433 | struct rtas_event_log_v6_maina *maina; | |
434 | struct rtas_event_log_v6_mainb *mainb; | |
435 | struct rtas_event_log_v6_epow *epow; | |
436 | struct epow_log_full *new_epow; | |
437 | ||
438 | new_epow = g_malloc0(sizeof(*new_epow)); | |
439 | hdr = &new_epow->hdr; | |
440 | v6hdr = &new_epow->v6hdr; | |
441 | maina = &new_epow->maina; | |
442 | mainb = &new_epow->mainb; | |
443 | epow = &new_epow->epow; | |
444 | ||
445 | hdr->summary = cpu_to_be32(RTAS_LOG_VERSION_6 | |
446 | | RTAS_LOG_SEVERITY_EVENT | |
447 | | RTAS_LOG_DISPOSITION_NOT_RECOVERED | |
448 | | RTAS_LOG_OPTIONAL_PART_PRESENT | |
449 | | RTAS_LOG_TYPE_EPOW); | |
450 | hdr->extended_length = cpu_to_be32(sizeof(*new_epow) | |
451 | - sizeof(new_epow->hdr)); | |
452 | ||
453 | spapr_init_v6hdr(v6hdr); | |
454 | spapr_init_maina(maina, 3 /* Main-A, Main-B and EPOW */); | |
74d042e5 DG |
455 | |
456 | mainb->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINB); | |
457 | mainb->hdr.section_length = cpu_to_be16(sizeof(*mainb)); | |
458 | /* FIXME: section version, subtype and creator id? */ | |
459 | mainb->subsystem_id = 0xa0; /* External environment */ | |
460 | mainb->event_severity = 0x00; /* Informational / non-error */ | |
461 | mainb->event_subtype = 0xd0; /* Normal shutdown */ | |
462 | ||
463 | epow->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_EPOW); | |
464 | epow->hdr.section_length = cpu_to_be16(sizeof(*epow)); | |
465 | epow->hdr.section_version = 2; /* includes extended modifier */ | |
466 | /* FIXME: section subtype and creator id? */ | |
467 | epow->sensor_value = RTAS_LOG_V6_EPOW_ACTION_SYSTEM_SHUTDOWN; | |
468 | epow->event_modifier = RTAS_LOG_V6_EPOW_MODIFIER_NORMAL; | |
469 | epow->extended_modifier = RTAS_LOG_V6_EPOW_XMODIFIER_PARTITION_SPECIFIC; | |
470 | ||
bff30638 | 471 | rtas_event_log_queue(RTAS_LOG_TYPE_EPOW, new_epow); |
31fe14d1 | 472 | |
f7759e43 | 473 | qemu_irq_pulse(xics_get_qirq(XICS_FABRIC(spapr), |
ffbb1705 MR |
474 | rtas_event_log_to_irq(spapr, |
475 | RTAS_LOG_TYPE_EPOW))); | |
31fe14d1 NF |
476 | } |
477 | ||
f40eb921 MR |
478 | static void spapr_hotplug_set_signalled(uint32_t drc_index) |
479 | { | |
480 | sPAPRDRConnector *drc = spapr_dr_connector_by_index(drc_index); | |
481 | sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
482 | drck->set_signalled(drc); | |
483 | } | |
484 | ||
7a36ae7a BR |
485 | static void spapr_hotplug_req_event(uint8_t hp_id, uint8_t hp_action, |
486 | sPAPRDRConnectorType drc_type, | |
afdbd403 | 487 | union drc_identifier *drc_id) |
31fe14d1 | 488 | { |
28e02042 | 489 | sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
31fe14d1 NF |
490 | struct hp_log_full *new_hp; |
491 | struct rtas_error_log *hdr; | |
492 | struct rtas_event_log_v6 *v6hdr; | |
493 | struct rtas_event_log_v6_maina *maina; | |
494 | struct rtas_event_log_v6_mainb *mainb; | |
495 | struct rtas_event_log_v6_hp *hp; | |
31fe14d1 NF |
496 | |
497 | new_hp = g_malloc0(sizeof(struct hp_log_full)); | |
498 | hdr = &new_hp->hdr; | |
499 | v6hdr = &new_hp->v6hdr; | |
500 | maina = &new_hp->maina; | |
501 | mainb = &new_hp->mainb; | |
502 | hp = &new_hp->hp; | |
503 | ||
504 | hdr->summary = cpu_to_be32(RTAS_LOG_VERSION_6 | |
505 | | RTAS_LOG_SEVERITY_EVENT | |
506 | | RTAS_LOG_DISPOSITION_NOT_RECOVERED | |
507 | | RTAS_LOG_OPTIONAL_PART_PRESENT | |
508 | | RTAS_LOG_INITIATOR_HOTPLUG | |
509 | | RTAS_LOG_TYPE_HOTPLUG); | |
510 | hdr->extended_length = cpu_to_be32(sizeof(*new_hp) | |
511 | - sizeof(new_hp->hdr)); | |
512 | ||
513 | spapr_init_v6hdr(v6hdr); | |
514 | spapr_init_maina(maina, 3 /* Main-A, Main-B, HP */); | |
515 | ||
516 | mainb->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_MAINB); | |
517 | mainb->hdr.section_length = cpu_to_be16(sizeof(*mainb)); | |
518 | mainb->subsystem_id = 0x80; /* External environment */ | |
519 | mainb->event_severity = 0x00; /* Informational / non-error */ | |
520 | mainb->event_subtype = 0x00; /* Normal shutdown */ | |
521 | ||
522 | hp->hdr.section_id = cpu_to_be16(RTAS_LOG_V6_SECTION_ID_HOTPLUG); | |
523 | hp->hdr.section_length = cpu_to_be16(sizeof(*hp)); | |
524 | hp->hdr.section_version = 1; /* includes extended modifier */ | |
525 | hp->hotplug_action = hp_action; | |
7a36ae7a | 526 | hp->hotplug_identifier = hp_id; |
31fe14d1 NF |
527 | |
528 | switch (drc_type) { | |
529 | case SPAPR_DR_CONNECTOR_TYPE_PCI: | |
31fe14d1 | 530 | hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_PCI; |
df18b2db | 531 | if (hp->hotplug_action == RTAS_LOG_V6_HP_ACTION_ADD) { |
afdbd403 | 532 | spapr_hotplug_set_signalled(drc_id->index); |
df18b2db | 533 | } |
31fe14d1 | 534 | break; |
c20d332a BR |
535 | case SPAPR_DR_CONNECTOR_TYPE_LMB: |
536 | hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_MEMORY; | |
537 | break; | |
af81cf32 BR |
538 | case SPAPR_DR_CONNECTOR_TYPE_CPU: |
539 | hp->hotplug_type = RTAS_LOG_V6_HP_TYPE_CPU; | |
540 | break; | |
31fe14d1 NF |
541 | default: |
542 | /* we shouldn't be signaling hotplug events for resources | |
543 | * that don't support them | |
544 | */ | |
545 | g_assert(false); | |
546 | return; | |
547 | } | |
548 | ||
7a36ae7a | 549 | if (hp_id == RTAS_LOG_V6_HP_ID_DRC_COUNT) { |
afdbd403 | 550 | hp->drc_id.count = cpu_to_be32(drc_id->count); |
7a36ae7a | 551 | } else if (hp_id == RTAS_LOG_V6_HP_ID_DRC_INDEX) { |
afdbd403 BR |
552 | hp->drc_id.index = cpu_to_be32(drc_id->index); |
553 | } else if (hp_id == RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED) { | |
554 | /* we should not be using count_indexed value unless the guest | |
555 | * supports dedicated hotplug event source | |
556 | */ | |
557 | g_assert(spapr_ovec_test(spapr->ov5_cas, OV5_HP_EVT)); | |
558 | hp->drc_id.count_indexed.count = | |
559 | cpu_to_be32(drc_id->count_indexed.count); | |
560 | hp->drc_id.count_indexed.index = | |
561 | cpu_to_be32(drc_id->count_indexed.index); | |
7a36ae7a BR |
562 | } |
563 | ||
bff30638 | 564 | rtas_event_log_queue(RTAS_LOG_TYPE_HOTPLUG, new_hp); |
31fe14d1 | 565 | |
f7759e43 | 566 | qemu_irq_pulse(xics_get_qirq(XICS_FABRIC(spapr), |
ffbb1705 MR |
567 | rtas_event_log_to_irq(spapr, |
568 | RTAS_LOG_TYPE_HOTPLUG))); | |
31fe14d1 NF |
569 | } |
570 | ||
7a36ae7a BR |
571 | void spapr_hotplug_req_add_by_index(sPAPRDRConnector *drc) |
572 | { | |
573 | sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
574 | sPAPRDRConnectorType drc_type = drck->get_type(drc); | |
afdbd403 | 575 | union drc_identifier drc_id; |
7a36ae7a | 576 | |
afdbd403 | 577 | drc_id.index = drck->get_index(drc); |
7a36ae7a | 578 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_INDEX, |
afdbd403 | 579 | RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id); |
7a36ae7a BR |
580 | } |
581 | ||
582 | void spapr_hotplug_req_remove_by_index(sPAPRDRConnector *drc) | |
583 | { | |
584 | sPAPRDRConnectorClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); | |
585 | sPAPRDRConnectorType drc_type = drck->get_type(drc); | |
afdbd403 | 586 | union drc_identifier drc_id; |
7a36ae7a | 587 | |
afdbd403 | 588 | drc_id.index = drck->get_index(drc); |
7a36ae7a | 589 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_INDEX, |
afdbd403 | 590 | RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id); |
7a36ae7a BR |
591 | } |
592 | ||
593 | void spapr_hotplug_req_add_by_count(sPAPRDRConnectorType drc_type, | |
594 | uint32_t count) | |
31fe14d1 | 595 | { |
afdbd403 BR |
596 | union drc_identifier drc_id; |
597 | ||
598 | drc_id.count = count; | |
7a36ae7a | 599 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT, |
afdbd403 | 600 | RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id); |
31fe14d1 NF |
601 | } |
602 | ||
7a36ae7a BR |
603 | void spapr_hotplug_req_remove_by_count(sPAPRDRConnectorType drc_type, |
604 | uint32_t count) | |
31fe14d1 | 605 | { |
afdbd403 BR |
606 | union drc_identifier drc_id; |
607 | ||
608 | drc_id.count = count; | |
7a36ae7a | 609 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT, |
afdbd403 BR |
610 | RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id); |
611 | } | |
612 | ||
613 | void spapr_hotplug_req_add_by_count_indexed(sPAPRDRConnectorType drc_type, | |
614 | uint32_t count, uint32_t index) | |
615 | { | |
616 | union drc_identifier drc_id; | |
617 | ||
618 | drc_id.count_indexed.count = count; | |
619 | drc_id.count_indexed.index = index; | |
620 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED, | |
621 | RTAS_LOG_V6_HP_ACTION_ADD, drc_type, &drc_id); | |
622 | } | |
623 | ||
624 | void spapr_hotplug_req_remove_by_count_indexed(sPAPRDRConnectorType drc_type, | |
625 | uint32_t count, uint32_t index) | |
626 | { | |
627 | union drc_identifier drc_id; | |
628 | ||
629 | drc_id.count_indexed.count = count; | |
630 | drc_id.count_indexed.index = index; | |
631 | spapr_hotplug_req_event(RTAS_LOG_V6_HP_ID_DRC_COUNT_INDEXED, | |
632 | RTAS_LOG_V6_HP_ACTION_REMOVE, drc_type, &drc_id); | |
74d042e5 DG |
633 | } |
634 | ||
28e02042 | 635 | static void check_exception(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
74d042e5 DG |
636 | uint32_t token, uint32_t nargs, |
637 | target_ulong args, | |
638 | uint32_t nret, target_ulong rets) | |
639 | { | |
31fe14d1 | 640 | uint32_t mask, buf, len, event_len; |
74d042e5 | 641 | uint64_t xinfo; |
31fe14d1 NF |
642 | sPAPREventLogEntry *event; |
643 | struct rtas_error_log *hdr; | |
ffbb1705 | 644 | int i; |
74d042e5 DG |
645 | |
646 | if ((nargs < 6) || (nargs > 7) || nret != 1) { | |
a64d325d | 647 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
74d042e5 DG |
648 | return; |
649 | } | |
650 | ||
651 | xinfo = rtas_ld(args, 1); | |
652 | mask = rtas_ld(args, 2); | |
653 | buf = rtas_ld(args, 4); | |
654 | len = rtas_ld(args, 5); | |
655 | if (nargs == 7) { | |
656 | xinfo |= (uint64_t)rtas_ld(args, 6) << 32; | |
657 | } | |
658 | ||
bff30638 | 659 | event = rtas_event_log_dequeue(mask); |
31fe14d1 NF |
660 | if (!event) { |
661 | goto out_no_events; | |
662 | } | |
74d042e5 | 663 | |
31fe14d1 NF |
664 | hdr = event->data; |
665 | event_len = be32_to_cpu(hdr->extended_length) + sizeof(*hdr); | |
666 | ||
667 | if (event_len < len) { | |
668 | len = event_len; | |
669 | } | |
670 | ||
671 | cpu_physical_memory_write(buf, event->data, len); | |
672 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
673 | g_free(event->data); | |
674 | g_free(event); | |
675 | ||
676 | /* according to PAPR+, the IRQ must be left asserted, or re-asserted, if | |
677 | * there are still pending events to be fetched via check-exception. We | |
678 | * do the latter here, since our code relies on edge-triggered | |
679 | * interrupts. | |
680 | */ | |
ffbb1705 | 681 | for (i = 0; i < EVENT_CLASS_MAX; i++) { |
bff30638 | 682 | if (rtas_event_log_contains(EVENT_CLASS_MASK(i))) { |
ffbb1705 MR |
683 | const sPAPREventSource *source = |
684 | spapr_event_sources_get_source(spapr->event_sources, i); | |
685 | ||
686 | g_assert(source->enabled); | |
f7759e43 | 687 | qemu_irq_pulse(xics_get_qirq(XICS_FABRIC(spapr), source->irq)); |
ffbb1705 | 688 | } |
74d042e5 | 689 | } |
31fe14d1 NF |
690 | |
691 | return; | |
692 | ||
693 | out_no_events: | |
694 | rtas_st(rets, 0, RTAS_OUT_NO_ERRORS_FOUND); | |
74d042e5 DG |
695 | } |
696 | ||
28e02042 | 697 | static void event_scan(PowerPCCPU *cpu, sPAPRMachineState *spapr, |
79853e18 TD |
698 | uint32_t token, uint32_t nargs, |
699 | target_ulong args, | |
700 | uint32_t nret, target_ulong rets) | |
701 | { | |
79853e18 TD |
702 | if (nargs != 4 || nret != 1) { |
703 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
704 | return; | |
705 | } | |
79853e18 TD |
706 | rtas_st(rets, 0, RTAS_OUT_NO_ERRORS_FOUND); |
707 | } | |
708 | ||
28e02042 | 709 | void spapr_events_init(sPAPRMachineState *spapr) |
74d042e5 | 710 | { |
31fe14d1 | 711 | QTAILQ_INIT(&spapr->pending_events); |
ffbb1705 MR |
712 | |
713 | spapr->event_sources = spapr_event_sources_new(); | |
714 | ||
715 | spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_EPOW, | |
681bfade | 716 | spapr_ics_alloc(spapr->ics, 0, false, |
ffbb1705 MR |
717 | &error_fatal)); |
718 | ||
719 | /* NOTE: if machine supports modern/dedicated hotplug event source, | |
720 | * we add it to the device-tree unconditionally. This means we may | |
721 | * have cases where the source is enabled in QEMU, but unused by the | |
722 | * guest because it does not support modern hotplug events, so we | |
723 | * take care to rely on checking for negotiation of OV5_HP_EVT option | |
724 | * before attempting to use it to signal events, rather than simply | |
725 | * checking that it's enabled. | |
726 | */ | |
727 | if (spapr->use_hotplug_event_source) { | |
728 | spapr_event_sources_register(spapr->event_sources, EVENT_CLASS_HOT_PLUG, | |
681bfade | 729 | spapr_ics_alloc(spapr->ics, 0, false, |
ffbb1705 MR |
730 | &error_fatal)); |
731 | } | |
732 | ||
74d042e5 DG |
733 | spapr->epow_notifier.notify = spapr_powerdown_req; |
734 | qemu_register_powerdown_notifier(&spapr->epow_notifier); | |
3a3b8502 AK |
735 | spapr_rtas_register(RTAS_CHECK_EXCEPTION, "check-exception", |
736 | check_exception); | |
79853e18 | 737 | spapr_rtas_register(RTAS_EVENT_SCAN, "event-scan", event_scan); |
74d042e5 | 738 | } |