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ad0ebb91
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1/*
2 * QEMU sPAPR IOMMU (TCE) code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
83c9f4ca 19#include "hw/hw.h"
9c17d615 20#include "sysemu/kvm.h"
83c9f4ca 21#include "hw/qdev.h"
ad0ebb91 22#include "kvm_ppc.h"
9c17d615 23#include "sysemu/dma.h"
022c62cb 24#include "exec/address-spaces.h"
7e472264 25#include "trace.h"
ad0ebb91 26
0d09e41a 27#include "hw/ppc/spapr.h"
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28
29#include <libfdt.h>
30
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31enum sPAPRTCEAccess {
32 SPAPR_TCE_FAULT = 0,
33 SPAPR_TCE_RO = 1,
34 SPAPR_TCE_WO = 2,
35 SPAPR_TCE_RW = 3,
36};
37
6a0a70b0 38static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables;
ad0ebb91
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39
40static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
41{
42 sPAPRTCETable *tcet;
43
d4261662
DG
44 if (liobn & 0xFFFFFFFF00000000ULL) {
45 hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx "\n",
46 liobn);
47 return NULL;
48 }
49
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50 QLIST_FOREACH(tcet, &spapr_tce_tables, list) {
51 if (tcet->liobn == liobn) {
52 return tcet;
53 }
54 }
55
56 return NULL;
57}
58
a84bb436 59static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr)
ad0ebb91 60{
a84bb436 61 sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
ad0ebb91 62 uint64_t tce;
7e472264
AK
63 IOMMUTLBEntry ret = {
64 .target_as = &address_space_memory,
65 .iova = 0,
66 .translated_addr = 0,
67 .addr_mask = ~(hwaddr)0,
68 .perm = IOMMU_NONE,
69 };
ad0ebb91 70
53724ee5 71 if (tcet->bypass) {
7e472264
AK
72 ret.perm = IOMMU_RW;
73 } else if (addr < tcet->window_size) {
74 /* Check if we are in bound */
75 tce = tcet->table[addr >> SPAPR_TCE_PAGE_SHIFT];
76 ret.iova = addr & ~SPAPR_TCE_PAGE_MASK;
77 ret.translated_addr = tce & ~SPAPR_TCE_PAGE_MASK;
78 ret.addr_mask = SPAPR_TCE_PAGE_MASK;
79 ret.perm = tce;
ad0ebb91 80 }
7e472264
AK
81 trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm,
82 ret.addr_mask);
ad0ebb91 83
7e472264 84 return ret;
a71bfbfe
PB
85}
86
a83000f5
AL
87static int spapr_tce_table_pre_load(void *opaque)
88{
89 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(opaque);
90
91 tcet->nb_table = tcet->window_size >> SPAPR_TCE_PAGE_SHIFT;
92
93 return 0;
94}
95
96static const VMStateDescription vmstate_spapr_tce_table = {
97 .name = "spapr_iommu",
98 .version_id = 1,
99 .minimum_version_id = 1,
a83000f5 100 .pre_load = spapr_tce_table_pre_load,
3aff6c2f 101 .fields = (VMStateField[]) {
a83000f5
AL
102 /* Sanity check */
103 VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable),
104 VMSTATE_UINT32_EQUAL(window_size, sPAPRTCETable),
105
106 /* IOMMU state */
107 VMSTATE_BOOL(bypass, sPAPRTCETable),
108 VMSTATE_VARRAY_UINT32(table, sPAPRTCETable, nb_table, 0, vmstate_info_uint64, uint64_t),
109
110 VMSTATE_END_OF_LIST()
111 },
112};
113
a84bb436
PB
114static MemoryRegionIOMMUOps spapr_iommu_ops = {
115 .translate = spapr_tce_translate_iommu,
116};
ad0ebb91 117
a83000f5 118static int spapr_tce_table_realize(DeviceState *dev)
ad0ebb91 119{
a83000f5 120 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
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121
122 if (kvm_enabled()) {
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AL
123 tcet->table = kvmppc_create_spapr_tce(tcet->liobn,
124 tcet->window_size,
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125 &tcet->fd);
126 }
127
128 if (!tcet->table) {
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129 size_t table_size = (tcet->window_size >> SPAPR_TCE_PAGE_SHIFT)
130 * sizeof(uint64_t);
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131 tcet->table = g_malloc0(table_size);
132 }
a83000f5 133 tcet->nb_table = tcet->window_size >> SPAPR_TCE_PAGE_SHIFT;
ad0ebb91 134
7e472264 135 trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd);
ad0ebb91 136
a83000f5 137 memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops,
a84bb436 138 "iommu-spapr", UINT64_MAX);
a84bb436 139
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140 QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
141
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AL
142 return 0;
143}
144
145sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn, size_t window_size)
146{
147 sPAPRTCETable *tcet;
148
149 if (spapr_tce_find_by_liobn(liobn)) {
150 fprintf(stderr, "Attempted to create TCE table with duplicate"
151 " LIOBN 0x%x\n", liobn);
152 return NULL;
153 }
154
155 if (!window_size) {
156 return NULL;
157 }
158
159 tcet = SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE));
160 tcet->liobn = liobn;
161 tcet->window_size = window_size;
162
163 object_property_add_child(OBJECT(owner), "tce-table", OBJECT(tcet), NULL);
164
165 qdev_init_nofail(DEVICE(tcet));
166
2b7dc949 167 return tcet;
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168}
169
a83000f5 170static void spapr_tce_table_finalize(Object *obj)
ad0ebb91 171{
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172 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(obj);
173
2b7dc949 174 QLIST_REMOVE(tcet, list);
ad0ebb91 175
2b7dc949
PB
176 if (!kvm_enabled() ||
177 (kvmppc_remove_spapr_tce(tcet->table, tcet->fd,
178 tcet->window_size) != 0)) {
179 g_free(tcet->table);
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180 }
181}
182
a84bb436
PB
183MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
184{
185 return &tcet->iommu;
186}
187
2b7dc949
PB
188void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass)
189{
53724ee5
DG
190 tcet->bypass = bypass;
191}
192
a83000f5 193static void spapr_tce_reset(DeviceState *dev)
eddeed26 194{
a83000f5 195 sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
53724ee5 196 size_t table_size = (tcet->window_size >> SPAPR_TCE_PAGE_SHIFT)
a83000f5 197 * sizeof(uint64_t);
eddeed26 198
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199 tcet->bypass = false;
200 memset(tcet->table, 0, table_size);
eddeed26
DG
201}
202
edded454
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203static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
204 target_ulong tce)
205{
a84bb436 206 IOMMUTLBEntry entry;
edded454
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207
208 if (ioba >= tcet->window_size) {
b55519a0 209 hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
edded454
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210 TARGET_FMT_lx "\n", ioba);
211 return H_PARAMETER;
212 }
213
a83000f5 214 tcet->table[ioba >> SPAPR_TCE_PAGE_SHIFT] = tce;
edded454 215
a84bb436
PB
216 entry.target_as = &address_space_memory,
217 entry.iova = ioba & ~SPAPR_TCE_PAGE_MASK;
218 entry.translated_addr = tce & ~SPAPR_TCE_PAGE_MASK;
219 entry.addr_mask = SPAPR_TCE_PAGE_MASK;
220 entry.perm = tce;
221 memory_region_notify_iommu(&tcet->iommu, entry);
222
edded454
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223 return H_SUCCESS;
224}
ad0ebb91 225
b13ce26d 226static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
ad0ebb91
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227 target_ulong opcode, target_ulong *args)
228{
229 target_ulong liobn = args[0];
230 target_ulong ioba = args[1];
231 target_ulong tce = args[2];
7e472264 232 target_ulong ret = H_PARAMETER;
ad0ebb91 233 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
ad0ebb91 234
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235 ioba &= ~(SPAPR_TCE_PAGE_SIZE - 1);
236
edded454 237 if (tcet) {
7e472264 238 ret = put_tce_emu(tcet, ioba, tce);
edded454 239 }
7e472264 240 trace_spapr_iommu_put(liobn, ioba, tce, ret);
ad0ebb91 241
7e472264 242 return ret;
ad0ebb91
DG
243}
244
a0fcac9c
LD
245static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
246 target_ulong *tce)
247{
248 if (ioba >= tcet->window_size) {
249 hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x"
250 TARGET_FMT_lx "\n", ioba);
251 return H_PARAMETER;
252 }
253
254 *tce = tcet->table[ioba >> SPAPR_TCE_PAGE_SHIFT];
255
256 return H_SUCCESS;
257}
258
259static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
260 target_ulong opcode, target_ulong *args)
261{
262 target_ulong liobn = args[0];
263 target_ulong ioba = args[1];
264 target_ulong tce = 0;
265 target_ulong ret = H_PARAMETER;
266 sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
267
268 ioba &= ~(SPAPR_TCE_PAGE_SIZE - 1);
269
270 if (tcet) {
271 ret = get_tce_emu(tcet, ioba, &tce);
272 if (!ret) {
273 args[0] = tce;
274 }
275 }
276 trace_spapr_iommu_get(liobn, ioba, ret, tce);
277
278 return ret;
279}
280
ad0ebb91 281int spapr_dma_dt(void *fdt, int node_off, const char *propname,
5c4cbcf2 282 uint32_t liobn, uint64_t window, uint32_t size)
ad0ebb91 283{
5c4cbcf2
AK
284 uint32_t dma_prop[5];
285 int ret;
286
287 dma_prop[0] = cpu_to_be32(liobn);
288 dma_prop[1] = cpu_to_be32(window >> 32);
289 dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF);
290 dma_prop[3] = 0; /* window size is 32 bits */
291 dma_prop[4] = cpu_to_be32(size);
292
293 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
294 if (ret < 0) {
295 return ret;
296 }
ad0ebb91 297
5c4cbcf2
AK
298 ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
299 if (ret < 0) {
300 return ret;
301 }
ad0ebb91 302
5c4cbcf2
AK
303 ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop));
304 if (ret < 0) {
305 return ret;
ad0ebb91
DG
306 }
307
308 return 0;
309}
5c4cbcf2
AK
310
311int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
2b7dc949 312 sPAPRTCETable *tcet)
5c4cbcf2 313{
2b7dc949 314 if (!tcet) {
5c4cbcf2
AK
315 return 0;
316 }
317
2b7dc949
PB
318 return spapr_dma_dt(fdt, node_off, propname,
319 tcet->liobn, 0, tcet->window_size);
5c4cbcf2 320}
a83000f5
AL
321
322static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
323{
324 DeviceClass *dc = DEVICE_CLASS(klass);
325 dc->vmsd = &vmstate_spapr_tce_table;
326 dc->init = spapr_tce_table_realize;
327 dc->reset = spapr_tce_reset;
328
329 QLIST_INIT(&spapr_tce_tables);
330
331 /* hcall-tce */
332 spapr_register_hypercall(H_PUT_TCE, h_put_tce);
a0fcac9c 333 spapr_register_hypercall(H_GET_TCE, h_get_tce);
a83000f5
AL
334}
335
336static TypeInfo spapr_tce_table_info = {
337 .name = TYPE_SPAPR_TCE_TABLE,
338 .parent = TYPE_DEVICE,
339 .instance_size = sizeof(sPAPRTCETable),
340 .class_init = spapr_tce_table_class_init,
341 .instance_finalize = spapr_tce_table_finalize,
342};
343
344static void register_types(void)
345{
346 type_register_static(&spapr_tce_table_info);
347}
348
349type_init(register_types);