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Commit | Line | Data |
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ad0ebb91 DG |
1 | /* |
2 | * QEMU sPAPR IOMMU (TCE) code | |
3 | * | |
4 | * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com> | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
83c9f4ca | 19 | #include "hw/hw.h" |
9c17d615 | 20 | #include "sysemu/kvm.h" |
83c9f4ca | 21 | #include "hw/qdev.h" |
ad0ebb91 | 22 | #include "kvm_ppc.h" |
9c17d615 | 23 | #include "sysemu/dma.h" |
022c62cb | 24 | #include "exec/address-spaces.h" |
7e472264 | 25 | #include "trace.h" |
ad0ebb91 | 26 | |
0d09e41a | 27 | #include "hw/ppc/spapr.h" |
ee9a569a | 28 | #include "hw/ppc/spapr_vio.h" |
ad0ebb91 DG |
29 | |
30 | #include <libfdt.h> | |
31 | ||
ad0ebb91 DG |
32 | enum sPAPRTCEAccess { |
33 | SPAPR_TCE_FAULT = 0, | |
34 | SPAPR_TCE_RO = 1, | |
35 | SPAPR_TCE_WO = 2, | |
36 | SPAPR_TCE_RW = 3, | |
37 | }; | |
38 | ||
650f33ad AK |
39 | #define IOMMU_PAGE_SIZE(shift) (1ULL << (shift)) |
40 | #define IOMMU_PAGE_MASK(shift) (~(IOMMU_PAGE_SIZE(shift) - 1)) | |
41 | ||
6a0a70b0 | 42 | static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables; |
ad0ebb91 | 43 | |
f9ce8e0a | 44 | sPAPRTCETable *spapr_tce_find_by_liobn(target_ulong liobn) |
ad0ebb91 DG |
45 | { |
46 | sPAPRTCETable *tcet; | |
47 | ||
d4261662 DG |
48 | if (liobn & 0xFFFFFFFF00000000ULL) { |
49 | hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx "\n", | |
50 | liobn); | |
51 | return NULL; | |
52 | } | |
53 | ||
ad0ebb91 | 54 | QLIST_FOREACH(tcet, &spapr_tce_tables, list) { |
f9ce8e0a | 55 | if (tcet->liobn == (uint32_t)liobn) { |
ad0ebb91 DG |
56 | return tcet; |
57 | } | |
58 | } | |
59 | ||
60 | return NULL; | |
61 | } | |
62 | ||
79e2b9ae | 63 | /* Called from RCU critical section */ |
8d7b8cb9 LT |
64 | static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr, |
65 | bool is_write) | |
ad0ebb91 | 66 | { |
a84bb436 | 67 | sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu); |
ad0ebb91 | 68 | uint64_t tce; |
7e472264 AK |
69 | IOMMUTLBEntry ret = { |
70 | .target_as = &address_space_memory, | |
71 | .iova = 0, | |
72 | .translated_addr = 0, | |
73 | .addr_mask = ~(hwaddr)0, | |
74 | .perm = IOMMU_NONE, | |
75 | }; | |
ad0ebb91 | 76 | |
ee9a569a | 77 | if ((addr >> tcet->page_shift) < tcet->nb_table) { |
7e472264 | 78 | /* Check if we are in bound */ |
650f33ad AK |
79 | hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); |
80 | ||
81 | tce = tcet->table[addr >> tcet->page_shift]; | |
82 | ret.iova = addr & page_mask; | |
83 | ret.translated_addr = tce & page_mask; | |
84 | ret.addr_mask = ~page_mask; | |
27e27782 | 85 | ret.perm = tce & IOMMU_RW; |
ad0ebb91 | 86 | } |
7e472264 AK |
87 | trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm, |
88 | ret.addr_mask); | |
ad0ebb91 | 89 | |
7e472264 | 90 | return ret; |
a71bfbfe PB |
91 | } |
92 | ||
ee9a569a AK |
93 | static int spapr_tce_table_post_load(void *opaque, int version_id) |
94 | { | |
95 | sPAPRTCETable *tcet = SPAPR_TCE_TABLE(opaque); | |
96 | ||
97 | if (tcet->vdev) { | |
98 | spapr_vio_set_bypass(tcet->vdev, tcet->bypass); | |
99 | } | |
100 | ||
101 | return 0; | |
102 | } | |
103 | ||
a83000f5 AL |
104 | static const VMStateDescription vmstate_spapr_tce_table = { |
105 | .name = "spapr_iommu", | |
523e7b8a AK |
106 | .version_id = 2, |
107 | .minimum_version_id = 2, | |
ee9a569a | 108 | .post_load = spapr_tce_table_post_load, |
523e7b8a | 109 | .fields = (VMStateField []) { |
a83000f5 AL |
110 | /* Sanity check */ |
111 | VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable), | |
523e7b8a | 112 | VMSTATE_UINT32_EQUAL(nb_table, sPAPRTCETable), |
a83000f5 AL |
113 | |
114 | /* IOMMU state */ | |
115 | VMSTATE_BOOL(bypass, sPAPRTCETable), | |
116 | VMSTATE_VARRAY_UINT32(table, sPAPRTCETable, nb_table, 0, vmstate_info_uint64, uint64_t), | |
117 | ||
118 | VMSTATE_END_OF_LIST() | |
119 | }, | |
120 | }; | |
121 | ||
a84bb436 PB |
122 | static MemoryRegionIOMMUOps spapr_iommu_ops = { |
123 | .translate = spapr_tce_translate_iommu, | |
124 | }; | |
ad0ebb91 | 125 | |
a83000f5 | 126 | static int spapr_tce_table_realize(DeviceState *dev) |
ad0ebb91 | 127 | { |
a83000f5 | 128 | sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); |
12fd2853 | 129 | uint64_t window_size = (uint64_t)tcet->nb_table << tcet->page_shift; |
ad0ebb91 | 130 | |
12fd2853 | 131 | if (kvm_enabled() && !(window_size >> 32)) { |
a83000f5 | 132 | tcet->table = kvmppc_create_spapr_tce(tcet->liobn, |
12fd2853 | 133 | window_size, |
9bb62a07 AK |
134 | &tcet->fd, |
135 | tcet->vfio_accel); | |
ad0ebb91 DG |
136 | } |
137 | ||
138 | if (!tcet->table) { | |
523e7b8a | 139 | size_t table_size = tcet->nb_table * sizeof(uint64_t); |
ad0ebb91 DG |
140 | tcet->table = g_malloc0(table_size); |
141 | } | |
142 | ||
7e472264 | 143 | trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd); |
ad0ebb91 | 144 | |
a83000f5 | 145 | memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops, |
ee9a569a AK |
146 | "iommu-spapr", |
147 | (uint64_t)tcet->nb_table << tcet->page_shift); | |
a84bb436 | 148 | |
ad0ebb91 DG |
149 | QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list); |
150 | ||
00d4f525 AK |
151 | vmstate_register(DEVICE(tcet), tcet->liobn, &vmstate_spapr_tce_table, |
152 | tcet); | |
153 | ||
a83000f5 AL |
154 | return 0; |
155 | } | |
156 | ||
523e7b8a | 157 | sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn, |
1b8eceee | 158 | uint64_t bus_offset, |
650f33ad | 159 | uint32_t page_shift, |
9bb62a07 AK |
160 | uint32_t nb_table, |
161 | bool vfio_accel) | |
a83000f5 AL |
162 | { |
163 | sPAPRTCETable *tcet; | |
dea1b3ce | 164 | char tmp[64]; |
a83000f5 AL |
165 | |
166 | if (spapr_tce_find_by_liobn(liobn)) { | |
167 | fprintf(stderr, "Attempted to create TCE table with duplicate" | |
168 | " LIOBN 0x%x\n", liobn); | |
169 | return NULL; | |
170 | } | |
171 | ||
523e7b8a | 172 | if (!nb_table) { |
a83000f5 AL |
173 | return NULL; |
174 | } | |
175 | ||
176 | tcet = SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE)); | |
177 | tcet->liobn = liobn; | |
1b8eceee | 178 | tcet->bus_offset = bus_offset; |
650f33ad | 179 | tcet->page_shift = page_shift; |
523e7b8a | 180 | tcet->nb_table = nb_table; |
9bb62a07 | 181 | tcet->vfio_accel = vfio_accel; |
a83000f5 | 182 | |
dea1b3ce AK |
183 | snprintf(tmp, sizeof(tmp), "tce-table-%x", liobn); |
184 | object_property_add_child(OBJECT(owner), tmp, OBJECT(tcet), NULL); | |
a83000f5 | 185 | |
e4c35b78 | 186 | object_property_set_bool(OBJECT(tcet), true, "realized", NULL); |
a83000f5 | 187 | |
2b7dc949 | 188 | return tcet; |
ad0ebb91 DG |
189 | } |
190 | ||
5f9490de | 191 | static void spapr_tce_table_unrealize(DeviceState *dev, Error **errp) |
ad0ebb91 | 192 | { |
5f9490de | 193 | sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); |
a83000f5 | 194 | |
2b7dc949 | 195 | QLIST_REMOVE(tcet, list); |
ad0ebb91 | 196 | |
2b7dc949 PB |
197 | if (!kvm_enabled() || |
198 | (kvmppc_remove_spapr_tce(tcet->table, tcet->fd, | |
523e7b8a | 199 | tcet->nb_table) != 0)) { |
2b7dc949 | 200 | g_free(tcet->table); |
ad0ebb91 DG |
201 | } |
202 | } | |
203 | ||
a84bb436 PB |
204 | MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet) |
205 | { | |
206 | return &tcet->iommu; | |
207 | } | |
208 | ||
a83000f5 | 209 | static void spapr_tce_reset(DeviceState *dev) |
eddeed26 | 210 | { |
a83000f5 | 211 | sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev); |
523e7b8a | 212 | size_t table_size = tcet->nb_table * sizeof(uint64_t); |
eddeed26 | 213 | |
53724ee5 | 214 | memset(tcet->table, 0, table_size); |
eddeed26 DG |
215 | } |
216 | ||
edded454 DG |
217 | static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba, |
218 | target_ulong tce) | |
219 | { | |
a84bb436 | 220 | IOMMUTLBEntry entry; |
650f33ad | 221 | hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); |
1b8eceee | 222 | unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift; |
edded454 | 223 | |
1b8eceee | 224 | if (index >= tcet->nb_table) { |
b55519a0 | 225 | hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x" |
edded454 DG |
226 | TARGET_FMT_lx "\n", ioba); |
227 | return H_PARAMETER; | |
228 | } | |
229 | ||
1b8eceee | 230 | tcet->table[index] = tce; |
edded454 | 231 | |
a84bb436 | 232 | entry.target_as = &address_space_memory, |
650f33ad AK |
233 | entry.iova = ioba & page_mask; |
234 | entry.translated_addr = tce & page_mask; | |
235 | entry.addr_mask = ~page_mask; | |
27e27782 | 236 | entry.perm = tce & IOMMU_RW; |
a84bb436 PB |
237 | memory_region_notify_iommu(&tcet->iommu, entry); |
238 | ||
edded454 DG |
239 | return H_SUCCESS; |
240 | } | |
ad0ebb91 | 241 | |
da95324e AK |
242 | static target_ulong h_put_tce_indirect(PowerPCCPU *cpu, |
243 | sPAPREnvironment *spapr, | |
244 | target_ulong opcode, target_ulong *args) | |
245 | { | |
246 | int i; | |
247 | target_ulong liobn = args[0]; | |
248 | target_ulong ioba = args[1]; | |
249 | target_ulong ioba1 = ioba; | |
250 | target_ulong tce_list = args[2]; | |
251 | target_ulong npages = args[3]; | |
f1215ea7 | 252 | target_ulong ret = H_PARAMETER, tce = 0; |
da95324e AK |
253 | sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); |
254 | CPUState *cs = CPU(cpu); | |
650f33ad | 255 | hwaddr page_mask, page_size; |
da95324e AK |
256 | |
257 | if (!tcet) { | |
258 | return H_PARAMETER; | |
259 | } | |
260 | ||
650f33ad | 261 | if ((npages > 512) || (tce_list & SPAPR_TCE_PAGE_MASK)) { |
da95324e AK |
262 | return H_PARAMETER; |
263 | } | |
264 | ||
650f33ad AK |
265 | page_mask = IOMMU_PAGE_MASK(tcet->page_shift); |
266 | page_size = IOMMU_PAGE_SIZE(tcet->page_shift); | |
267 | ioba &= page_mask; | |
268 | ||
269 | for (i = 0; i < npages; ++i, ioba += page_size) { | |
270 | target_ulong off = (tce_list & ~SPAPR_TCE_RW) + | |
271 | i * sizeof(target_ulong); | |
f1215ea7 | 272 | tce = ldq_be_phys(cs->as, off); |
da95324e | 273 | |
da95324e AK |
274 | ret = put_tce_emu(tcet, ioba, tce); |
275 | if (ret) { | |
276 | break; | |
277 | } | |
278 | } | |
279 | ||
280 | /* Trace last successful or the first problematic entry */ | |
281 | i = i ? (i - 1) : 0; | |
d9d96a3c AK |
282 | if (SPAPR_IS_PCI_LIOBN(liobn)) { |
283 | trace_spapr_iommu_pci_indirect(liobn, ioba1, tce_list, i, tce, ret); | |
284 | } else { | |
285 | trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i, tce, ret); | |
286 | } | |
da95324e AK |
287 | return ret; |
288 | } | |
289 | ||
290 | static target_ulong h_stuff_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr, | |
291 | target_ulong opcode, target_ulong *args) | |
292 | { | |
293 | int i; | |
294 | target_ulong liobn = args[0]; | |
295 | target_ulong ioba = args[1]; | |
296 | target_ulong tce_value = args[2]; | |
297 | target_ulong npages = args[3]; | |
298 | target_ulong ret = H_PARAMETER; | |
299 | sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); | |
650f33ad | 300 | hwaddr page_mask, page_size; |
da95324e AK |
301 | |
302 | if (!tcet) { | |
303 | return H_PARAMETER; | |
304 | } | |
305 | ||
306 | if (npages > tcet->nb_table) { | |
307 | return H_PARAMETER; | |
308 | } | |
309 | ||
650f33ad AK |
310 | page_mask = IOMMU_PAGE_MASK(tcet->page_shift); |
311 | page_size = IOMMU_PAGE_SIZE(tcet->page_shift); | |
312 | ioba &= page_mask; | |
da95324e | 313 | |
650f33ad | 314 | for (i = 0; i < npages; ++i, ioba += page_size) { |
da95324e AK |
315 | ret = put_tce_emu(tcet, ioba, tce_value); |
316 | if (ret) { | |
317 | break; | |
318 | } | |
319 | } | |
d9d96a3c AK |
320 | if (SPAPR_IS_PCI_LIOBN(liobn)) { |
321 | trace_spapr_iommu_pci_stuff(liobn, ioba, tce_value, npages, ret); | |
322 | } else { | |
323 | trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret); | |
324 | } | |
da95324e AK |
325 | |
326 | return ret; | |
327 | } | |
328 | ||
b13ce26d | 329 | static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr, |
ad0ebb91 DG |
330 | target_ulong opcode, target_ulong *args) |
331 | { | |
332 | target_ulong liobn = args[0]; | |
333 | target_ulong ioba = args[1]; | |
334 | target_ulong tce = args[2]; | |
7e472264 | 335 | target_ulong ret = H_PARAMETER; |
ad0ebb91 | 336 | sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); |
ad0ebb91 | 337 | |
edded454 | 338 | if (tcet) { |
650f33ad AK |
339 | hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); |
340 | ||
341 | ioba &= page_mask; | |
342 | ||
7e472264 | 343 | ret = put_tce_emu(tcet, ioba, tce); |
edded454 | 344 | } |
d9d96a3c AK |
345 | if (SPAPR_IS_PCI_LIOBN(liobn)) { |
346 | trace_spapr_iommu_pci_put(liobn, ioba, tce, ret); | |
347 | } else { | |
348 | trace_spapr_iommu_put(liobn, ioba, tce, ret); | |
349 | } | |
ad0ebb91 | 350 | |
7e472264 | 351 | return ret; |
ad0ebb91 DG |
352 | } |
353 | ||
a0fcac9c LD |
354 | static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba, |
355 | target_ulong *tce) | |
356 | { | |
1b8eceee AK |
357 | unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift; |
358 | ||
359 | if (index >= tcet->nb_table) { | |
a0fcac9c LD |
360 | hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x" |
361 | TARGET_FMT_lx "\n", ioba); | |
362 | return H_PARAMETER; | |
363 | } | |
364 | ||
1b8eceee | 365 | *tce = tcet->table[index]; |
a0fcac9c LD |
366 | |
367 | return H_SUCCESS; | |
368 | } | |
369 | ||
370 | static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr, | |
371 | target_ulong opcode, target_ulong *args) | |
372 | { | |
373 | target_ulong liobn = args[0]; | |
374 | target_ulong ioba = args[1]; | |
375 | target_ulong tce = 0; | |
376 | target_ulong ret = H_PARAMETER; | |
377 | sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn); | |
378 | ||
a0fcac9c | 379 | if (tcet) { |
650f33ad AK |
380 | hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift); |
381 | ||
382 | ioba &= page_mask; | |
383 | ||
a0fcac9c LD |
384 | ret = get_tce_emu(tcet, ioba, &tce); |
385 | if (!ret) { | |
386 | args[0] = tce; | |
387 | } | |
388 | } | |
d9d96a3c AK |
389 | if (SPAPR_IS_PCI_LIOBN(liobn)) { |
390 | trace_spapr_iommu_pci_get(liobn, ioba, ret, tce); | |
391 | } else { | |
392 | trace_spapr_iommu_get(liobn, ioba, ret, tce); | |
393 | } | |
a0fcac9c LD |
394 | |
395 | return ret; | |
396 | } | |
397 | ||
ad0ebb91 | 398 | int spapr_dma_dt(void *fdt, int node_off, const char *propname, |
5c4cbcf2 | 399 | uint32_t liobn, uint64_t window, uint32_t size) |
ad0ebb91 | 400 | { |
5c4cbcf2 AK |
401 | uint32_t dma_prop[5]; |
402 | int ret; | |
403 | ||
404 | dma_prop[0] = cpu_to_be32(liobn); | |
405 | dma_prop[1] = cpu_to_be32(window >> 32); | |
406 | dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF); | |
407 | dma_prop[3] = 0; /* window size is 32 bits */ | |
408 | dma_prop[4] = cpu_to_be32(size); | |
409 | ||
410 | ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2); | |
411 | if (ret < 0) { | |
412 | return ret; | |
413 | } | |
ad0ebb91 | 414 | |
5c4cbcf2 AK |
415 | ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2); |
416 | if (ret < 0) { | |
417 | return ret; | |
418 | } | |
ad0ebb91 | 419 | |
5c4cbcf2 AK |
420 | ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop)); |
421 | if (ret < 0) { | |
422 | return ret; | |
ad0ebb91 DG |
423 | } |
424 | ||
425 | return 0; | |
426 | } | |
5c4cbcf2 AK |
427 | |
428 | int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname, | |
2b7dc949 | 429 | sPAPRTCETable *tcet) |
5c4cbcf2 | 430 | { |
2b7dc949 | 431 | if (!tcet) { |
5c4cbcf2 AK |
432 | return 0; |
433 | } | |
434 | ||
2b7dc949 | 435 | return spapr_dma_dt(fdt, node_off, propname, |
650f33ad | 436 | tcet->liobn, 0, tcet->nb_table << tcet->page_shift); |
5c4cbcf2 | 437 | } |
a83000f5 AL |
438 | |
439 | static void spapr_tce_table_class_init(ObjectClass *klass, void *data) | |
440 | { | |
441 | DeviceClass *dc = DEVICE_CLASS(klass); | |
a83000f5 AL |
442 | dc->init = spapr_tce_table_realize; |
443 | dc->reset = spapr_tce_reset; | |
5f9490de | 444 | dc->unrealize = spapr_tce_table_unrealize; |
a83000f5 AL |
445 | |
446 | QLIST_INIT(&spapr_tce_tables); | |
447 | ||
448 | /* hcall-tce */ | |
449 | spapr_register_hypercall(H_PUT_TCE, h_put_tce); | |
a0fcac9c | 450 | spapr_register_hypercall(H_GET_TCE, h_get_tce); |
da95324e AK |
451 | spapr_register_hypercall(H_PUT_TCE_INDIRECT, h_put_tce_indirect); |
452 | spapr_register_hypercall(H_STUFF_TCE, h_stuff_tce); | |
a83000f5 AL |
453 | } |
454 | ||
455 | static TypeInfo spapr_tce_table_info = { | |
456 | .name = TYPE_SPAPR_TCE_TABLE, | |
457 | .parent = TYPE_DEVICE, | |
458 | .instance_size = sizeof(sPAPRTCETable), | |
459 | .class_init = spapr_tce_table_class_init, | |
a83000f5 AL |
460 | }; |
461 | ||
462 | static void register_types(void) | |
463 | { | |
464 | type_register_static(&spapr_tce_table_info); | |
465 | } | |
466 | ||
467 | type_init(register_types); |