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Commit | Line | Data |
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39ac8455 DG |
1 | /* |
2 | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator | |
3 | * | |
4 | * Hypercall based emulated RTAS | |
5 | * | |
6 | * Copyright (c) 2010-2011 David Gibson, IBM Corporation. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | * | |
26 | */ | |
0d75590d | 27 | #include "qemu/osdep.h" |
39ac8455 | 28 | #include "cpu.h" |
03dd024f | 29 | #include "qemu/log.h" |
ce9863b7 | 30 | #include "qemu/error-report.h" |
9c17d615 | 31 | #include "sysemu/sysemu.h" |
39ac8455 | 32 | #include "hw/qdev.h" |
9c17d615 | 33 | #include "sysemu/device_tree.h" |
db4ef288 | 34 | #include "sysemu/cpus.h" |
cf116ad4 | 35 | #include "sysemu/hw_accel.h" |
a84f7179 | 36 | #include "kvm_ppc.h" |
39ac8455 | 37 | |
0d09e41a PB |
38 | #include "hw/ppc/spapr.h" |
39 | #include "hw/ppc/spapr_vio.h" | |
eeddd59f | 40 | #include "hw/ppc/spapr_rtas.h" |
84369f63 | 41 | #include "hw/ppc/spapr_cpu_core.h" |
af81cf32 | 42 | #include "hw/ppc/ppc.h" |
e3943228 | 43 | #include "hw/boards.h" |
39ac8455 DG |
44 | |
45 | #include <libfdt.h> | |
8c8639df | 46 | #include "hw/ppc/spapr_drc.h" |
f348b6d1 | 47 | #include "qemu/cutils.h" |
028ec3ce | 48 | #include "trace.h" |
3f5dabce | 49 | #include "hw/ppc/fdt.h" |
cf116ad4 | 50 | #include "target/ppc/mmu-hash64.h" |
f00bed95 | 51 | #include "target/ppc/mmu-book3s-v3.h" |
8c8639df | 52 | |
ce2918cb | 53 | static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr, |
821303f5 DG |
54 | uint32_t token, uint32_t nargs, |
55 | target_ulong args, | |
56 | uint32_t nret, target_ulong rets) | |
57 | { | |
58 | uint8_t c = rtas_ld(args, 0); | |
ce2918cb | 59 | SpaprVioDevice *sdev = vty_lookup(spapr, 0); |
821303f5 DG |
60 | |
61 | if (!sdev) { | |
a64d325d | 62 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
821303f5 DG |
63 | } else { |
64 | vty_putchars(sdev, &c, sizeof(c)); | |
a64d325d | 65 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
66 | } |
67 | } | |
68 | ||
ce2918cb | 69 | static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr, |
821303f5 DG |
70 | uint32_t token, uint32_t nargs, target_ulong args, |
71 | uint32_t nret, target_ulong rets) | |
72 | { | |
73 | if (nargs != 2 || nret != 1) { | |
a64d325d | 74 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
821303f5 DG |
75 | return; |
76 | } | |
cf83f140 | 77 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
8a9c1b77 | 78 | cpu_stop_current(); |
a64d325d | 79 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
80 | } |
81 | ||
ce2918cb | 82 | static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr, |
c821a43c DG |
83 | uint32_t token, uint32_t nargs, |
84 | target_ulong args, | |
85 | uint32_t nret, target_ulong rets) | |
86 | { | |
87 | if (nargs != 0 || nret != 1) { | |
a64d325d | 88 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
c821a43c DG |
89 | return; |
90 | } | |
cf83f140 | 91 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
a64d325d | 92 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
c821a43c DG |
93 | } |
94 | ||
210b580b | 95 | static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_, |
ce2918cb | 96 | SpaprMachineState *spapr, |
a9f8ad8f DG |
97 | uint32_t token, uint32_t nargs, |
98 | target_ulong args, | |
99 | uint32_t nret, target_ulong rets) | |
100 | { | |
101 | target_ulong id; | |
0f20ba62 | 102 | PowerPCCPU *cpu; |
a9f8ad8f DG |
103 | |
104 | if (nargs != 1 || nret != 2) { | |
a64d325d | 105 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
106 | return; |
107 | } | |
108 | ||
109 | id = rtas_ld(args, 0); | |
2e886fb3 | 110 | cpu = spapr_find_cpu(id); |
05318a85 | 111 | if (cpu != NULL) { |
0f20ba62 | 112 | if (CPU(cpu)->halted) { |
a9f8ad8f DG |
113 | rtas_st(rets, 1, 0); |
114 | } else { | |
115 | rtas_st(rets, 1, 2); | |
116 | } | |
117 | ||
a64d325d | 118 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
119 | return; |
120 | } | |
121 | ||
122 | /* Didn't find a matching cpu */ | |
a64d325d | 123 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
124 | } |
125 | ||
ce2918cb | 126 | static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr, |
a9f8ad8f DG |
127 | uint32_t token, uint32_t nargs, |
128 | target_ulong args, | |
129 | uint32_t nret, target_ulong rets) | |
130 | { | |
131 | target_ulong id, start, r3; | |
cf116ad4 DG |
132 | PowerPCCPU *newcpu; |
133 | CPUPPCState *env; | |
134 | PowerPCCPUClass *pcc; | |
98248918 | 135 | target_ulong lpcr; |
a9f8ad8f DG |
136 | |
137 | if (nargs != 3 || nret != 1) { | |
a64d325d | 138 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
139 | return; |
140 | } | |
141 | ||
142 | id = rtas_ld(args, 0); | |
143 | start = rtas_ld(args, 1); | |
144 | r3 = rtas_ld(args, 2); | |
145 | ||
cf116ad4 DG |
146 | newcpu = spapr_find_cpu(id); |
147 | if (!newcpu) { | |
148 | /* Didn't find a matching cpu */ | |
149 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
150 | return; | |
151 | } | |
a9f8ad8f | 152 | |
cf116ad4 DG |
153 | env = &newcpu->env; |
154 | pcc = POWERPC_CPU_GET_CLASS(newcpu); | |
a9f8ad8f | 155 | |
cf116ad4 DG |
156 | if (!CPU(newcpu)->halted) { |
157 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); | |
158 | return; | |
159 | } | |
048706d9 | 160 | |
cf116ad4 | 161 | cpu_synchronize_state(CPU(newcpu)); |
9a94ee5b | 162 | |
cf116ad4 | 163 | env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME); |
98248918 | 164 | |
cf116ad4 | 165 | /* Enable Power-saving mode Exit Cause exceptions for the new CPU */ |
47a9b551 | 166 | lpcr = env->spr[SPR_LPCR]; |
98248918 DG |
167 | if (!pcc->interrupts_big_endian(callcpu)) { |
168 | lpcr |= LPCR_ILE; | |
169 | } | |
f00bed95 DG |
170 | if (env->mmu_model == POWERPC_MMU_3_00) { |
171 | /* | |
172 | * New cpus are expected to start in the same radix/hash mode | |
173 | * as the existing CPUs | |
174 | */ | |
00fd075e BH |
175 | if (ppc64_v3_radix(callcpu)) { |
176 | lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; | |
f00bed95 | 177 | } else { |
00fd075e | 178 | lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR); |
f00bed95 | 179 | } |
70de0967 | 180 | env->spr[SPR_PSSCR] &= ~PSSCR_EC; |
f00bed95 | 181 | } |
98248918 DG |
182 | ppc_store_lpcr(newcpu, lpcr); |
183 | ||
184 | /* | |
185 | * Set the timebase offset of the new CPU to that of the invoking | |
186 | * CPU. This helps hotplugged CPU to have the correct timebase | |
187 | * offset. | |
188 | */ | |
189 | newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset; | |
9a94ee5b | 190 | |
84369f63 | 191 | spapr_cpu_set_entry_state(newcpu, start, r3); |
a9f8ad8f | 192 | |
cf116ad4 | 193 | qemu_cpu_kick(CPU(newcpu)); |
a9f8ad8f | 194 | |
cf116ad4 | 195 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
196 | } |
197 | ||
ce2918cb | 198 | static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr, |
59760f2d AK |
199 | uint32_t token, uint32_t nargs, |
200 | target_ulong args, | |
201 | uint32_t nret, target_ulong rets) | |
202 | { | |
203 | CPUState *cs = CPU(cpu); | |
204 | CPUPPCState *env = &cpu->env; | |
9a94ee5b | 205 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
59760f2d | 206 | |
9a94ee5b CLG |
207 | /* Disable Power-saving mode Exit Cause exceptions for the CPU. |
208 | * This could deliver an interrupt on a dying CPU and crash the | |
70de0967 SJS |
209 | * guest. |
210 | * For the same reason, set PSSCR_EC. | |
211 | */ | |
cf116ad4 | 212 | ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm); |
70de0967 | 213 | env->spr[SPR_PSSCR] |= PSSCR_EC; |
cf116ad4 | 214 | cs->halted = 1; |
a84f7179 | 215 | kvmppc_set_reg_ppc_online(cpu, 0); |
cf116ad4 | 216 | qemu_cpu_kick(cs); |
59760f2d AK |
217 | } |
218 | ||
c920f7b4 DG |
219 | static inline int sysparm_st(target_ulong addr, target_ulong len, |
220 | const void *val, uint16_t vallen) | |
221 | { | |
222 | hwaddr phys = ppc64_phys_to_real(addr); | |
223 | ||
224 | if (len < 2) { | |
225 | return RTAS_OUT_SYSPARM_PARAM_ERROR; | |
226 | } | |
227 | stw_be_phys(&address_space_memory, phys, vallen); | |
228 | cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); | |
229 | return RTAS_OUT_SUCCESS; | |
230 | } | |
231 | ||
3ada6b11 | 232 | static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, |
ce2918cb | 233 | SpaprMachineState *spapr, |
3ada6b11 AK |
234 | uint32_t token, uint32_t nargs, |
235 | target_ulong args, | |
236 | uint32_t nret, target_ulong rets) | |
237 | { | |
238 | target_ulong parameter = rtas_ld(args, 0); | |
239 | target_ulong buffer = rtas_ld(args, 1); | |
240 | target_ulong length = rtas_ld(args, 2); | |
c920f7b4 | 241 | target_ulong ret; |
3ada6b11 AK |
242 | |
243 | switch (parameter) { | |
3b50d897 | 244 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: { |
e3943228 | 245 | char *param_val = g_strdup_printf("MaxEntCap=%d," |
ab3dd749 | 246 | "DesMem=%" PRIu64 "," |
e3943228 SB |
247 | "DesProcs=%d," |
248 | "MaxPlatProcs=%d", | |
249 | max_cpus, | |
d23b6caa | 250 | current_machine->ram_size / MiB, |
e3943228 SB |
251 | smp_cpus, |
252 | max_cpus); | |
c920f7b4 | 253 | ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); |
3b50d897 S |
254 | g_free(param_val); |
255 | break; | |
256 | } | |
3052d951 S |
257 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: { |
258 | uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED; | |
259 | ||
c920f7b4 | 260 | ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val)); |
3ada6b11 AK |
261 | break; |
262 | } | |
b907d7b0 | 263 | case RTAS_SYSPARM_UUID: |
9c5ce8db FZ |
264 | ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid, |
265 | (qemu_uuid_set ? 16 : 0)); | |
b907d7b0 | 266 | break; |
3052d951 S |
267 | default: |
268 | ret = RTAS_OUT_NOT_SUPPORTED; | |
269 | } | |
3ada6b11 AK |
270 | |
271 | rtas_st(rets, 0, ret); | |
272 | } | |
273 | ||
274 | static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu, | |
ce2918cb | 275 | SpaprMachineState *spapr, |
3ada6b11 AK |
276 | uint32_t token, uint32_t nargs, |
277 | target_ulong args, | |
278 | uint32_t nret, target_ulong rets) | |
279 | { | |
280 | target_ulong parameter = rtas_ld(args, 0); | |
281 | target_ulong ret = RTAS_OUT_NOT_SUPPORTED; | |
282 | ||
283 | switch (parameter) { | |
3b50d897 | 284 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: |
3052d951 | 285 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: |
b907d7b0 | 286 | case RTAS_SYSPARM_UUID: |
3ada6b11 AK |
287 | ret = RTAS_OUT_NOT_AUTHORIZED; |
288 | break; | |
289 | } | |
290 | ||
291 | rtas_st(rets, 0, ret); | |
292 | } | |
293 | ||
2e14072f | 294 | static void rtas_ibm_os_term(PowerPCCPU *cpu, |
ce2918cb | 295 | SpaprMachineState *spapr, |
2e14072f ND |
296 | uint32_t token, uint32_t nargs, |
297 | target_ulong args, | |
298 | uint32_t nret, target_ulong rets) | |
299 | { | |
2c553477 | 300 | qemu_system_guest_panicked(NULL); |
2e14072f | 301 | |
2c553477 | 302 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
2e14072f ND |
303 | } |
304 | ||
ce2918cb | 305 | static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, |
094d2058 NF |
306 | uint32_t token, uint32_t nargs, |
307 | target_ulong args, uint32_t nret, | |
308 | target_ulong rets) | |
309 | { | |
310 | int32_t power_domain; | |
311 | ||
312 | if (nargs != 2 || nret != 2) { | |
313 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
314 | return; | |
315 | } | |
316 | ||
317 | /* we currently only use a single, "live insert" powerdomain for | |
318 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
319 | */ | |
320 | power_domain = rtas_ld(args, 0); | |
321 | if (power_domain != -1) { | |
322 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
323 | return; | |
324 | } | |
325 | ||
326 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
327 | rtas_st(rets, 1, 100); | |
328 | } | |
329 | ||
ce2918cb | 330 | static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, |
094d2058 NF |
331 | uint32_t token, uint32_t nargs, |
332 | target_ulong args, uint32_t nret, | |
333 | target_ulong rets) | |
334 | { | |
335 | int32_t power_domain; | |
336 | ||
337 | if (nargs != 1 || nret != 2) { | |
338 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
339 | return; | |
340 | } | |
341 | ||
342 | /* we currently only use a single, "live insert" powerdomain for | |
343 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
344 | */ | |
345 | power_domain = rtas_ld(args, 0); | |
346 | if (power_domain != -1) { | |
347 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
348 | return; | |
349 | } | |
350 | ||
351 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
352 | rtas_st(rets, 1, 100); | |
353 | } | |
354 | ||
39ac8455 DG |
355 | static struct rtas_call { |
356 | const char *name; | |
357 | spapr_rtas_fn fn; | |
3a3b8502 | 358 | } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE]; |
39ac8455 | 359 | |
ce2918cb | 360 | target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr, |
39ac8455 DG |
361 | uint32_t token, uint32_t nargs, target_ulong args, |
362 | uint32_t nret, target_ulong rets) | |
363 | { | |
3a3b8502 AK |
364 | if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) { |
365 | struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE); | |
39ac8455 DG |
366 | |
367 | if (call->fn) { | |
210b580b | 368 | call->fn(cpu, spapr, token, nargs, args, nret, rets); |
39ac8455 DG |
369 | return H_SUCCESS; |
370 | } | |
371 | } | |
372 | ||
821303f5 DG |
373 | /* HACK: Some Linux early debug code uses RTAS display-character, |
374 | * but assumes the token value is 0xa (which it is on some real | |
375 | * machines) without looking it up in the device tree. This | |
376 | * special case makes this work */ | |
377 | if (token == 0xa) { | |
210b580b | 378 | rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets); |
821303f5 DG |
379 | return H_SUCCESS; |
380 | } | |
381 | ||
39ac8455 | 382 | hcall_dprintf("Unknown RTAS token 0x%x\n", token); |
a64d325d | 383 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
39ac8455 DG |
384 | return H_PARAMETER; |
385 | } | |
386 | ||
eeddd59f LV |
387 | uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args, |
388 | uint32_t nret, uint64_t rets) | |
389 | { | |
390 | int token; | |
391 | ||
392 | for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) { | |
393 | if (strcmp(cmd, rtas_table[token].name) == 0) { | |
ce2918cb | 394 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
eeddd59f LV |
395 | PowerPCCPU *cpu = POWERPC_CPU(first_cpu); |
396 | ||
397 | rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE, | |
398 | nargs, args, nret, rets); | |
399 | return H_SUCCESS; | |
400 | } | |
401 | } | |
402 | return H_PARAMETER; | |
403 | } | |
404 | ||
3a3b8502 | 405 | void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn) |
39ac8455 | 406 | { |
adf9ac50 | 407 | assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)); |
c89d5299 | 408 | |
3a3b8502 | 409 | token -= RTAS_TOKEN_BASE; |
adf9ac50 | 410 | |
64db6c70 | 411 | assert(!name || !rtas_table[token].name); |
39ac8455 | 412 | |
3a3b8502 AK |
413 | rtas_table[token].name = name; |
414 | rtas_table[token].fn = fn; | |
39ac8455 DG |
415 | } |
416 | ||
3f5dabce | 417 | void spapr_dt_rtas_tokens(void *fdt, int rtas) |
39ac8455 | 418 | { |
39ac8455 DG |
419 | int i; |
420 | ||
3a3b8502 | 421 | for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) { |
39ac8455 DG |
422 | struct rtas_call *call = &rtas_table[i]; |
423 | ||
d36b66f7 | 424 | if (!call->name) { |
39ac8455 DG |
425 | continue; |
426 | } | |
427 | ||
3f5dabce | 428 | _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE)); |
39ac8455 | 429 | } |
39ac8455 | 430 | } |
821303f5 | 431 | |
ce2918cb | 432 | void spapr_load_rtas(SpaprMachineState *spapr, void *fdt, hwaddr addr) |
2cac78c1 DG |
433 | { |
434 | int rtas_node; | |
435 | int ret; | |
436 | ||
437 | /* Copy RTAS blob into guest RAM */ | |
438 | cpu_physical_memory_write(addr, spapr->rtas_blob, spapr->rtas_size); | |
439 | ||
440 | ret = fdt_add_mem_rsv(fdt, addr, spapr->rtas_size); | |
441 | if (ret < 0) { | |
442 | error_report("Couldn't add RTAS reserve entry: %s", | |
443 | fdt_strerror(ret)); | |
444 | exit(1); | |
445 | } | |
446 | ||
447 | /* Update the device tree with the blob's location */ | |
448 | rtas_node = fdt_path_offset(fdt, "/rtas"); | |
449 | assert(rtas_node >= 0); | |
450 | ||
451 | ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-base", addr); | |
452 | if (ret < 0) { | |
453 | error_report("Couldn't add linux,rtas-base property: %s", | |
454 | fdt_strerror(ret)); | |
455 | exit(1); | |
456 | } | |
457 | ||
458 | ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-entry", addr); | |
459 | if (ret < 0) { | |
460 | error_report("Couldn't add linux,rtas-entry property: %s", | |
461 | fdt_strerror(ret)); | |
462 | exit(1); | |
463 | } | |
464 | ||
465 | ret = fdt_setprop_cell(fdt, rtas_node, "rtas-size", spapr->rtas_size); | |
466 | if (ret < 0) { | |
467 | error_report("Couldn't add rtas-size property: %s", | |
468 | fdt_strerror(ret)); | |
469 | exit(1); | |
470 | } | |
471 | } | |
472 | ||
83f7d43a | 473 | static void core_rtas_register_types(void) |
821303f5 | 474 | { |
3a3b8502 AK |
475 | spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character", |
476 | rtas_display_character); | |
3a3b8502 AK |
477 | spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off); |
478 | spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot", | |
479 | rtas_system_reboot); | |
480 | spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state", | |
a9f8ad8f | 481 | rtas_query_cpu_stopped_state); |
3a3b8502 AK |
482 | spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu); |
483 | spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self); | |
484 | spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER, | |
485 | "ibm,get-system-parameter", | |
3ada6b11 | 486 | rtas_ibm_get_system_parameter); |
3a3b8502 AK |
487 | spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER, |
488 | "ibm,set-system-parameter", | |
3ada6b11 | 489 | rtas_ibm_set_system_parameter); |
2e14072f ND |
490 | spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term", |
491 | rtas_ibm_os_term); | |
094d2058 NF |
492 | spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level", |
493 | rtas_set_power_level); | |
494 | spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level", | |
495 | rtas_get_power_level); | |
821303f5 | 496 | } |
83f7d43a AF |
497 | |
498 | type_init(core_rtas_register_types) |