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39ac8455
DG
1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * Hypercall based emulated RTAS
5 *
6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
0d75590d 27#include "qemu/osdep.h"
39ac8455 28#include "cpu.h"
03dd024f 29#include "qemu/log.h"
ce9863b7 30#include "qemu/error-report.h"
9c17d615 31#include "sysemu/sysemu.h"
39ac8455 32#include "hw/qdev.h"
9c17d615 33#include "sysemu/device_tree.h"
db4ef288 34#include "sysemu/cpus.h"
cf116ad4 35#include "sysemu/hw_accel.h"
39ac8455 36
0d09e41a
PB
37#include "hw/ppc/spapr.h"
38#include "hw/ppc/spapr_vio.h"
eeddd59f 39#include "hw/ppc/spapr_rtas.h"
84369f63 40#include "hw/ppc/spapr_cpu_core.h"
af81cf32 41#include "hw/ppc/ppc.h"
e3943228 42#include "hw/boards.h"
39ac8455
DG
43
44#include <libfdt.h>
8c8639df 45#include "hw/ppc/spapr_drc.h"
f348b6d1 46#include "qemu/cutils.h"
028ec3ce 47#include "trace.h"
3f5dabce 48#include "hw/ppc/fdt.h"
cf116ad4 49#include "target/ppc/mmu-hash64.h"
f00bed95 50#include "target/ppc/mmu-book3s-v3.h"
8c8639df 51
28e02042 52static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr,
821303f5
DG
53 uint32_t token, uint32_t nargs,
54 target_ulong args,
55 uint32_t nret, target_ulong rets)
56{
57 uint8_t c = rtas_ld(args, 0);
5f2e2ba2 58 VIOsPAPRDevice *sdev = vty_lookup(spapr, 0);
821303f5
DG
59
60 if (!sdev) {
a64d325d 61 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
821303f5
DG
62 } else {
63 vty_putchars(sdev, &c, sizeof(c));
a64d325d 64 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5
DG
65 }
66}
67
28e02042 68static void rtas_power_off(PowerPCCPU *cpu, sPAPRMachineState *spapr,
821303f5
DG
69 uint32_t token, uint32_t nargs, target_ulong args,
70 uint32_t nret, target_ulong rets)
71{
72 if (nargs != 2 || nret != 1) {
a64d325d 73 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
821303f5
DG
74 return;
75 }
cf83f140 76 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
8a9c1b77 77 cpu_stop_current();
a64d325d 78 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5
DG
79}
80
28e02042 81static void rtas_system_reboot(PowerPCCPU *cpu, sPAPRMachineState *spapr,
c821a43c
DG
82 uint32_t token, uint32_t nargs,
83 target_ulong args,
84 uint32_t nret, target_ulong rets)
85{
86 if (nargs != 0 || nret != 1) {
a64d325d 87 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
c821a43c
DG
88 return;
89 }
cf83f140 90 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
a64d325d 91 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
c821a43c
DG
92}
93
210b580b 94static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
28e02042 95 sPAPRMachineState *spapr,
a9f8ad8f
DG
96 uint32_t token, uint32_t nargs,
97 target_ulong args,
98 uint32_t nret, target_ulong rets)
99{
100 target_ulong id;
0f20ba62 101 PowerPCCPU *cpu;
a9f8ad8f
DG
102
103 if (nargs != 1 || nret != 2) {
a64d325d 104 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
105 return;
106 }
107
108 id = rtas_ld(args, 0);
2e886fb3 109 cpu = spapr_find_cpu(id);
05318a85 110 if (cpu != NULL) {
0f20ba62 111 if (CPU(cpu)->halted) {
a9f8ad8f
DG
112 rtas_st(rets, 1, 0);
113 } else {
114 rtas_st(rets, 1, 2);
115 }
116
a64d325d 117 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f
DG
118 return;
119 }
120
121 /* Didn't find a matching cpu */
a64d325d 122 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
123}
124
cf116ad4 125static void rtas_start_cpu(PowerPCCPU *callcpu, sPAPRMachineState *spapr,
a9f8ad8f
DG
126 uint32_t token, uint32_t nargs,
127 target_ulong args,
128 uint32_t nret, target_ulong rets)
129{
130 target_ulong id, start, r3;
cf116ad4
DG
131 PowerPCCPU *newcpu;
132 CPUPPCState *env;
133 PowerPCCPUClass *pcc;
98248918 134 target_ulong lpcr;
a9f8ad8f
DG
135
136 if (nargs != 3 || nret != 1) {
a64d325d 137 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
138 return;
139 }
140
141 id = rtas_ld(args, 0);
142 start = rtas_ld(args, 1);
143 r3 = rtas_ld(args, 2);
144
cf116ad4
DG
145 newcpu = spapr_find_cpu(id);
146 if (!newcpu) {
147 /* Didn't find a matching cpu */
148 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
149 return;
150 }
a9f8ad8f 151
cf116ad4
DG
152 env = &newcpu->env;
153 pcc = POWERPC_CPU_GET_CLASS(newcpu);
a9f8ad8f 154
cf116ad4
DG
155 if (!CPU(newcpu)->halted) {
156 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
157 return;
158 }
048706d9 159
cf116ad4 160 cpu_synchronize_state(CPU(newcpu));
9a94ee5b 161
cf116ad4 162 env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
98248918 163
cf116ad4 164 /* Enable Power-saving mode Exit Cause exceptions for the new CPU */
47a9b551 165 lpcr = env->spr[SPR_LPCR];
98248918
DG
166 if (!pcc->interrupts_big_endian(callcpu)) {
167 lpcr |= LPCR_ILE;
168 }
f00bed95
DG
169 if (env->mmu_model == POWERPC_MMU_3_00) {
170 /*
171 * New cpus are expected to start in the same radix/hash mode
172 * as the existing CPUs
173 */
174 if (ppc64_radix_guest(callcpu)) {
175 lpcr |= LPCR_UPRT | LPCR_GTSE;
176 } else {
177 lpcr &= ~(LPCR_UPRT | LPCR_GTSE);
178 }
179 }
98248918
DG
180 ppc_store_lpcr(newcpu, lpcr);
181
182 /*
183 * Set the timebase offset of the new CPU to that of the invoking
184 * CPU. This helps hotplugged CPU to have the correct timebase
185 * offset.
186 */
187 newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
9a94ee5b 188
84369f63 189 spapr_cpu_set_entry_state(newcpu, start, r3);
a9f8ad8f 190
cf116ad4 191 qemu_cpu_kick(CPU(newcpu));
a9f8ad8f 192
cf116ad4 193 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f
DG
194}
195
28e02042 196static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr,
59760f2d
AK
197 uint32_t token, uint32_t nargs,
198 target_ulong args,
199 uint32_t nret, target_ulong rets)
200{
201 CPUState *cs = CPU(cpu);
202 CPUPPCState *env = &cpu->env;
9a94ee5b 203 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
59760f2d 204
9a94ee5b
CLG
205 /* Disable Power-saving mode Exit Cause exceptions for the CPU.
206 * This could deliver an interrupt on a dying CPU and crash the
207 * guest */
cf116ad4
DG
208 ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
209 cs->halted = 1;
210 qemu_cpu_kick(cs);
59760f2d
AK
211}
212
c920f7b4
DG
213static inline int sysparm_st(target_ulong addr, target_ulong len,
214 const void *val, uint16_t vallen)
215{
216 hwaddr phys = ppc64_phys_to_real(addr);
217
218 if (len < 2) {
219 return RTAS_OUT_SYSPARM_PARAM_ERROR;
220 }
221 stw_be_phys(&address_space_memory, phys, vallen);
222 cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
223 return RTAS_OUT_SUCCESS;
224}
225
3ada6b11 226static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
28e02042 227 sPAPRMachineState *spapr,
3ada6b11
AK
228 uint32_t token, uint32_t nargs,
229 target_ulong args,
230 uint32_t nret, target_ulong rets)
231{
232 target_ulong parameter = rtas_ld(args, 0);
233 target_ulong buffer = rtas_ld(args, 1);
234 target_ulong length = rtas_ld(args, 2);
c920f7b4 235 target_ulong ret;
3ada6b11
AK
236
237 switch (parameter) {
3b50d897 238 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
e3943228
SB
239 char *param_val = g_strdup_printf("MaxEntCap=%d,"
240 "DesMem=%llu,"
241 "DesProcs=%d,"
242 "MaxPlatProcs=%d",
243 max_cpus,
244 current_machine->ram_size / M_BYTE,
245 smp_cpus,
246 max_cpus);
c920f7b4 247 ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
3b50d897
S
248 g_free(param_val);
249 break;
250 }
3052d951
S
251 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
252 uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
253
c920f7b4 254 ret = sysparm_st(buffer, length, &param_val, sizeof(param_val));
3ada6b11
AK
255 break;
256 }
b907d7b0 257 case RTAS_SYSPARM_UUID:
9c5ce8db
FZ
258 ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
259 (qemu_uuid_set ? 16 : 0));
b907d7b0 260 break;
3052d951
S
261 default:
262 ret = RTAS_OUT_NOT_SUPPORTED;
263 }
3ada6b11
AK
264
265 rtas_st(rets, 0, ret);
266}
267
268static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
28e02042 269 sPAPRMachineState *spapr,
3ada6b11
AK
270 uint32_t token, uint32_t nargs,
271 target_ulong args,
272 uint32_t nret, target_ulong rets)
273{
274 target_ulong parameter = rtas_ld(args, 0);
275 target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
276
277 switch (parameter) {
3b50d897 278 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
3052d951 279 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
b907d7b0 280 case RTAS_SYSPARM_UUID:
3ada6b11
AK
281 ret = RTAS_OUT_NOT_AUTHORIZED;
282 break;
283 }
284
285 rtas_st(rets, 0, ret);
286}
287
2e14072f 288static void rtas_ibm_os_term(PowerPCCPU *cpu,
28e02042 289 sPAPRMachineState *spapr,
2e14072f
ND
290 uint32_t token, uint32_t nargs,
291 target_ulong args,
292 uint32_t nret, target_ulong rets)
293{
2c553477 294 qemu_system_guest_panicked(NULL);
2e14072f 295
2c553477 296 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
2e14072f
ND
297}
298
28e02042 299static void rtas_set_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
094d2058
NF
300 uint32_t token, uint32_t nargs,
301 target_ulong args, uint32_t nret,
302 target_ulong rets)
303{
304 int32_t power_domain;
305
306 if (nargs != 2 || nret != 2) {
307 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
308 return;
309 }
310
311 /* we currently only use a single, "live insert" powerdomain for
312 * hotplugged/dlpar'd resources, so the power is always live/full (100)
313 */
314 power_domain = rtas_ld(args, 0);
315 if (power_domain != -1) {
316 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
317 return;
318 }
319
320 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
321 rtas_st(rets, 1, 100);
322}
323
28e02042 324static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
094d2058
NF
325 uint32_t token, uint32_t nargs,
326 target_ulong args, uint32_t nret,
327 target_ulong rets)
328{
329 int32_t power_domain;
330
331 if (nargs != 1 || nret != 2) {
332 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
333 return;
334 }
335
336 /* we currently only use a single, "live insert" powerdomain for
337 * hotplugged/dlpar'd resources, so the power is always live/full (100)
338 */
339 power_domain = rtas_ld(args, 0);
340 if (power_domain != -1) {
341 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
342 return;
343 }
344
345 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
346 rtas_st(rets, 1, 100);
347}
348
39ac8455
DG
349static struct rtas_call {
350 const char *name;
351 spapr_rtas_fn fn;
3a3b8502 352} rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
39ac8455 353
28e02042 354target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPRMachineState *spapr,
39ac8455
DG
355 uint32_t token, uint32_t nargs, target_ulong args,
356 uint32_t nret, target_ulong rets)
357{
3a3b8502
AK
358 if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
359 struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
39ac8455
DG
360
361 if (call->fn) {
210b580b 362 call->fn(cpu, spapr, token, nargs, args, nret, rets);
39ac8455
DG
363 return H_SUCCESS;
364 }
365 }
366
821303f5
DG
367 /* HACK: Some Linux early debug code uses RTAS display-character,
368 * but assumes the token value is 0xa (which it is on some real
369 * machines) without looking it up in the device tree. This
370 * special case makes this work */
371 if (token == 0xa) {
210b580b 372 rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
821303f5
DG
373 return H_SUCCESS;
374 }
375
39ac8455 376 hcall_dprintf("Unknown RTAS token 0x%x\n", token);
a64d325d 377 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
39ac8455
DG
378 return H_PARAMETER;
379}
380
eeddd59f
LV
381uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
382 uint32_t nret, uint64_t rets)
383{
384 int token;
385
386 for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
387 if (strcmp(cmd, rtas_table[token].name) == 0) {
388 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
389 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
390
391 rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
392 nargs, args, nret, rets);
393 return H_SUCCESS;
394 }
395 }
396 return H_PARAMETER;
397}
398
3a3b8502 399void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
39ac8455 400{
adf9ac50 401 assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
c89d5299 402
3a3b8502 403 token -= RTAS_TOKEN_BASE;
adf9ac50
DG
404
405 assert(!rtas_table[token].name);
39ac8455 406
3a3b8502
AK
407 rtas_table[token].name = name;
408 rtas_table[token].fn = fn;
39ac8455
DG
409}
410
3f5dabce 411void spapr_dt_rtas_tokens(void *fdt, int rtas)
39ac8455 412{
39ac8455
DG
413 int i;
414
3a3b8502 415 for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
39ac8455
DG
416 struct rtas_call *call = &rtas_table[i];
417
d36b66f7 418 if (!call->name) {
39ac8455
DG
419 continue;
420 }
421
3f5dabce 422 _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
39ac8455 423 }
39ac8455 424}
821303f5 425
2cac78c1
DG
426void spapr_load_rtas(sPAPRMachineState *spapr, void *fdt, hwaddr addr)
427{
428 int rtas_node;
429 int ret;
430
431 /* Copy RTAS blob into guest RAM */
432 cpu_physical_memory_write(addr, spapr->rtas_blob, spapr->rtas_size);
433
434 ret = fdt_add_mem_rsv(fdt, addr, spapr->rtas_size);
435 if (ret < 0) {
436 error_report("Couldn't add RTAS reserve entry: %s",
437 fdt_strerror(ret));
438 exit(1);
439 }
440
441 /* Update the device tree with the blob's location */
442 rtas_node = fdt_path_offset(fdt, "/rtas");
443 assert(rtas_node >= 0);
444
445 ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-base", addr);
446 if (ret < 0) {
447 error_report("Couldn't add linux,rtas-base property: %s",
448 fdt_strerror(ret));
449 exit(1);
450 }
451
452 ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-entry", addr);
453 if (ret < 0) {
454 error_report("Couldn't add linux,rtas-entry property: %s",
455 fdt_strerror(ret));
456 exit(1);
457 }
458
459 ret = fdt_setprop_cell(fdt, rtas_node, "rtas-size", spapr->rtas_size);
460 if (ret < 0) {
461 error_report("Couldn't add rtas-size property: %s",
462 fdt_strerror(ret));
463 exit(1);
464 }
465}
466
83f7d43a 467static void core_rtas_register_types(void)
821303f5 468{
3a3b8502
AK
469 spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
470 rtas_display_character);
3a3b8502
AK
471 spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
472 spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
473 rtas_system_reboot);
474 spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
a9f8ad8f 475 rtas_query_cpu_stopped_state);
3a3b8502
AK
476 spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
477 spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
478 spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
479 "ibm,get-system-parameter",
3ada6b11 480 rtas_ibm_get_system_parameter);
3a3b8502
AK
481 spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
482 "ibm,set-system-parameter",
3ada6b11 483 rtas_ibm_set_system_parameter);
2e14072f
ND
484 spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
485 rtas_ibm_os_term);
094d2058
NF
486 spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
487 rtas_set_power_level);
488 spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
489 rtas_get_power_level);
821303f5 490}
83f7d43a
AF
491
492type_init(core_rtas_register_types)