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Commit | Line | Data |
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39ac8455 DG |
1 | /* |
2 | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator | |
3 | * | |
4 | * Hypercall based emulated RTAS | |
5 | * | |
6 | * Copyright (c) 2010-2011 David Gibson, IBM Corporation. | |
7 | * | |
8 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
9 | * of this software and associated documentation files (the "Software"), to deal | |
10 | * in the Software without restriction, including without limitation the rights | |
11 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
12 | * copies of the Software, and to permit persons to whom the Software is | |
13 | * furnished to do so, subject to the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice shall be included in | |
16 | * all copies or substantial portions of the Software. | |
17 | * | |
18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
19 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
20 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
21 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
22 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
23 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
24 | * THE SOFTWARE. | |
25 | * | |
26 | */ | |
54d31236 | 27 | |
0d75590d | 28 | #include "qemu/osdep.h" |
39ac8455 | 29 | #include "cpu.h" |
03dd024f | 30 | #include "qemu/log.h" |
ce9863b7 | 31 | #include "qemu/error-report.h" |
9c17d615 | 32 | #include "sysemu/sysemu.h" |
9c17d615 | 33 | #include "sysemu/device_tree.h" |
db4ef288 | 34 | #include "sysemu/cpus.h" |
cf116ad4 | 35 | #include "sysemu/hw_accel.h" |
54d31236 | 36 | #include "sysemu/runstate.h" |
a84f7179 | 37 | #include "kvm_ppc.h" |
39ac8455 | 38 | |
0d09e41a PB |
39 | #include "hw/ppc/spapr.h" |
40 | #include "hw/ppc/spapr_vio.h" | |
eeddd59f | 41 | #include "hw/ppc/spapr_rtas.h" |
84369f63 | 42 | #include "hw/ppc/spapr_cpu_core.h" |
af81cf32 | 43 | #include "hw/ppc/ppc.h" |
e3943228 | 44 | #include "hw/boards.h" |
39ac8455 DG |
45 | |
46 | #include <libfdt.h> | |
8c8639df | 47 | #include "hw/ppc/spapr_drc.h" |
f348b6d1 | 48 | #include "qemu/cutils.h" |
028ec3ce | 49 | #include "trace.h" |
3f5dabce | 50 | #include "hw/ppc/fdt.h" |
cf116ad4 | 51 | #include "target/ppc/mmu-hash64.h" |
f00bed95 | 52 | #include "target/ppc/mmu-book3s-v3.h" |
2500fb42 | 53 | #include "migration/blocker.h" |
8c8639df | 54 | |
ce2918cb | 55 | static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr, |
821303f5 DG |
56 | uint32_t token, uint32_t nargs, |
57 | target_ulong args, | |
58 | uint32_t nret, target_ulong rets) | |
59 | { | |
60 | uint8_t c = rtas_ld(args, 0); | |
ce2918cb | 61 | SpaprVioDevice *sdev = vty_lookup(spapr, 0); |
821303f5 DG |
62 | |
63 | if (!sdev) { | |
a64d325d | 64 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); |
821303f5 DG |
65 | } else { |
66 | vty_putchars(sdev, &c, sizeof(c)); | |
a64d325d | 67 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
68 | } |
69 | } | |
70 | ||
ce2918cb | 71 | static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr, |
821303f5 DG |
72 | uint32_t token, uint32_t nargs, target_ulong args, |
73 | uint32_t nret, target_ulong rets) | |
74 | { | |
75 | if (nargs != 2 || nret != 1) { | |
a64d325d | 76 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
821303f5 DG |
77 | return; |
78 | } | |
cf83f140 | 79 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
8a9c1b77 | 80 | cpu_stop_current(); |
a64d325d | 81 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
821303f5 DG |
82 | } |
83 | ||
ce2918cb | 84 | static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr, |
c821a43c DG |
85 | uint32_t token, uint32_t nargs, |
86 | target_ulong args, | |
87 | uint32_t nret, target_ulong rets) | |
88 | { | |
89 | if (nargs != 0 || nret != 1) { | |
a64d325d | 90 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
c821a43c DG |
91 | return; |
92 | } | |
cf83f140 | 93 | qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); |
a64d325d | 94 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
c821a43c DG |
95 | } |
96 | ||
210b580b | 97 | static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_, |
ce2918cb | 98 | SpaprMachineState *spapr, |
a9f8ad8f DG |
99 | uint32_t token, uint32_t nargs, |
100 | target_ulong args, | |
101 | uint32_t nret, target_ulong rets) | |
102 | { | |
103 | target_ulong id; | |
0f20ba62 | 104 | PowerPCCPU *cpu; |
a9f8ad8f DG |
105 | |
106 | if (nargs != 1 || nret != 2) { | |
a64d325d | 107 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
108 | return; |
109 | } | |
110 | ||
111 | id = rtas_ld(args, 0); | |
2e886fb3 | 112 | cpu = spapr_find_cpu(id); |
05318a85 | 113 | if (cpu != NULL) { |
0f20ba62 | 114 | if (CPU(cpu)->halted) { |
a9f8ad8f DG |
115 | rtas_st(rets, 1, 0); |
116 | } else { | |
117 | rtas_st(rets, 1, 2); | |
118 | } | |
119 | ||
a64d325d | 120 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
121 | return; |
122 | } | |
123 | ||
124 | /* Didn't find a matching cpu */ | |
a64d325d | 125 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
126 | } |
127 | ||
ce2918cb | 128 | static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr, |
a9f8ad8f DG |
129 | uint32_t token, uint32_t nargs, |
130 | target_ulong args, | |
131 | uint32_t nret, target_ulong rets) | |
132 | { | |
133 | target_ulong id, start, r3; | |
cf116ad4 DG |
134 | PowerPCCPU *newcpu; |
135 | CPUPPCState *env; | |
136 | PowerPCCPUClass *pcc; | |
98248918 | 137 | target_ulong lpcr; |
a9f8ad8f DG |
138 | |
139 | if (nargs != 3 || nret != 1) { | |
a64d325d | 140 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
a9f8ad8f DG |
141 | return; |
142 | } | |
143 | ||
144 | id = rtas_ld(args, 0); | |
145 | start = rtas_ld(args, 1); | |
146 | r3 = rtas_ld(args, 2); | |
147 | ||
cf116ad4 DG |
148 | newcpu = spapr_find_cpu(id); |
149 | if (!newcpu) { | |
150 | /* Didn't find a matching cpu */ | |
151 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
152 | return; | |
153 | } | |
a9f8ad8f | 154 | |
cf116ad4 DG |
155 | env = &newcpu->env; |
156 | pcc = POWERPC_CPU_GET_CLASS(newcpu); | |
a9f8ad8f | 157 | |
cf116ad4 DG |
158 | if (!CPU(newcpu)->halted) { |
159 | rtas_st(rets, 0, RTAS_OUT_HW_ERROR); | |
160 | return; | |
161 | } | |
048706d9 | 162 | |
cf116ad4 | 163 | cpu_synchronize_state(CPU(newcpu)); |
9a94ee5b | 164 | |
cf116ad4 | 165 | env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME); |
98248918 | 166 | |
cf116ad4 | 167 | /* Enable Power-saving mode Exit Cause exceptions for the new CPU */ |
47a9b551 | 168 | lpcr = env->spr[SPR_LPCR]; |
98248918 DG |
169 | if (!pcc->interrupts_big_endian(callcpu)) { |
170 | lpcr |= LPCR_ILE; | |
171 | } | |
f00bed95 DG |
172 | if (env->mmu_model == POWERPC_MMU_3_00) { |
173 | /* | |
174 | * New cpus are expected to start in the same radix/hash mode | |
175 | * as the existing CPUs | |
176 | */ | |
00fd075e BH |
177 | if (ppc64_v3_radix(callcpu)) { |
178 | lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; | |
f00bed95 | 179 | } else { |
00fd075e | 180 | lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR); |
f00bed95 | 181 | } |
70de0967 | 182 | env->spr[SPR_PSSCR] &= ~PSSCR_EC; |
f00bed95 | 183 | } |
98248918 DG |
184 | ppc_store_lpcr(newcpu, lpcr); |
185 | ||
186 | /* | |
187 | * Set the timebase offset of the new CPU to that of the invoking | |
188 | * CPU. This helps hotplugged CPU to have the correct timebase | |
189 | * offset. | |
190 | */ | |
191 | newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset; | |
9a94ee5b | 192 | |
395a20d3 | 193 | spapr_cpu_set_entry_state(newcpu, start, 0, r3, 0); |
a9f8ad8f | 194 | |
cf116ad4 | 195 | qemu_cpu_kick(CPU(newcpu)); |
a9f8ad8f | 196 | |
cf116ad4 | 197 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
a9f8ad8f DG |
198 | } |
199 | ||
ce2918cb | 200 | static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr, |
59760f2d AK |
201 | uint32_t token, uint32_t nargs, |
202 | target_ulong args, | |
203 | uint32_t nret, target_ulong rets) | |
204 | { | |
205 | CPUState *cs = CPU(cpu); | |
206 | CPUPPCState *env = &cpu->env; | |
9a94ee5b | 207 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
59760f2d | 208 | |
9a94ee5b CLG |
209 | /* Disable Power-saving mode Exit Cause exceptions for the CPU. |
210 | * This could deliver an interrupt on a dying CPU and crash the | |
70de0967 SJS |
211 | * guest. |
212 | * For the same reason, set PSSCR_EC. | |
213 | */ | |
cf116ad4 | 214 | ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm); |
70de0967 | 215 | env->spr[SPR_PSSCR] |= PSSCR_EC; |
cf116ad4 | 216 | cs->halted = 1; |
a84f7179 | 217 | kvmppc_set_reg_ppc_online(cpu, 0); |
cf116ad4 | 218 | qemu_cpu_kick(cs); |
59760f2d AK |
219 | } |
220 | ||
93eac7b8 NP |
221 | static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr, |
222 | uint32_t token, uint32_t nargs, | |
223 | target_ulong args, | |
224 | uint32_t nret, target_ulong rets) | |
225 | { | |
226 | CPUState *cs; | |
227 | ||
228 | if (nargs != 0 || nret != 1) { | |
229 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
230 | return; | |
231 | } | |
232 | ||
233 | CPU_FOREACH(cs) { | |
234 | PowerPCCPU *c = POWERPC_CPU(cs); | |
235 | CPUPPCState *e = &c->env; | |
236 | if (c == cpu) { | |
237 | continue; | |
238 | } | |
239 | ||
240 | /* See h_join */ | |
241 | if (!cs->halted || (e->msr & (1ULL << MSR_EE))) { | |
242 | rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE); | |
243 | return; | |
244 | } | |
245 | } | |
246 | ||
247 | qemu_system_suspend_request(); | |
248 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
249 | } | |
250 | ||
c920f7b4 DG |
251 | static inline int sysparm_st(target_ulong addr, target_ulong len, |
252 | const void *val, uint16_t vallen) | |
253 | { | |
254 | hwaddr phys = ppc64_phys_to_real(addr); | |
255 | ||
256 | if (len < 2) { | |
257 | return RTAS_OUT_SYSPARM_PARAM_ERROR; | |
258 | } | |
259 | stw_be_phys(&address_space_memory, phys, vallen); | |
260 | cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen)); | |
261 | return RTAS_OUT_SUCCESS; | |
262 | } | |
263 | ||
3ada6b11 | 264 | static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu, |
ce2918cb | 265 | SpaprMachineState *spapr, |
3ada6b11 AK |
266 | uint32_t token, uint32_t nargs, |
267 | target_ulong args, | |
268 | uint32_t nret, target_ulong rets) | |
269 | { | |
289af4ac | 270 | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
500c2cc5 | 271 | MachineState *ms = MACHINE(spapr); |
3ada6b11 AK |
272 | target_ulong parameter = rtas_ld(args, 0); |
273 | target_ulong buffer = rtas_ld(args, 1); | |
274 | target_ulong length = rtas_ld(args, 2); | |
c920f7b4 | 275 | target_ulong ret; |
3ada6b11 AK |
276 | |
277 | switch (parameter) { | |
3b50d897 | 278 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: { |
e3943228 | 279 | char *param_val = g_strdup_printf("MaxEntCap=%d," |
ab3dd749 | 280 | "DesMem=%" PRIu64 "," |
e3943228 SB |
281 | "DesProcs=%d," |
282 | "MaxPlatProcs=%d", | |
dd32e948 | 283 | ms->smp.max_cpus, |
da2c8f4d | 284 | ms->ram_size / MiB, |
fe6b6346 | 285 | ms->smp.cpus, |
dd32e948 | 286 | ms->smp.max_cpus); |
289af4ac SJS |
287 | if (pcc->n_host_threads > 0) { |
288 | char *hostthr_val, *old = param_val; | |
289 | ||
290 | /* | |
291 | * Add HostThrs property. This property is not present in PAPR but | |
292 | * is expected by some guests to communicate the number of physical | |
293 | * host threads per core on the system so that they can scale | |
294 | * information which varies based on the thread configuration. | |
295 | */ | |
296 | hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads); | |
297 | param_val = g_strconcat(param_val, hostthr_val, NULL); | |
298 | g_free(hostthr_val); | |
299 | g_free(old); | |
300 | } | |
c920f7b4 | 301 | ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1); |
3b50d897 S |
302 | g_free(param_val); |
303 | break; | |
304 | } | |
3052d951 S |
305 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: { |
306 | uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED; | |
307 | ||
c920f7b4 | 308 | ret = sysparm_st(buffer, length, ¶m_val, sizeof(param_val)); |
3ada6b11 AK |
309 | break; |
310 | } | |
b907d7b0 | 311 | case RTAS_SYSPARM_UUID: |
9c5ce8db FZ |
312 | ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid, |
313 | (qemu_uuid_set ? 16 : 0)); | |
b907d7b0 | 314 | break; |
3052d951 S |
315 | default: |
316 | ret = RTAS_OUT_NOT_SUPPORTED; | |
317 | } | |
3ada6b11 AK |
318 | |
319 | rtas_st(rets, 0, ret); | |
320 | } | |
321 | ||
322 | static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu, | |
ce2918cb | 323 | SpaprMachineState *spapr, |
3ada6b11 AK |
324 | uint32_t token, uint32_t nargs, |
325 | target_ulong args, | |
326 | uint32_t nret, target_ulong rets) | |
327 | { | |
328 | target_ulong parameter = rtas_ld(args, 0); | |
329 | target_ulong ret = RTAS_OUT_NOT_SUPPORTED; | |
330 | ||
331 | switch (parameter) { | |
3b50d897 | 332 | case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: |
3052d951 | 333 | case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: |
b907d7b0 | 334 | case RTAS_SYSPARM_UUID: |
3ada6b11 AK |
335 | ret = RTAS_OUT_NOT_AUTHORIZED; |
336 | break; | |
337 | } | |
338 | ||
339 | rtas_st(rets, 0, ret); | |
340 | } | |
341 | ||
2e14072f | 342 | static void rtas_ibm_os_term(PowerPCCPU *cpu, |
ce2918cb | 343 | SpaprMachineState *spapr, |
2e14072f ND |
344 | uint32_t token, uint32_t nargs, |
345 | target_ulong args, | |
346 | uint32_t nret, target_ulong rets) | |
347 | { | |
a4c3791a AK |
348 | target_ulong msgaddr = rtas_ld(args, 0); |
349 | char msg[512]; | |
350 | ||
351 | cpu_physical_memory_read(msgaddr, msg, sizeof(msg) - 1); | |
352 | msg[sizeof(msg) - 1] = 0; | |
353 | ||
354 | error_report("OS terminated: %s", msg); | |
2c553477 | 355 | qemu_system_guest_panicked(NULL); |
2e14072f | 356 | |
2c553477 | 357 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
2e14072f ND |
358 | } |
359 | ||
ce2918cb | 360 | static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, |
094d2058 NF |
361 | uint32_t token, uint32_t nargs, |
362 | target_ulong args, uint32_t nret, | |
363 | target_ulong rets) | |
364 | { | |
365 | int32_t power_domain; | |
366 | ||
367 | if (nargs != 2 || nret != 2) { | |
368 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
369 | return; | |
370 | } | |
371 | ||
372 | /* we currently only use a single, "live insert" powerdomain for | |
373 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
374 | */ | |
375 | power_domain = rtas_ld(args, 0); | |
376 | if (power_domain != -1) { | |
377 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
378 | return; | |
379 | } | |
380 | ||
381 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
382 | rtas_st(rets, 1, 100); | |
383 | } | |
384 | ||
ce2918cb | 385 | static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr, |
094d2058 NF |
386 | uint32_t token, uint32_t nargs, |
387 | target_ulong args, uint32_t nret, | |
388 | target_ulong rets) | |
389 | { | |
390 | int32_t power_domain; | |
391 | ||
392 | if (nargs != 1 || nret != 2) { | |
393 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
394 | return; | |
395 | } | |
396 | ||
397 | /* we currently only use a single, "live insert" powerdomain for | |
398 | * hotplugged/dlpar'd resources, so the power is always live/full (100) | |
399 | */ | |
400 | power_domain = rtas_ld(args, 0); | |
401 | if (power_domain != -1) { | |
402 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
403 | return; | |
404 | } | |
405 | ||
406 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
407 | rtas_st(rets, 1, 100); | |
408 | } | |
409 | ||
f03496bc AP |
410 | static void rtas_ibm_nmi_register(PowerPCCPU *cpu, |
411 | SpaprMachineState *spapr, | |
412 | uint32_t token, uint32_t nargs, | |
413 | target_ulong args, | |
414 | uint32_t nret, target_ulong rets) | |
415 | { | |
416 | hwaddr rtas_addr; | |
edfdbf9c | 417 | target_ulong sreset_addr, mce_addr; |
f03496bc | 418 | |
8af7e1fe | 419 | if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) { |
f03496bc AP |
420 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); |
421 | return; | |
422 | } | |
423 | ||
424 | rtas_addr = spapr_get_rtas_addr(); | |
425 | if (!rtas_addr) { | |
426 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
427 | return; | |
428 | } | |
429 | ||
edfdbf9c NP |
430 | sreset_addr = rtas_ld(args, 0); |
431 | mce_addr = rtas_ld(args, 1); | |
432 | ||
433 | /* PAPR requires these are in the first 32M of memory and within RMA */ | |
434 | if (sreset_addr >= 32 * MiB || sreset_addr >= spapr->rma_size || | |
435 | mce_addr >= 32 * MiB || mce_addr >= spapr->rma_size) { | |
436 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
437 | return; | |
438 | } | |
439 | ||
ec010c00 NP |
440 | if (kvm_enabled()) { |
441 | if (kvmppc_set_fwnmi() < 0) { | |
442 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); | |
443 | return; | |
444 | } | |
445 | } | |
446 | ||
edfdbf9c NP |
447 | spapr->fwnmi_system_reset_addr = sreset_addr; |
448 | spapr->fwnmi_machine_check_addr = mce_addr; | |
8af7e1fe | 449 | |
f03496bc AP |
450 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
451 | } | |
452 | ||
453 | static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu, | |
454 | SpaprMachineState *spapr, | |
455 | uint32_t token, uint32_t nargs, | |
456 | target_ulong args, | |
457 | uint32_t nret, target_ulong rets) | |
458 | { | |
8af7e1fe | 459 | if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI) == SPAPR_CAP_OFF) { |
f03496bc AP |
460 | rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED); |
461 | return; | |
462 | } | |
463 | ||
8af7e1fe | 464 | if (spapr->fwnmi_machine_check_addr == -1) { |
b90b9ecb NP |
465 | qemu_log_mask(LOG_GUEST_ERROR, |
466 | "FWNMI: ibm,nmi-interlock RTAS called with FWNMI not registered.\n"); | |
467 | ||
f03496bc AP |
468 | /* NMI register not called */ |
469 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); | |
470 | return; | |
471 | } | |
472 | ||
8af7e1fe | 473 | if (spapr->fwnmi_machine_check_interlock != cpu->vcpu_id) { |
75aa8038 NP |
474 | /* |
475 | * The vCPU that hit the NMI should invoke "ibm,nmi-interlock" | |
476 | * This should be PARAM_ERROR, but Linux calls "ibm,nmi-interlock" | |
477 | * for system reset interrupts, despite them not being interlocked. | |
478 | * PowerVM silently ignores this and returns success here. Returning | |
479 | * failure causes Linux to print the error "FWNMI: nmi-interlock | |
480 | * failed: -3", although no other apparent ill effects, this is a | |
481 | * regression for the user when enabling FWNMI. So for now, match | |
482 | * PowerVM. When most Linux clients are fixed, this could be | |
483 | * changed. | |
484 | */ | |
485 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); | |
f03496bc AP |
486 | return; |
487 | } | |
488 | ||
489 | /* | |
490 | * vCPU issuing "ibm,nmi-interlock" is done with NMI handling, | |
8af7e1fe | 491 | * hence unset fwnmi_machine_check_interlock. |
f03496bc | 492 | */ |
8af7e1fe NP |
493 | spapr->fwnmi_machine_check_interlock = -1; |
494 | qemu_cond_signal(&spapr->fwnmi_machine_check_interlock_cond); | |
f03496bc | 495 | rtas_st(rets, 0, RTAS_OUT_SUCCESS); |
2500fb42 | 496 | migrate_del_blocker(spapr->fwnmi_migration_blocker); |
f03496bc AP |
497 | } |
498 | ||
39ac8455 DG |
499 | static struct rtas_call { |
500 | const char *name; | |
501 | spapr_rtas_fn fn; | |
3a3b8502 | 502 | } rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE]; |
39ac8455 | 503 | |
ce2918cb | 504 | target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr, |
39ac8455 DG |
505 | uint32_t token, uint32_t nargs, target_ulong args, |
506 | uint32_t nret, target_ulong rets) | |
507 | { | |
3a3b8502 AK |
508 | if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) { |
509 | struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE); | |
39ac8455 DG |
510 | |
511 | if (call->fn) { | |
210b580b | 512 | call->fn(cpu, spapr, token, nargs, args, nret, rets); |
39ac8455 DG |
513 | return H_SUCCESS; |
514 | } | |
515 | } | |
516 | ||
821303f5 DG |
517 | /* HACK: Some Linux early debug code uses RTAS display-character, |
518 | * but assumes the token value is 0xa (which it is on some real | |
519 | * machines) without looking it up in the device tree. This | |
520 | * special case makes this work */ | |
521 | if (token == 0xa) { | |
210b580b | 522 | rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets); |
821303f5 DG |
523 | return H_SUCCESS; |
524 | } | |
525 | ||
39ac8455 | 526 | hcall_dprintf("Unknown RTAS token 0x%x\n", token); |
a64d325d | 527 | rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); |
39ac8455 DG |
528 | return H_PARAMETER; |
529 | } | |
530 | ||
eeddd59f LV |
531 | uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args, |
532 | uint32_t nret, uint64_t rets) | |
533 | { | |
534 | int token; | |
535 | ||
536 | for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) { | |
537 | if (strcmp(cmd, rtas_table[token].name) == 0) { | |
ce2918cb | 538 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); |
eeddd59f LV |
539 | PowerPCCPU *cpu = POWERPC_CPU(first_cpu); |
540 | ||
541 | rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE, | |
542 | nargs, args, nret, rets); | |
543 | return H_SUCCESS; | |
544 | } | |
545 | } | |
546 | return H_PARAMETER; | |
547 | } | |
548 | ||
3a3b8502 | 549 | void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn) |
39ac8455 | 550 | { |
adf9ac50 | 551 | assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)); |
c89d5299 | 552 | |
3a3b8502 | 553 | token -= RTAS_TOKEN_BASE; |
adf9ac50 | 554 | |
64db6c70 | 555 | assert(!name || !rtas_table[token].name); |
39ac8455 | 556 | |
3a3b8502 AK |
557 | rtas_table[token].name = name; |
558 | rtas_table[token].fn = fn; | |
39ac8455 DG |
559 | } |
560 | ||
3f5dabce | 561 | void spapr_dt_rtas_tokens(void *fdt, int rtas) |
39ac8455 | 562 | { |
39ac8455 DG |
563 | int i; |
564 | ||
3a3b8502 | 565 | for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) { |
39ac8455 DG |
566 | struct rtas_call *call = &rtas_table[i]; |
567 | ||
d36b66f7 | 568 | if (!call->name) { |
39ac8455 DG |
569 | continue; |
570 | } | |
571 | ||
3f5dabce | 572 | _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE)); |
39ac8455 | 573 | } |
39ac8455 | 574 | } |
821303f5 | 575 | |
81fe70e4 AP |
576 | hwaddr spapr_get_rtas_addr(void) |
577 | { | |
578 | SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine()); | |
579 | int rtas_node; | |
580 | const fdt32_t *rtas_data; | |
581 | void *fdt = spapr->fdt_blob; | |
582 | ||
583 | /* fetch rtas addr from fdt */ | |
584 | rtas_node = fdt_path_offset(fdt, "/rtas"); | |
585 | if (rtas_node < 0) { | |
586 | return 0; | |
587 | } | |
588 | ||
589 | rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL); | |
590 | if (!rtas_data) { | |
591 | return 0; | |
592 | } | |
593 | ||
594 | /* | |
595 | * We assume that the OS called RTAS instantiate-rtas, but some other | |
596 | * OS might call RTAS instantiate-rtas-64 instead. This fine as of now | |
597 | * as SLOF only supports 32-bit variant. | |
598 | */ | |
599 | return (hwaddr)fdt32_to_cpu(*rtas_data); | |
600 | } | |
601 | ||
83f7d43a | 602 | static void core_rtas_register_types(void) |
821303f5 | 603 | { |
3a3b8502 AK |
604 | spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character", |
605 | rtas_display_character); | |
3a3b8502 AK |
606 | spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off); |
607 | spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot", | |
608 | rtas_system_reboot); | |
609 | spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state", | |
a9f8ad8f | 610 | rtas_query_cpu_stopped_state); |
3a3b8502 AK |
611 | spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu); |
612 | spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self); | |
93eac7b8 NP |
613 | spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me", |
614 | rtas_ibm_suspend_me); | |
3a3b8502 AK |
615 | spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER, |
616 | "ibm,get-system-parameter", | |
3ada6b11 | 617 | rtas_ibm_get_system_parameter); |
3a3b8502 AK |
618 | spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER, |
619 | "ibm,set-system-parameter", | |
3ada6b11 | 620 | rtas_ibm_set_system_parameter); |
2e14072f ND |
621 | spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term", |
622 | rtas_ibm_os_term); | |
094d2058 NF |
623 | spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level", |
624 | rtas_set_power_level); | |
625 | spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level", | |
626 | rtas_get_power_level); | |
f03496bc AP |
627 | spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register", |
628 | rtas_ibm_nmi_register); | |
629 | spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock", | |
630 | rtas_ibm_nmi_interlock); | |
821303f5 | 631 | } |
83f7d43a AF |
632 | |
633 | type_init(core_rtas_register_types) |