[mirror_qemu.git] / hw / ppc / spapr_rtas.c

/*
 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
 *
 * Hypercall based emulated RTAS
 *
 * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 *
 */

#include "qemu/osdep.h"
#include "cpu.h"
#include "qemu/log.h"
#include "qemu/error-report.h"
#include "sysemu/sysemu.h"
#include "sysemu/device_tree.h"
#include "sysemu/cpus.h"
#include "sysemu/hw_accel.h"
#include "sysemu/runstate.h"
#include "kvm_ppc.h"

#include "hw/ppc/spapr.h"
#include "hw/ppc/spapr_vio.h"
#include "hw/ppc/spapr_rtas.h"
#include "hw/ppc/spapr_cpu_core.h"
#include "hw/ppc/ppc.h"
#include "hw/boards.h"

#include <libfdt.h>
#include "hw/ppc/spapr_drc.h"
#include "qemu/cutils.h"
#include "trace.h"
#include "hw/ppc/fdt.h"
#include "target/ppc/mmu-hash64.h"
#include "target/ppc/mmu-book3s-v3.h"

static void rtas_display_character(PowerPCCPU *cpu, SpaprMachineState *spapr,
                                   uint32_t token, uint32_t nargs,
                                   target_ulong args,
                                   uint32_t nret, target_ulong rets)
{
    uint8_t c = rtas_ld(args, 0);
    SpaprVioDevice *sdev = vty_lookup(spapr, 0);

    if (!sdev) {
        rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
    } else {
        vty_putchars(sdev, &c, sizeof(c));
        rtas_st(rets, 0, RTAS_OUT_SUCCESS);
    }
}

static void rtas_power_off(PowerPCCPU *cpu, SpaprMachineState *spapr,
                           uint32_t token, uint32_t nargs, target_ulong args,
                           uint32_t nret, target_ulong rets)
{
    if (nargs != 2 || nret != 1) {
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }
    qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
    cpu_stop_current();
    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}

static void rtas_system_reboot(PowerPCCPU *cpu, SpaprMachineState *spapr,
                               uint32_t token, uint32_t nargs,
                               target_ulong args,
                               uint32_t nret, target_ulong rets)
{
    if (nargs != 0 || nret != 1) {
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }
    qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}

static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
                                         SpaprMachineState *spapr,
                                         uint32_t token, uint32_t nargs,
                                         target_ulong args,
                                         uint32_t nret, target_ulong rets)
{
    target_ulong id;
    PowerPCCPU *cpu;

    if (nargs != 1 || nret != 2) {
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    id = rtas_ld(args, 0);
    cpu = spapr_find_cpu(id);
    if (cpu != NULL) {
        if (CPU(cpu)->halted) {
            rtas_st(rets, 1, 0);
        } else {
            rtas_st(rets, 1, 2);
        }

        rtas_st(rets, 0, RTAS_OUT_SUCCESS);
        return;
    }

    /* Didn't find a matching cpu */
    rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
}

static void rtas_start_cpu(PowerPCCPU *callcpu, SpaprMachineState *spapr,
                           uint32_t token, uint32_t nargs,
                           target_ulong args,
                           uint32_t nret, target_ulong rets)
{
    target_ulong id, start, r3;
    PowerPCCPU *newcpu;
    CPUPPCState *env;
    PowerPCCPUClass *pcc;
    target_ulong lpcr;

    if (nargs != 3 || nret != 1) {
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    id = rtas_ld(args, 0);
    start = rtas_ld(args, 1);
    r3 = rtas_ld(args, 2);

    newcpu = spapr_find_cpu(id);
    if (!newcpu) {
        /* Didn't find a matching cpu */
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    env = &newcpu->env;
    pcc = POWERPC_CPU_GET_CLASS(newcpu);

    if (!CPU(newcpu)->halted) {
        rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
        return;
    }

    cpu_synchronize_state(CPU(newcpu));

    env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);

    /* Enable Power-saving mode Exit Cause exceptions for the new CPU */
    lpcr = env->spr[SPR_LPCR];
    if (!pcc->interrupts_big_endian(callcpu)) {
        lpcr |= LPCR_ILE;
    }
    if (env->mmu_model == POWERPC_MMU_3_00) {
        /*
         * New cpus are expected to start in the same radix/hash mode
         * as the existing CPUs
         */
        if (ppc64_v3_radix(callcpu)) {
            lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
        } else {
            lpcr &= ~(LPCR_UPRT | LPCR_GTSE | LPCR_HR);
        }
        env->spr[SPR_PSSCR] &= ~PSSCR_EC;
    }
    ppc_store_lpcr(newcpu, lpcr);

    /*
     * Set the timebase offset of the new CPU to that of the invoking
     * CPU.  This helps hotplugged CPU to have the correct timebase
     * offset.
     */
    newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;

    spapr_cpu_set_entry_state(newcpu, start, r3);

    qemu_cpu_kick(CPU(newcpu));

    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}

static void rtas_stop_self(PowerPCCPU *cpu, SpaprMachineState *spapr,
                           uint32_t token, uint32_t nargs,
                           target_ulong args,
                           uint32_t nret, target_ulong rets)
{
    CPUState *cs = CPU(cpu);
    CPUPPCState *env = &cpu->env;
    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);

    /* Disable Power-saving mode Exit Cause exceptions for the CPU.
     * This could deliver an interrupt on a dying CPU and crash the
     * guest.
     * For the same reason, set PSSCR_EC.
     */
    ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
    env->spr[SPR_PSSCR] |= PSSCR_EC;
    cs->halted = 1;
    kvmppc_set_reg_ppc_online(cpu, 0);
    qemu_cpu_kick(cs);
}

static void rtas_ibm_suspend_me(PowerPCCPU *cpu, SpaprMachineState *spapr,
                           uint32_t token, uint32_t nargs,
                           target_ulong args,
                           uint32_t nret, target_ulong rets)
{
    CPUState *cs;

    if (nargs != 0 || nret != 1) {
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    CPU_FOREACH(cs) {
        PowerPCCPU *c = POWERPC_CPU(cs);
        CPUPPCState *e = &c->env;
        if (c == cpu) {
            continue;
        }

        /* See h_join */
        if (!cs->halted || (e->msr & (1ULL << MSR_EE))) {
            rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE);
            return;
        }
    }

    qemu_system_suspend_request();
    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}

static inline int sysparm_st(target_ulong addr, target_ulong len,
                             const void *val, uint16_t vallen)
{
    hwaddr phys = ppc64_phys_to_real(addr);

    if (len < 2) {
        return RTAS_OUT_SYSPARM_PARAM_ERROR;
    }
    stw_be_phys(&address_space_memory, phys, vallen);
    cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
    return RTAS_OUT_SUCCESS;
}

static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
                                          SpaprMachineState *spapr,
                                          uint32_t token, uint32_t nargs,
                                          target_ulong args,
                                          uint32_t nret, target_ulong rets)
{
    PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
    MachineState *ms = MACHINE(spapr);
    target_ulong parameter = rtas_ld(args, 0);
    target_ulong buffer = rtas_ld(args, 1);
    target_ulong length = rtas_ld(args, 2);
    target_ulong ret;

    switch (parameter) {
    case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
        char *param_val = g_strdup_printf("MaxEntCap=%d,"
                                          "DesMem=%" PRIu64 ","
                                          "DesProcs=%d,"
                                          "MaxPlatProcs=%d",
                                          ms->smp.max_cpus,
                                          ms->ram_size / MiB,
                                          ms->smp.cpus,
                                          ms->smp.max_cpus);
        if (pcc->n_host_threads > 0) {
            char *hostthr_val, *old = param_val;

            /*
             * Add HostThrs property. This property is not present in PAPR but
             * is expected by some guests to communicate the number of physical
             * host threads per core on the system so that they can scale
             * information which varies based on the thread configuration.
             */
            hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads);
            param_val = g_strconcat(param_val, hostthr_val, NULL);
            g_free(hostthr_val);
            g_free(old);
        }
        ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
        g_free(param_val);
        break;
    }
    case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
        uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;

        ret = sysparm_st(buffer, length, &param_val, sizeof(param_val));
        break;
    }
    case RTAS_SYSPARM_UUID:
        ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
                         (qemu_uuid_set ? 16 : 0));
        break;
    default:
        ret = RTAS_OUT_NOT_SUPPORTED;
    }

    rtas_st(rets, 0, ret);
}

static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
                                          SpaprMachineState *spapr,
                                          uint32_t token, uint32_t nargs,
                                          target_ulong args,
                                          uint32_t nret, target_ulong rets)
{
    target_ulong parameter = rtas_ld(args, 0);
    target_ulong ret = RTAS_OUT_NOT_SUPPORTED;

    switch (parameter) {
    case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
    case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
    case RTAS_SYSPARM_UUID:
        ret = RTAS_OUT_NOT_AUTHORIZED;
        break;
    }

    rtas_st(rets, 0, ret);
}

static void rtas_ibm_os_term(PowerPCCPU *cpu,
                            SpaprMachineState *spapr,
                            uint32_t token, uint32_t nargs,
                            target_ulong args,
                            uint32_t nret, target_ulong rets)
{
    qemu_system_guest_panicked(NULL);

    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}

static void rtas_set_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
                                 uint32_t token, uint32_t nargs,
                                 target_ulong args, uint32_t nret,
                                 target_ulong rets)
{
    int32_t power_domain;

    if (nargs != 2 || nret != 2) {
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    /* we currently only use a single, "live insert" powerdomain for
     * hotplugged/dlpar'd resources, so the power is always live/full (100)
     */
    power_domain = rtas_ld(args, 0);
    if (power_domain != -1) {
        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
        return;
    }

    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
    rtas_st(rets, 1, 100);
}

static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
                                  uint32_t token, uint32_t nargs,
                                  target_ulong args, uint32_t nret,
                                  target_ulong rets)
{
    int32_t power_domain;

    if (nargs != 1 || nret != 2) {
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    /* we currently only use a single, "live insert" powerdomain for
     * hotplugged/dlpar'd resources, so the power is always live/full (100)
     */
    power_domain = rtas_ld(args, 0);
    if (power_domain != -1) {
        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
        return;
    }

    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
    rtas_st(rets, 1, 100);
}

static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
                                  SpaprMachineState *spapr,
                                  uint32_t token, uint32_t nargs,
                                  target_ulong args,
                                  uint32_t nret, target_ulong rets)
{
    hwaddr rtas_addr;

    if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) {
        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
        return;
    }

    rtas_addr = spapr_get_rtas_addr();
    if (!rtas_addr) {
        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
        return;
    }

    spapr->guest_machine_check_addr = rtas_ld(args, 1);
    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}

static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
                                   SpaprMachineState *spapr,
                                   uint32_t token, uint32_t nargs,
                                   target_ulong args,
                                   uint32_t nret, target_ulong rets)
{
    if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) {
        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
        return;
    }

    if (spapr->guest_machine_check_addr == -1) {
        /* NMI register not called */
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    if (spapr->mc_status != cpu->vcpu_id) {
        /* The vCPU that hit the NMI should invoke "ibm,nmi-interlock" */
        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
        return;
    }

    /*
     * vCPU issuing "ibm,nmi-interlock" is done with NMI handling,
     * hence unset mc_status.
     */
    spapr->mc_status = -1;
    qemu_cond_signal(&spapr->mc_delivery_cond);
    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
}

static struct rtas_call {
    const char *name;
    spapr_rtas_fn fn;
} rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];

target_ulong spapr_rtas_call(PowerPCCPU *cpu, SpaprMachineState *spapr,
                             uint32_t token, uint32_t nargs, target_ulong args,
                             uint32_t nret, target_ulong rets)
{
    if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
        struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);

        if (call->fn) {
            call->fn(cpu, spapr, token, nargs, args, nret, rets);
            return H_SUCCESS;
        }
    }

    /* HACK: Some Linux early debug code uses RTAS display-character,
     * but assumes the token value is 0xa (which it is on some real
     * machines) without looking it up in the device tree.  This
     * special case makes this work */
    if (token == 0xa) {
        rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
        return H_SUCCESS;
    }

    hcall_dprintf("Unknown RTAS token 0x%x\n", token);
    rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
    return H_PARAMETER;
}

uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
                         uint32_t nret, uint64_t rets)
{
    int token;

    for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
        if (strcmp(cmd, rtas_table[token].name) == 0) {
            SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
            PowerPCCPU *cpu = POWERPC_CPU(first_cpu);

            rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
                                 nargs, args, nret, rets);
            return H_SUCCESS;
        }
    }
    return H_PARAMETER;
}

void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
{
    assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));

    token -= RTAS_TOKEN_BASE;

    assert(!name || !rtas_table[token].name);

    rtas_table[token].name = name;
    rtas_table[token].fn = fn;
}

void spapr_dt_rtas_tokens(void *fdt, int rtas)
{
    int i;

    for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
        struct rtas_call *call = &rtas_table[i];

        if (!call->name) {
            continue;
        }

        _FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
    }
}

hwaddr spapr_get_rtas_addr(void)
{
    SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
    int rtas_node;
    const fdt32_t *rtas_data;
    void *fdt = spapr->fdt_blob;

    /* fetch rtas addr from fdt */
    rtas_node = fdt_path_offset(fdt, "/rtas");
    if (rtas_node < 0) {
        return 0;
    }

    rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL);
    if (!rtas_data) {
        return 0;
    }

    /*
     * We assume that the OS called RTAS instantiate-rtas, but some other
     * OS might call RTAS instantiate-rtas-64 instead. This fine as of now
     * as SLOF only supports 32-bit variant.
     */
    return (hwaddr)fdt32_to_cpu(*rtas_data);
}

static void core_rtas_register_types(void)
{
    spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
                        rtas_display_character);
    spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
    spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
                        rtas_system_reboot);
    spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
                        rtas_query_cpu_stopped_state);
    spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
    spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
    spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me",
                        rtas_ibm_suspend_me);
    spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
                        "ibm,get-system-parameter",
                        rtas_ibm_get_system_parameter);
    spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
                        "ibm,set-system-parameter",
                        rtas_ibm_set_system_parameter);
    spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
                        rtas_ibm_os_term);
    spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
                        rtas_set_power_level);
    spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
                        rtas_get_power_level);
    spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
                        rtas_ibm_nmi_register);
    spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
                        rtas_ibm_nmi_interlock);
}

type_init(core_rtas_register_types)
Commit	Line	Data
39ac8455 DG	1	/*
	2	* QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
	3	*
	4	* Hypercall based emulated RTAS
	5	*
	6	* Copyright (c) 2010-2011 David Gibson, IBM Corporation.
	7	*
	8	* Permission is hereby granted, free of charge, to any person obtaining a copy
	9	* of this software and associated documentation files (the "Software"), to deal
	10	* in the Software without restriction, including without limitation the rights
	11	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	12	* copies of the Software, and to permit persons to whom the Software is
	13	* furnished to do so, subject to the following conditions:
	14	*
	15	* The above copyright notice and this permission notice shall be included in
	16	* all copies or substantial portions of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	21	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	22	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	23	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	24	* THE SOFTWARE.
	25	*
	26	*/
54d31236	27
0d75590d	28	#include "qemu/osdep.h"
39ac8455	29	#include "cpu.h"
03dd024f	30	#include "qemu/log.h"
ce9863b7	31	#include "qemu/error-report.h"
9c17d615	32	#include "sysemu/sysemu.h"
9c17d615	33	#include "sysemu/device_tree.h"
db4ef288	34	#include "sysemu/cpus.h"
cf116ad4	35	#include "sysemu/hw_accel.h"
54d31236	36	#include "sysemu/runstate.h"
a84f7179	37	#include "kvm_ppc.h"
39ac8455	38
0d09e41a PB	39	#include "hw/ppc/spapr.h"
0d09e41a PB	40	#include "hw/ppc/spapr_vio.h"
eeddd59f	41	#include "hw/ppc/spapr_rtas.h"
84369f63	42	#include "hw/ppc/spapr_cpu_core.h"
af81cf32	43	#include "hw/ppc/ppc.h"
e3943228	44	#include "hw/boards.h"
39ac8455 DG	45
39ac8455 DG	46	#include <libfdt.h>
8c8639df	47	#include "hw/ppc/spapr_drc.h"
f348b6d1	48	#include "qemu/cutils.h"
028ec3ce	49	#include "trace.h"
3f5dabce	50	#include "hw/ppc/fdt.h"
cf116ad4	51	#include "target/ppc/mmu-hash64.h"
f00bed95	52	#include "target/ppc/mmu-book3s-v3.h"
8c8639df	53
ce2918cb	54	static void rtas_display_character(PowerPCCPU cpu, SpaprMachineState spapr,
821303f5 DG	55	uint32_t token, uint32_t nargs,
	56	target_ulong args,
	57	uint32_t nret, target_ulong rets)
	58	{
	59	uint8_t c = rtas_ld(args, 0);
ce2918cb	60	SpaprVioDevice *sdev = vty_lookup(spapr, 0);
821303f5 DG	61
821303f5 DG	62	if (!sdev) {
a64d325d	63	rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
821303f5 DG	64	} else {
821303f5 DG	65	vty_putchars(sdev, &c, sizeof(c));
a64d325d	66	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5 DG	67	}
	68	}
	69
ce2918cb	70	static void rtas_power_off(PowerPCCPU cpu, SpaprMachineState spapr,
821303f5 DG	71	uint32_t token, uint32_t nargs, target_ulong args,
	72	uint32_t nret, target_ulong rets)
	73	{
	74	if (nargs != 2 \|\| nret != 1) {
a64d325d	75	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
821303f5 DG	76	return;
821303f5 DG	77	}
cf83f140	78	qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
8a9c1b77	79	cpu_stop_current();
a64d325d	80	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5 DG	81	}
821303f5 DG	82
ce2918cb	83	static void rtas_system_reboot(PowerPCCPU cpu, SpaprMachineState spapr,
c821a43c DG	84	uint32_t token, uint32_t nargs,
	85	target_ulong args,
	86	uint32_t nret, target_ulong rets)
	87	{
	88	if (nargs != 0 \|\| nret != 1) {
a64d325d	89	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
c821a43c DG	90	return;
c821a43c DG	91	}
cf83f140	92	qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
a64d325d	93	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
c821a43c DG	94	}
c821a43c DG	95
210b580b	96	static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
ce2918cb	97	SpaprMachineState *spapr,
a9f8ad8f DG	98	uint32_t token, uint32_t nargs,
	99	target_ulong args,
	100	uint32_t nret, target_ulong rets)
	101	{
	102	target_ulong id;
0f20ba62	103	PowerPCCPU *cpu;
a9f8ad8f DG	104
a9f8ad8f DG	105	if (nargs != 1 \|\| nret != 2) {
a64d325d	106	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f DG	107	return;
	108	}
	109
	110	id = rtas_ld(args, 0);
2e886fb3	111	cpu = spapr_find_cpu(id);
05318a85	112	if (cpu != NULL) {
0f20ba62	113	if (CPU(cpu)->halted) {
a9f8ad8f DG	114	rtas_st(rets, 1, 0);
	115	} else {
	116	rtas_st(rets, 1, 2);
	117	}
	118
a64d325d	119	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f DG	120	return;
	121	}
	122
	123	/* Didn't find a matching cpu */
a64d325d	124	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f DG	125	}
a9f8ad8f DG	126
ce2918cb	127	static void rtas_start_cpu(PowerPCCPU callcpu, SpaprMachineState spapr,
a9f8ad8f DG	128	uint32_t token, uint32_t nargs,
	129	target_ulong args,
	130	uint32_t nret, target_ulong rets)
	131	{
	132	target_ulong id, start, r3;
cf116ad4 DG	133	PowerPCCPU *newcpu;
	134	CPUPPCState *env;
	135	PowerPCCPUClass *pcc;
98248918	136	target_ulong lpcr;
a9f8ad8f DG	137
a9f8ad8f DG	138	if (nargs != 3 \|\| nret != 1) {
a64d325d	139	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f DG	140	return;
	141	}
	142
	143	id = rtas_ld(args, 0);
	144	start = rtas_ld(args, 1);
	145	r3 = rtas_ld(args, 2);
	146
cf116ad4 DG	147	newcpu = spapr_find_cpu(id);
	148	if (!newcpu) {
	149	/* Didn't find a matching cpu */
	150	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
	151	return;
	152	}
a9f8ad8f	153
cf116ad4 DG	154	env = &newcpu->env;
cf116ad4 DG	155	pcc = POWERPC_CPU_GET_CLASS(newcpu);
a9f8ad8f	156
cf116ad4 DG	157	if (!CPU(newcpu)->halted) {
	158	rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
	159	return;
	160	}
048706d9	161
cf116ad4	162	cpu_synchronize_state(CPU(newcpu));
9a94ee5b	163
cf116ad4	164	env->msr = (1ULL << MSR_SF) \| (1ULL << MSR_ME);
98248918	165
cf116ad4	166	/* Enable Power-saving mode Exit Cause exceptions for the new CPU */
47a9b551	167	lpcr = env->spr[SPR_LPCR];
98248918 DG	168	if (!pcc->interrupts_big_endian(callcpu)) {
	169	lpcr \|= LPCR_ILE;
	170	}
f00bed95 DG	171	if (env->mmu_model == POWERPC_MMU_3_00) {
	172	/*
	173	* New cpus are expected to start in the same radix/hash mode
	174	* as the existing CPUs
	175	*/
00fd075e BH	176	if (ppc64_v3_radix(callcpu)) {
00fd075e BH	177	lpcr \|= LPCR_UPRT \| LPCR_GTSE \| LPCR_HR;
f00bed95	178	} else {
00fd075e	179	lpcr &= ~(LPCR_UPRT \| LPCR_GTSE \| LPCR_HR);
f00bed95	180	}
70de0967	181	env->spr[SPR_PSSCR] &= ~PSSCR_EC;
f00bed95	182	}
98248918 DG	183	ppc_store_lpcr(newcpu, lpcr);
	184
	185	/*
	186	* Set the timebase offset of the new CPU to that of the invoking
	187	* CPU. This helps hotplugged CPU to have the correct timebase
	188	* offset.
	189	*/
	190	newcpu->env.tb_env->tb_offset = callcpu->env.tb_env->tb_offset;
9a94ee5b	191
84369f63	192	spapr_cpu_set_entry_state(newcpu, start, r3);
a9f8ad8f	193
cf116ad4	194	qemu_cpu_kick(CPU(newcpu));
a9f8ad8f	195
cf116ad4	196	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f DG	197	}
a9f8ad8f DG	198
ce2918cb	199	static void rtas_stop_self(PowerPCCPU cpu, SpaprMachineState spapr,
59760f2d AK	200	uint32_t token, uint32_t nargs,
	201	target_ulong args,
	202	uint32_t nret, target_ulong rets)
	203	{
	204	CPUState *cs = CPU(cpu);
	205	CPUPPCState *env = &cpu->env;
9a94ee5b	206	PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
59760f2d	207
9a94ee5b CLG	208	/* Disable Power-saving mode Exit Cause exceptions for the CPU.
9a94ee5b CLG	209	* This could deliver an interrupt on a dying CPU and crash the
70de0967 SJS	210	* guest.
	211	* For the same reason, set PSSCR_EC.
	212	*/
cf116ad4	213	ppc_store_lpcr(cpu, env->spr[SPR_LPCR] & ~pcc->lpcr_pm);
70de0967	214	env->spr[SPR_PSSCR] \|= PSSCR_EC;
cf116ad4	215	cs->halted = 1;
a84f7179	216	kvmppc_set_reg_ppc_online(cpu, 0);
cf116ad4	217	qemu_cpu_kick(cs);
59760f2d AK	218	}
59760f2d AK	219
93eac7b8 NP	220	static void rtas_ibm_suspend_me(PowerPCCPU cpu, SpaprMachineState spapr,
	221	uint32_t token, uint32_t nargs,
	222	target_ulong args,
	223	uint32_t nret, target_ulong rets)
	224	{
	225	CPUState *cs;
	226
	227	if (nargs != 0 \|\| nret != 1) {
	228	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
	229	return;
	230	}
	231
	232	CPU_FOREACH(cs) {
	233	PowerPCCPU *c = POWERPC_CPU(cs);
	234	CPUPPCState *e = &c->env;
	235	if (c == cpu) {
	236	continue;
	237	}
	238
	239	/* See h_join */
	240	if (!cs->halted \|\| (e->msr & (1ULL << MSR_EE))) {
	241	rtas_st(rets, 0, H_MULTI_THREADS_ACTIVE);
	242	return;
	243	}
	244	}
	245
	246	qemu_system_suspend_request();
	247	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
	248	}
	249
c920f7b4 DG	250	static inline int sysparm_st(target_ulong addr, target_ulong len,
	251	const void *val, uint16_t vallen)
	252	{
	253	hwaddr phys = ppc64_phys_to_real(addr);
	254
	255	if (len < 2) {
	256	return RTAS_OUT_SYSPARM_PARAM_ERROR;
	257	}
	258	stw_be_phys(&address_space_memory, phys, vallen);
	259	cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
	260	return RTAS_OUT_SUCCESS;
	261	}
	262
3ada6b11	263	static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
ce2918cb	264	SpaprMachineState *spapr,
3ada6b11 AK	265	uint32_t token, uint32_t nargs,
	266	target_ulong args,
	267	uint32_t nret, target_ulong rets)
	268	{
289af4ac	269	PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
500c2cc5	270	MachineState *ms = MACHINE(spapr);
3ada6b11 AK	271	target_ulong parameter = rtas_ld(args, 0);
	272	target_ulong buffer = rtas_ld(args, 1);
	273	target_ulong length = rtas_ld(args, 2);
c920f7b4	274	target_ulong ret;
3ada6b11 AK	275
3ada6b11 AK	276	switch (parameter) {
3b50d897	277	case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
e3943228	278	char *param_val = g_strdup_printf("MaxEntCap=%d,"
ab3dd749	279	"DesMem=%" PRIu64 ","
e3943228 SB	280	"DesProcs=%d,"
e3943228 SB	281	"MaxPlatProcs=%d",
dd32e948	282	ms->smp.max_cpus,
da2c8f4d	283	ms->ram_size / MiB,
fe6b6346	284	ms->smp.cpus,
dd32e948	285	ms->smp.max_cpus);
289af4ac SJS	286	if (pcc->n_host_threads > 0) {
	287	char hostthr_val, old = param_val;
	288
	289	/*
	290	* Add HostThrs property. This property is not present in PAPR but
	291	* is expected by some guests to communicate the number of physical
	292	* host threads per core on the system so that they can scale
	293	* information which varies based on the thread configuration.
	294	*/
	295	hostthr_val = g_strdup_printf(",HostThrs=%d", pcc->n_host_threads);
	296	param_val = g_strconcat(param_val, hostthr_val, NULL);
	297	g_free(hostthr_val);
	298	g_free(old);
	299	}
c920f7b4	300	ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
3b50d897 S	301	g_free(param_val);
	302	break;
	303	}
3052d951 S	304	case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
	305	uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
	306
c920f7b4	307	ret = sysparm_st(buffer, length, &param_val, sizeof(param_val));
3ada6b11 AK	308	break;
3ada6b11 AK	309	}
b907d7b0	310	case RTAS_SYSPARM_UUID:
9c5ce8db FZ	311	ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
9c5ce8db FZ	312	(qemu_uuid_set ? 16 : 0));
b907d7b0	313	break;
3052d951 S	314	default:
	315	ret = RTAS_OUT_NOT_SUPPORTED;
	316	}
3ada6b11 AK	317
	318	rtas_st(rets, 0, ret);
	319	}
	320
	321	static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
ce2918cb	322	SpaprMachineState *spapr,
3ada6b11 AK	323	uint32_t token, uint32_t nargs,
	324	target_ulong args,
	325	uint32_t nret, target_ulong rets)
	326	{
	327	target_ulong parameter = rtas_ld(args, 0);
	328	target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
	329
	330	switch (parameter) {
3b50d897	331	case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
3052d951	332	case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
b907d7b0	333	case RTAS_SYSPARM_UUID:
3ada6b11 AK	334	ret = RTAS_OUT_NOT_AUTHORIZED;
	335	break;
	336	}
	337
	338	rtas_st(rets, 0, ret);
	339	}
	340
2e14072f	341	static void rtas_ibm_os_term(PowerPCCPU *cpu,
ce2918cb	342	SpaprMachineState *spapr,
2e14072f ND	343	uint32_t token, uint32_t nargs,
	344	target_ulong args,
	345	uint32_t nret, target_ulong rets)
	346	{
2c553477	347	qemu_system_guest_panicked(NULL);
2e14072f	348
2c553477	349	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
2e14072f ND	350	}
2e14072f ND	351
ce2918cb	352	static void rtas_set_power_level(PowerPCCPU cpu, SpaprMachineState spapr,
094d2058 NF	353	uint32_t token, uint32_t nargs,
	354	target_ulong args, uint32_t nret,
	355	target_ulong rets)
	356	{
	357	int32_t power_domain;
	358
	359	if (nargs != 2 \|\| nret != 2) {
	360	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
	361	return;
	362	}
	363
	364	/* we currently only use a single, "live insert" powerdomain for
	365	* hotplugged/dlpar'd resources, so the power is always live/full (100)
	366	*/
	367	power_domain = rtas_ld(args, 0);
	368	if (power_domain != -1) {
	369	rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
	370	return;
	371	}
	372
	373	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
	374	rtas_st(rets, 1, 100);
	375	}
	376
ce2918cb	377	static void rtas_get_power_level(PowerPCCPU cpu, SpaprMachineState spapr,
094d2058 NF	378	uint32_t token, uint32_t nargs,
	379	target_ulong args, uint32_t nret,
	380	target_ulong rets)
	381	{
	382	int32_t power_domain;
	383
	384	if (nargs != 1 \|\| nret != 2) {
	385	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
	386	return;
	387	}
	388
	389	/* we currently only use a single, "live insert" powerdomain for
	390	* hotplugged/dlpar'd resources, so the power is always live/full (100)
	391	*/
	392	power_domain = rtas_ld(args, 0);
	393	if (power_domain != -1) {
	394	rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
	395	return;
	396	}
	397
	398	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
	399	rtas_st(rets, 1, 100);
	400	}
	401
f03496bc AP	402	static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
	403	SpaprMachineState *spapr,
	404	uint32_t token, uint32_t nargs,
	405	target_ulong args,
	406	uint32_t nret, target_ulong rets)
	407	{
	408	hwaddr rtas_addr;
	409
	410	if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) {
	411	rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
	412	return;
	413	}
	414
	415	rtas_addr = spapr_get_rtas_addr();
	416	if (!rtas_addr) {
	417	rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
	418	return;
	419	}
	420
	421	spapr->guest_machine_check_addr = rtas_ld(args, 1);
	422	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
	423	}
	424
	425	static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
	426	SpaprMachineState *spapr,
	427	uint32_t token, uint32_t nargs,
	428	target_ulong args,
	429	uint32_t nret, target_ulong rets)
	430	{
	431	if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) {
	432	rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
	433	return;
	434	}
	435
	436	if (spapr->guest_machine_check_addr == -1) {
	437	/* NMI register not called */
	438	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
	439	return;
	440	}
	441
	442	if (spapr->mc_status != cpu->vcpu_id) {
	443	/* The vCPU that hit the NMI should invoke "ibm,nmi-interlock" */
	444	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
	445	return;
	446	}
	447
	448	/*
	449	* vCPU issuing "ibm,nmi-interlock" is done with NMI handling,
	450	* hence unset mc_status.
	451	*/
	452	spapr->mc_status = -1;
	453	qemu_cond_signal(&spapr->mc_delivery_cond);
	454	rtas_st(rets, 0, RTAS_OUT_SUCCESS);
	455	}
	456
39ac8455 DG	457	static struct rtas_call {
	458	const char *name;
	459	spapr_rtas_fn fn;
3a3b8502	460	} rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
39ac8455	461
ce2918cb	462	target_ulong spapr_rtas_call(PowerPCCPU cpu, SpaprMachineState spapr,
39ac8455 DG	463	uint32_t token, uint32_t nargs, target_ulong args,
	464	uint32_t nret, target_ulong rets)
	465	{
3a3b8502 AK	466	if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
3a3b8502 AK	467	struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
39ac8455 DG	468
39ac8455 DG	469	if (call->fn) {
210b580b	470	call->fn(cpu, spapr, token, nargs, args, nret, rets);
39ac8455 DG	471	return H_SUCCESS;
	472	}
	473	}
	474
821303f5 DG	475	/* HACK: Some Linux early debug code uses RTAS display-character,
	476	* but assumes the token value is 0xa (which it is on some real
	477	* machines) without looking it up in the device tree. This
	478	* special case makes this work */
	479	if (token == 0xa) {
210b580b	480	rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
821303f5 DG	481	return H_SUCCESS;
	482	}
	483
39ac8455	484	hcall_dprintf("Unknown RTAS token 0x%x\n", token);
a64d325d	485	rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
39ac8455 DG	486	return H_PARAMETER;
	487	}
	488
eeddd59f LV	489	uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
	490	uint32_t nret, uint64_t rets)
	491	{
	492	int token;
	493
	494	for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
	495	if (strcmp(cmd, rtas_table[token].name) == 0) {
ce2918cb	496	SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
eeddd59f LV	497	PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
	498
	499	rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
	500	nargs, args, nret, rets);
	501	return H_SUCCESS;
	502	}
	503	}
	504	return H_PARAMETER;
	505	}
	506
3a3b8502	507	void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
39ac8455	508	{
adf9ac50	509	assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
c89d5299	510
3a3b8502	511	token -= RTAS_TOKEN_BASE;
adf9ac50	512
64db6c70	513	assert(!name \|\| !rtas_table[token].name);
39ac8455	514
3a3b8502 AK	515	rtas_table[token].name = name;
3a3b8502 AK	516	rtas_table[token].fn = fn;
39ac8455 DG	517	}
39ac8455 DG	518
3f5dabce	519	void spapr_dt_rtas_tokens(void *fdt, int rtas)
39ac8455	520	{
39ac8455 DG	521	int i;
39ac8455 DG	522
3a3b8502	523	for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
39ac8455 DG	524	struct rtas_call *call = &rtas_table[i];
39ac8455 DG	525
d36b66f7	526	if (!call->name) {
39ac8455 DG	527	continue;
	528	}
	529
3f5dabce	530	_FDT(fdt_setprop_cell(fdt, rtas, call->name, i + RTAS_TOKEN_BASE));
39ac8455	531	}
39ac8455	532	}
821303f5	533
81fe70e4 AP	534	hwaddr spapr_get_rtas_addr(void)
	535	{
	536	SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
	537	int rtas_node;
	538	const fdt32_t *rtas_data;
	539	void *fdt = spapr->fdt_blob;
	540
	541	/* fetch rtas addr from fdt */
	542	rtas_node = fdt_path_offset(fdt, "/rtas");
	543	if (rtas_node < 0) {
	544	return 0;
	545	}
	546
	547	rtas_data = fdt_getprop(fdt, rtas_node, "linux,rtas-base", NULL);
	548	if (!rtas_data) {
	549	return 0;
	550	}
	551
	552	/*
	553	* We assume that the OS called RTAS instantiate-rtas, but some other
	554	* OS might call RTAS instantiate-rtas-64 instead. This fine as of now
	555	* as SLOF only supports 32-bit variant.
	556	*/
	557	return (hwaddr)fdt32_to_cpu(*rtas_data);
	558	}
	559
83f7d43a	560	static void core_rtas_register_types(void)
821303f5	561	{
3a3b8502 AK	562	spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
3a3b8502 AK	563	rtas_display_character);
3a3b8502 AK	564	spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
	565	spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
	566	rtas_system_reboot);
	567	spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
a9f8ad8f	568	rtas_query_cpu_stopped_state);
3a3b8502 AK	569	spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
3a3b8502 AK	570	spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
93eac7b8 NP	571	spapr_rtas_register(RTAS_IBM_SUSPEND_ME, "ibm,suspend-me",
93eac7b8 NP	572	rtas_ibm_suspend_me);
3a3b8502 AK	573	spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
3a3b8502 AK	574	"ibm,get-system-parameter",
3ada6b11	575	rtas_ibm_get_system_parameter);
3a3b8502 AK	576	spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
3a3b8502 AK	577	"ibm,set-system-parameter",
3ada6b11	578	rtas_ibm_set_system_parameter);
2e14072f ND	579	spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
2e14072f ND	580	rtas_ibm_os_term);
094d2058 NF	581	spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
	582	rtas_set_power_level);
	583	spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
	584	rtas_get_power_level);
f03496bc AP	585	spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
	586	rtas_ibm_nmi_register);
	587	spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
	588	rtas_ibm_nmi_interlock);
821303f5	589	}
83f7d43a AF	590
83f7d43a AF	591	type_init(core_rtas_register_types)