]> git.proxmox.com Git - mirror_qemu.git/blame - hw/ppc/spapr_vio.c
sysbus: Convert to sysbus_realize() etc. with Coccinelle
[mirror_qemu.git] / hw / ppc / spapr_vio.c
CommitLineData
4040ab72
DG
1/*
2 * QEMU sPAPR VIO code
3 *
4 * Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
5 * Based on the s390 virtio bus code:
6 * Copyright (c) 2009 Alexander Graf <agraf@suse.de>
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
17 *
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 */
21
0d75590d 22#include "qemu/osdep.h"
ce9863b7 23#include "qemu/error-report.h"
da34e65c 24#include "qapi/error.h"
efe2add7 25#include "qapi/visitor.h"
03dd024f 26#include "qemu/log.h"
83c9f4ca 27#include "hw/loader.h"
4040ab72
DG
28#include "elf.h"
29#include "hw/sysbus.h"
9c17d615
PB
30#include "sysemu/kvm.h"
31#include "sysemu/device_tree.h"
b45d63b6 32#include "kvm_ppc.h"
d6454270 33#include "migration/vmstate.h"
efe2add7 34#include "sysemu/qtest.h"
4040ab72 35
0d09e41a
PB
36#include "hw/ppc/spapr.h"
37#include "hw/ppc/spapr_vio.h"
bf5a6696 38#include "hw/ppc/fdt.h"
7ab6a501 39#include "trace.h"
4040ab72 40
4040ab72 41#include <libfdt.h>
4040ab72 42
82cffa2e
CLG
43#define SPAPR_VIO_REG_BASE 0x71000000
44
c4eda5b7
DG
45static char *spapr_vio_get_dev_name(DeviceState *qdev)
46{
ce2918cb
DG
47 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
48 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
c4eda5b7
DG
49
50 /* Device tree style name device@reg */
9be38598 51 return g_strdup_printf("%s@%x", pc->dt_name, dev->reg);
c4eda5b7
DG
52}
53
54static void spapr_vio_bus_class_init(ObjectClass *klass, void *data)
55{
56 BusClass *k = BUS_CLASS(klass);
57
58 k->get_dev_path = spapr_vio_get_dev_name;
5a06393f 59 k->get_fw_dev_path = spapr_vio_get_dev_name;
c4eda5b7
DG
60}
61
0d936928
AL
62static const TypeInfo spapr_vio_bus_info = {
63 .name = TYPE_SPAPR_VIO_BUS,
64 .parent = TYPE_BUS,
c4eda5b7 65 .class_init = spapr_vio_bus_class_init,
ce2918cb 66 .instance_size = sizeof(SpaprVioBus),
4040ab72
DG
67};
68
ce2918cb 69SpaprVioDevice *spapr_vio_find_by_reg(SpaprVioBus *bus, uint32_t reg)
4040ab72 70{
0866aca1 71 BusChild *kid;
ce2918cb 72 SpaprVioDevice *dev = NULL;
4040ab72 73
0866aca1 74 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
ce2918cb 75 dev = (SpaprVioDevice *)kid->child;
4040ab72 76 if (dev->reg == reg) {
5435352c 77 return dev;
4040ab72
DG
78 }
79 }
80
5435352c 81 return NULL;
4040ab72
DG
82}
83
ce2918cb 84static int vio_make_devnode(SpaprVioDevice *dev,
4040ab72
DG
85 void *fdt)
86{
ce2918cb 87 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
1e34d859
ME
88 int vdevice_off, node_off, ret;
89 char *dt_name;
864674fa 90 const char *dt_compatible;
4040ab72
DG
91
92 vdevice_off = fdt_path_offset(fdt, "/vdevice");
93 if (vdevice_off < 0) {
94 return vdevice_off;
95 }
96
c4eda5b7 97 dt_name = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 98 node_off = fdt_add_subnode(fdt, vdevice_off, dt_name);
4ecf8aa5 99 g_free(dt_name);
4040ab72
DG
100 if (node_off < 0) {
101 return node_off;
102 }
103
104 ret = fdt_setprop_cell(fdt, node_off, "reg", dev->reg);
105 if (ret < 0) {
106 return ret;
107 }
108
3954d33a 109 if (pc->dt_type) {
4040ab72 110 ret = fdt_setprop_string(fdt, node_off, "device_type",
3954d33a 111 pc->dt_type);
4040ab72
DG
112 if (ret < 0) {
113 return ret;
114 }
115 }
116
864674fa
SB
117 if (pc->get_dt_compatible) {
118 dt_compatible = pc->get_dt_compatible(dev);
119 } else {
120 dt_compatible = pc->dt_compatible;
121 }
122
123 if (dt_compatible) {
4040ab72 124 ret = fdt_setprop_string(fdt, node_off, "compatible",
864674fa 125 dt_compatible);
4040ab72
DG
126 if (ret < 0) {
127 return ret;
128 }
129 }
130
a307d594 131 if (dev->irq) {
bb2d8ab6 132 uint32_t ints_prop[2];
00dc738d 133
5c7adcf4 134 spapr_dt_irq(ints_prop, dev->irq, false);
00dc738d
DG
135 ret = fdt_setprop(fdt, node_off, "interrupts", ints_prop,
136 sizeof(ints_prop));
137 if (ret < 0) {
138 return ret;
139 }
140 }
141
2b7dc949 142 ret = spapr_tcet_dma_dt(fdt, node_off, "ibm,my-dma-window", dev->tcet);
ad0ebb91
DG
143 if (ret < 0) {
144 return ret;
ee86dfee
DG
145 }
146
3954d33a
AL
147 if (pc->devnode) {
148 ret = (pc->devnode)(dev, fdt, node_off);
4040ab72
DG
149 if (ret < 0) {
150 return ret;
151 }
152 }
153
154 return node_off;
155}
4040ab72 156
b45d63b6
BH
157/*
158 * CRQ handling
159 */
ce2918cb 160static target_ulong h_reg_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
161 target_ulong opcode, target_ulong *args)
162{
163 target_ulong reg = args[0];
164 target_ulong queue_addr = args[1];
165 target_ulong queue_len = args[2];
ce2918cb 166 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
167
168 if (!dev) {
d9599c92 169 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
170 return H_PARAMETER;
171 }
172
173 /* We can't grok a queue size bigger than 256M for now */
174 if (queue_len < 0x1000 || queue_len > 0x10000000) {
d9599c92
DG
175 hcall_dprintf("Queue size too small or too big (0x" TARGET_FMT_lx
176 ")\n", queue_len);
b45d63b6
BH
177 return H_PARAMETER;
178 }
179
180 /* Check queue alignment */
181 if (queue_addr & 0xfff) {
d9599c92 182 hcall_dprintf("Queue not aligned (0x" TARGET_FMT_lx ")\n", queue_addr);
b45d63b6
BH
183 return H_PARAMETER;
184 }
185
186 /* Check if device supports CRQs */
187 if (!dev->crq.SendFunc) {
8e01f355 188 hcall_dprintf("Device does not support CRQ\n");
b45d63b6
BH
189 return H_NOT_FOUND;
190 }
191
b45d63b6
BH
192 /* Already a queue ? */
193 if (dev->crq.qsize) {
8e01f355 194 hcall_dprintf("CRQ already registered\n");
b45d63b6
BH
195 return H_RESOURCE;
196 }
197 dev->crq.qladdr = queue_addr;
198 dev->crq.qsize = queue_len;
199 dev->crq.qnext = 0;
200
7ab6a501 201 trace_spapr_vio_h_reg_crq(reg, queue_addr, queue_len);
b45d63b6
BH
202 return H_SUCCESS;
203}
204
ce2918cb 205static target_ulong free_crq(SpaprVioDevice *dev)
8e01f355
DG
206{
207 dev->crq.qladdr = 0;
208 dev->crq.qsize = 0;
209 dev->crq.qnext = 0;
210
7ab6a501 211 trace_spapr_vio_free_crq(dev->reg);
8e01f355
DG
212
213 return H_SUCCESS;
214}
215
ce2918cb 216static target_ulong h_free_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
217 target_ulong opcode, target_ulong *args)
218{
219 target_ulong reg = args[0];
ce2918cb 220 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
221
222 if (!dev) {
d9599c92 223 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
224 return H_PARAMETER;
225 }
226
8e01f355 227 return free_crq(dev);
b45d63b6
BH
228}
229
ce2918cb 230static target_ulong h_send_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
231 target_ulong opcode, target_ulong *args)
232{
233 target_ulong reg = args[0];
234 target_ulong msg_hi = args[1];
235 target_ulong msg_lo = args[2];
ce2918cb 236 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
237 uint64_t crq_mangle[2];
238
239 if (!dev) {
d9599c92 240 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
241 return H_PARAMETER;
242 }
243 crq_mangle[0] = cpu_to_be64(msg_hi);
244 crq_mangle[1] = cpu_to_be64(msg_lo);
245
246 if (dev->crq.SendFunc) {
247 return dev->crq.SendFunc(dev, (uint8_t *)crq_mangle);
248 }
249
250 return H_HARDWARE;
251}
252
ce2918cb 253static target_ulong h_enable_crq(PowerPCCPU *cpu, SpaprMachineState *spapr,
b45d63b6
BH
254 target_ulong opcode, target_ulong *args)
255{
256 target_ulong reg = args[0];
ce2918cb 257 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
b45d63b6
BH
258
259 if (!dev) {
d9599c92 260 hcall_dprintf("Unit 0x" TARGET_FMT_lx " does not exist\n", reg);
b45d63b6
BH
261 return H_PARAMETER;
262 }
263
264 return 0;
265}
266
267/* Returns negative error, 0 success, or positive: queue full */
ce2918cb 268int spapr_vio_send_crq(SpaprVioDevice *dev, uint8_t *crq)
b45d63b6
BH
269{
270 int rc;
271 uint8_t byte;
272
273 if (!dev->crq.qsize) {
ce9863b7 274 error_report("spapr_vio_send_creq on uninitialized queue");
b45d63b6
BH
275 return -1;
276 }
277
278 /* Maybe do a fast path for KVM just writing to the pages */
ad0ebb91 279 rc = spapr_vio_dma_read(dev, dev->crq.qladdr + dev->crq.qnext, &byte, 1);
b45d63b6
BH
280 if (rc) {
281 return rc;
282 }
283 if (byte != 0) {
284 return 1;
285 }
286
ad0ebb91 287 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext + 8,
b45d63b6
BH
288 &crq[8], 8);
289 if (rc) {
290 return rc;
291 }
292
293 kvmppc_eieio();
294
ad0ebb91 295 rc = spapr_vio_dma_write(dev, dev->crq.qladdr + dev->crq.qnext, crq, 8);
b45d63b6
BH
296 if (rc) {
297 return rc;
298 }
299
300 dev->crq.qnext = (dev->crq.qnext + 16) % dev->crq.qsize;
301
302 if (dev->signal_state & 1) {
7678b74a 303 spapr_vio_irq_pulse(dev);
b45d63b6
BH
304 }
305
306 return 0;
307}
308
08942ac1
BH
309/* "quiesce" handling */
310
ce2918cb 311static void spapr_vio_quiesce_one(SpaprVioDevice *dev)
08942ac1 312{
2b7dc949 313 if (dev->tcet) {
f703a04c 314 device_legacy_reset(DEVICE(dev->tcet));
08942ac1 315 }
4dd96f24 316 free_crq(dev);
08942ac1
BH
317}
318
ce2918cb 319void spapr_vio_set_bypass(SpaprVioDevice *dev, bool bypass)
ee9a569a
AK
320{
321 if (!dev->tcet) {
322 return;
323 }
324
325 memory_region_set_enabled(&dev->mrbypass, bypass);
326 memory_region_set_enabled(spapr_tce_get_iommu(dev->tcet), !bypass);
327
328 dev->tcet->bypass = bypass;
329}
330
ce2918cb 331static void rtas_set_tce_bypass(PowerPCCPU *cpu, SpaprMachineState *spapr,
210b580b 332 uint32_t token,
08942ac1
BH
333 uint32_t nargs, target_ulong args,
334 uint32_t nret, target_ulong rets)
335{
ce2918cb
DG
336 SpaprVioBus *bus = spapr->vio_bus;
337 SpaprVioDevice *dev;
08942ac1
BH
338 uint32_t unit, enable;
339
340 if (nargs != 2) {
a64d325d 341 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
342 return;
343 }
344 unit = rtas_ld(args, 0);
345 enable = rtas_ld(args, 1);
346 dev = spapr_vio_find_by_reg(bus, unit);
347 if (!dev) {
a64d325d 348 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
349 return;
350 }
ad0ebb91 351
2b7dc949 352 if (!dev->tcet) {
a64d325d 353 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
53724ee5 354 return;
08942ac1
BH
355 }
356
ee9a569a 357 spapr_vio_set_bypass(dev, !!enable);
53724ee5 358
a64d325d 359 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
360}
361
ce2918cb 362static void rtas_quiesce(PowerPCCPU *cpu, SpaprMachineState *spapr,
210b580b 363 uint32_t token,
08942ac1
BH
364 uint32_t nargs, target_ulong args,
365 uint32_t nret, target_ulong rets)
366{
ce2918cb 367 SpaprVioBus *bus = spapr->vio_bus;
0866aca1 368 BusChild *kid;
ce2918cb 369 SpaprVioDevice *dev = NULL;
08942ac1
BH
370
371 if (nargs != 0) {
a64d325d 372 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
08942ac1
BH
373 return;
374 }
375
0866aca1 376 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
ce2918cb 377 dev = (SpaprVioDevice *)kid->child;
08942ac1
BH
378 spapr_vio_quiesce_one(dev);
379 }
380
a64d325d 381 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
08942ac1
BH
382}
383
ce2918cb 384static SpaprVioDevice *reg_conflict(SpaprVioDevice *dev)
9fc380d3 385{
ce2918cb 386 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
0866aca1 387 BusChild *kid;
ce2918cb 388 SpaprVioDevice *other;
9fc380d3
ME
389
390 /*
d601fac4
DG
391 * Check for a device other than the given one which is already
392 * using the requested address. We have to open code this because
393 * the given dev might already be in the list.
9fc380d3 394 */
0866aca1 395 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
fd506b4f 396 other = VIO_SPAPR_DEVICE(kid->child);
9fc380d3 397
d601fac4
DG
398 if (other != dev && other->reg == dev->reg) {
399 return other;
9fc380d3
ME
400 }
401 }
402
403 return 0;
404}
405
b1c7f725 406static void spapr_vio_busdev_reset(DeviceState *qdev)
8e01f355 407{
ce2918cb
DG
408 SpaprVioDevice *dev = VIO_SPAPR_DEVICE(qdev);
409 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
8e01f355 410
4dd96f24
DG
411 /* Shut down the request queue and TCEs if necessary */
412 spapr_vio_quiesce_one(dev);
413
414 dev->signal_state = 0;
b1c7f725 415
ee9a569a 416 spapr_vio_set_bypass(dev, false);
b1c7f725
DG
417 if (pc->reset) {
418 pc->reset(dev);
419 }
8e01f355
DG
420}
421
82cffa2e
CLG
422/*
423 * The register property of a VIO device is defined in livirt using
424 * 0x1000 as a base register number plus a 0x1000 increment. For the
425 * VIO tty device, the base number is changed to 0x30000000. QEMU uses
426 * a base register number of 0x71000000 and then a simple increment.
427 *
428 * The formula below tries to compute a unique index number from the
429 * register value that will be used to define the IRQ number of the
430 * VIO device.
431 *
432 * A maximum of 256 VIO devices is covered. Collisions are possible
433 * but they will be detected when the IRQ is claimed.
434 */
435static inline uint32_t spapr_vio_reg_to_irq(uint32_t reg)
436{
437 uint32_t irq;
438
439 if (reg >= SPAPR_VIO_REG_BASE) {
440 /*
441 * VIO device register values when allocated by QEMU. For
442 * these, we simply mask the high bits to fit the overall
443 * range: [0x00 - 0xff].
444 *
445 * The nvram VIO device (reg=0x71000000) is a static device of
446 * the pseries machine and so is always allocated by QEMU. Its
447 * IRQ number is 0x0.
448 */
449 irq = reg & 0xff;
450
451 } else if (reg >= 0x30000000) {
452 /*
453 * VIO tty devices register values, when allocated by livirt,
454 * are mapped in range [0xf0 - 0xff], gives us a maximum of 16
455 * vtys.
456 */
457 irq = 0xf0 | ((reg >> 12) & 0xf);
458
459 } else {
460 /*
461 * Other VIO devices register values, when allocated by
462 * livirt, should be mapped in range [0x00 - 0xef]. Conflicts
463 * will be detected when IRQ is claimed.
464 */
465 irq = (reg >> 12) & 0xff;
466 }
467
468 return SPAPR_IRQ_VIO | irq;
469}
470
28b07e73 471static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp)
4040ab72 472{
ce2918cb
DG
473 SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
474 SpaprVioDevice *dev = (SpaprVioDevice *)qdev;
475 SpaprVioDeviceClass *pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
4040ab72 476 char *id;
a005b3ef 477 Error *local_err = NULL;
9fc380d3 478
d601fac4
DG
479 if (dev->reg != -1) {
480 /*
481 * Explicitly assigned address, just verify that no-one else
482 * is using it. other mechanism). We have to open code this
483 * rather than using spapr_vio_find_by_reg() because sdev
484 * itself is already in the list.
485 */
ce2918cb 486 SpaprVioDevice *other = reg_conflict(dev);
d601fac4
DG
487
488 if (other) {
28b07e73
MA
489 error_setg(errp, "%s and %s devices conflict at address %#x",
490 object_get_typename(OBJECT(qdev)),
491 object_get_typename(OBJECT(&other->qdev)),
492 dev->reg);
493 return;
d601fac4
DG
494 }
495 } else {
496 /* Need to assign an address */
ce2918cb 497 SpaprVioBus *bus = SPAPR_VIO_BUS(dev->qdev.parent_bus);
d601fac4
DG
498
499 do {
500 dev->reg = bus->next_reg++;
501 } while (reg_conflict(dev));
9fc380d3 502 }
4040ab72 503
1e34d859
ME
504 /* Don't overwrite ids assigned on the command line */
505 if (!dev->qdev.id) {
c4eda5b7 506 id = spapr_vio_get_dev_name(DEVICE(dev));
1e34d859 507 dev->qdev.id = id;
4040ab72
DG
508 }
509
48822064 510 dev->irq = spapr_vio_reg_to_irq(dev->reg);
82cffa2e 511
48822064
CLG
512 if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) {
513 dev->irq = spapr_irq_findone(spapr, &local_err);
514 if (local_err) {
515 error_propagate(errp, local_err);
516 return;
4fe75a8c
CLG
517 }
518 }
519
520 spapr_irq_claim(spapr, dev->irq, false, &local_err);
a005b3ef
GK
521 if (local_err) {
522 error_propagate(errp, local_err);
28b07e73 523 return;
416343b1 524 }
4040ab72 525
53724ee5 526 if (pc->rtce_window_size) {
4290ca49 527 uint32_t liobn = SPAPR_VIO_LIOBN(dev->reg);
ee9a569a
AK
528
529 memory_region_init(&dev->mrroot, OBJECT(dev), "iommu-spapr-root",
530 ram_size);
531 memory_region_init_alias(&dev->mrbypass, OBJECT(dev),
532 "iommu-spapr-bypass", get_system_memory(),
533 0, ram_size);
534 memory_region_add_subregion_overlap(&dev->mrroot, 0, &dev->mrbypass, 1);
535 address_space_init(&dev->as, &dev->mrroot, qdev->id);
536
df7625d4
AK
537 dev->tcet = spapr_tce_new_table(qdev, liobn);
538 spapr_tce_table_enable(dev->tcet, SPAPR_TCE_PAGE_SHIFT, 0,
539 pc->rtce_window_size >> SPAPR_TCE_PAGE_SHIFT);
ee9a569a
AK
540 dev->tcet->vdev = dev;
541 memory_region_add_subregion_overlap(&dev->mrroot, 0,
542 spapr_tce_get_iommu(dev->tcet), 2);
53724ee5 543 }
ee86dfee 544
28b07e73 545 pc->realize(dev, errp);
4040ab72
DG
546}
547
ce2918cb 548static target_ulong h_vio_signal(PowerPCCPU *cpu, SpaprMachineState *spapr,
00dc738d
DG
549 target_ulong opcode,
550 target_ulong *args)
551{
552 target_ulong reg = args[0];
553 target_ulong mode = args[1];
ce2918cb
DG
554 SpaprVioDevice *dev = spapr_vio_find_by_reg(spapr->vio_bus, reg);
555 SpaprVioDeviceClass *pc;
00dc738d
DG
556
557 if (!dev) {
558 return H_PARAMETER;
559 }
560
3954d33a 561 pc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
00dc738d 562
3954d33a 563 if (mode & ~pc->signal_mask) {
00dc738d
DG
564 return H_PARAMETER;
565 }
566
567 dev->signal_state = mode;
568
569 return H_SUCCESS;
570}
571
ce2918cb 572SpaprVioBus *spapr_vio_bus_init(void)
4040ab72 573{
ce2918cb 574 SpaprVioBus *bus;
4040ab72
DG
575 BusState *qbus;
576 DeviceState *dev;
4040ab72
DG
577
578 /* Create bridge device */
3e80f690 579 dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE);
3c6ef471 580 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
4040ab72
DG
581
582 /* Create bus on bridge device */
0d936928 583 qbus = qbus_create(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio");
215e2098 584 bus = SPAPR_VIO_BUS(qbus);
82cffa2e 585 bus->next_reg = SPAPR_VIO_REG_BASE;
4040ab72 586
00dc738d
DG
587 /* hcall-vio */
588 spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal);
589
b45d63b6
BH
590 /* hcall-crq */
591 spapr_register_hypercall(H_REG_CRQ, h_reg_crq);
592 spapr_register_hypercall(H_FREE_CRQ, h_free_crq);
593 spapr_register_hypercall(H_SEND_CRQ, h_send_crq);
594 spapr_register_hypercall(H_ENABLE_CRQ, h_enable_crq);
595
08942ac1 596 /* RTAS calls */
3a3b8502
AK
597 spapr_rtas_register(RTAS_IBM_SET_TCE_BYPASS, "ibm,set-tce-bypass",
598 rtas_set_tce_bypass);
599 spapr_rtas_register(RTAS_QUIESCE, "quiesce", rtas_quiesce);
08942ac1 600
4040ab72
DG
601 return bus;
602}
603
999e12bb
AL
604static void spapr_vio_bridge_class_init(ObjectClass *klass, void *data)
605{
5a06393f 606 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 607
5a06393f 608 dc->fw_name = "vdevice";
999e12bb
AL
609}
610
8c43a6f0 611static const TypeInfo spapr_vio_bridge_info = {
215e2098 612 .name = TYPE_SPAPR_VIO_BRIDGE,
39bffca2 613 .parent = TYPE_SYS_BUS_DEVICE,
39bffca2 614 .class_init = spapr_vio_bridge_class_init,
4040ab72
DG
615};
616
b368a7d8
DG
617const VMStateDescription vmstate_spapr_vio = {
618 .name = "spapr_vio",
619 .version_id = 1,
620 .minimum_version_id = 1,
3aff6c2f 621 .fields = (VMStateField[]) {
b368a7d8 622 /* Sanity check */
ce2918cb
DG
623 VMSTATE_UINT32_EQUAL(reg, SpaprVioDevice, NULL),
624 VMSTATE_UINT32_EQUAL(irq, SpaprVioDevice, NULL),
b368a7d8
DG
625
626 /* General VIO device state */
ce2918cb
DG
627 VMSTATE_UINT64(signal_state, SpaprVioDevice),
628 VMSTATE_UINT64(crq.qladdr, SpaprVioDevice),
629 VMSTATE_UINT32(crq.qsize, SpaprVioDevice),
630 VMSTATE_UINT32(crq.qnext, SpaprVioDevice),
b368a7d8
DG
631
632 VMSTATE_END_OF_LIST()
633 },
634};
635
39bffca2
AL
636static void vio_spapr_device_class_init(ObjectClass *klass, void *data)
637{
638 DeviceClass *k = DEVICE_CLASS(klass);
28b07e73 639 k->realize = spapr_vio_busdev_realize;
b1c7f725 640 k->reset = spapr_vio_busdev_reset;
0d936928 641 k->bus_type = TYPE_SPAPR_VIO_BUS;
39bffca2
AL
642}
643
8c43a6f0 644static const TypeInfo spapr_vio_type_info = {
3954d33a
AL
645 .name = TYPE_VIO_SPAPR_DEVICE,
646 .parent = TYPE_DEVICE,
ce2918cb 647 .instance_size = sizeof(SpaprVioDevice),
3954d33a 648 .abstract = true,
ce2918cb 649 .class_size = sizeof(SpaprVioDeviceClass),
39bffca2 650 .class_init = vio_spapr_device_class_init,
3954d33a
AL
651};
652
83f7d43a 653static void spapr_vio_register_types(void)
4040ab72 654{
0d936928 655 type_register_static(&spapr_vio_bus_info);
39bffca2 656 type_register_static(&spapr_vio_bridge_info);
3954d33a 657 type_register_static(&spapr_vio_type_info);
4040ab72
DG
658}
659
83f7d43a 660type_init(spapr_vio_register_types)
4040ab72 661
05c19438
DG
662static int compare_reg(const void *p1, const void *p2)
663{
ce2918cb 664 SpaprVioDevice const *dev1, *dev2;
05c19438 665
ce2918cb
DG
666 dev1 = (SpaprVioDevice *)*(DeviceState **)p1;
667 dev2 = (SpaprVioDevice *)*(DeviceState **)p2;
05c19438
DG
668
669 if (dev1->reg < dev2->reg) {
670 return -1;
671 }
672 if (dev1->reg == dev2->reg) {
673 return 0;
674 }
675
676 /* dev1->reg > dev2->reg */
677 return 1;
678}
679
ce2918cb 680void spapr_dt_vdevice(SpaprVioBus *bus, void *fdt)
4040ab72 681{
05c19438 682 DeviceState *qdev, **qdevs;
0866aca1 683 BusChild *kid;
05c19438 684 int i, num, ret = 0;
bf5a6696
DG
685 int node;
686
687 _FDT(node = fdt_add_subnode(fdt, 0, "vdevice"));
688
689 _FDT(fdt_setprop_string(fdt, node, "device_type", "vdevice"));
690 _FDT(fdt_setprop_string(fdt, node, "compatible", "IBM,vdevice"));
691 _FDT(fdt_setprop_cell(fdt, node, "#address-cells", 1));
692 _FDT(fdt_setprop_cell(fdt, node, "#size-cells", 0));
693 _FDT(fdt_setprop_cell(fdt, node, "#interrupt-cells", 2));
694 _FDT(fdt_setprop(fdt, node, "interrupt-controller", NULL, 0));
4040ab72 695
05c19438
DG
696 /* Count qdevs on the bus list */
697 num = 0;
0866aca1 698 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
05c19438
DG
699 num++;
700 }
701
702 /* Copy out into an array of pointers */
dec4ec40 703 qdevs = g_new(DeviceState *, num);
05c19438 704 num = 0;
0866aca1
AL
705 QTAILQ_FOREACH(kid, &bus->bus.children, sibling) {
706 qdevs[num++] = kid->child;
05c19438
DG
707 }
708
709 /* Sort the array */
710 qsort(qdevs, num, sizeof(qdev), compare_reg);
711
712 /* Hack alert. Give the devices to libfdt in reverse order, we happen
713 * to know that will mean they are in forward order in the tree. */
714 for (i = num - 1; i >= 0; i--) {
ce2918cb
DG
715 SpaprVioDevice *dev = (SpaprVioDevice *)(qdevs[i]);
716 SpaprVioDeviceClass *vdc = VIO_SPAPR_DEVICE_GET_CLASS(dev);
4040ab72
DG
717
718 ret = vio_make_devnode(dev, fdt);
4040ab72 719 if (ret < 0) {
bf5a6696
DG
720 error_report("Couldn't create device node /vdevice/%s@%"PRIx32,
721 vdc->dt_name, dev->reg);
722 exit(1);
4040ab72
DG
723 }
724 }
725
5f1d1fc5 726 g_free(qdevs);
4040ab72 727}
68f3a94c 728
ce2918cb 729gchar *spapr_vio_stdout_path(SpaprVioBus *bus)
68f3a94c 730{
ce2918cb 731 SpaprVioDevice *dev;
68f3a94c 732 char *name, *path;
68f3a94c
DG
733
734 dev = spapr_vty_get_default(bus);
7c866c6a
DG
735 if (!dev) {
736 return NULL;
68f3a94c
DG
737 }
738
c4eda5b7 739 name = spapr_vio_get_dev_name(DEVICE(dev));
4ecf8aa5 740 path = g_strdup_printf("/vdevice/%s", name);
68f3a94c 741
4ecf8aa5 742 g_free(name);
7c866c6a 743 return path;
68f3a94c 744}